netcp_ethss.c 104.1 KB
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/*
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 * Keystone GBE and XGBE subsystem code
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 *
 * Copyright (C) 2014 Texas Instruments Incorporated
 * Authors:	Sandeep Nair <sandeep_n@ti.com>
 *		Sandeep Paulraj <s-paulraj@ti.com>
 *		Cyril Chemparathy <cyril@ti.com>
 *		Santosh Shilimkar <santosh.shilimkar@ti.com>
 *		Wingman Kwok <w-kwok2@ti.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_mdio.h>
#include <linux/of_address.h>
#include <linux/if_vlan.h>
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#include <linux/ptp_classify.h>
#include <linux/net_tstamp.h>
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#include <linux/ethtool.h>

#include "cpsw_ale.h"
#include "netcp.h"
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#include "cpts.h"
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#define NETCP_DRIVER_NAME		"TI KeyStone Ethernet Driver"
#define NETCP_DRIVER_VERSION		"v1.0"

#define GBE_IDENT(reg)			((reg >> 16) & 0xffff)
#define GBE_MAJOR_VERSION(reg)		(reg >> 8 & 0x7)
#define GBE_MINOR_VERSION(reg)		(reg & 0xff)
#define GBE_RTL_VERSION(reg)		((reg >> 11) & 0x1f)

/* 1G Ethernet SS defines */
#define GBE_MODULE_NAME			"netcp-gbe"
#define GBE_SS_VERSION_14		0x4ed21104

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#define GBE_SS_REG_INDEX		0
#define GBE_SGMII34_REG_INDEX		1
#define GBE_SM_REG_INDEX		2
/* offset relative to base of GBE_SS_REG_INDEX */
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#define GBE13_SGMII_MODULE_OFFSET	0x100
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/* offset relative to base of GBE_SM_REG_INDEX */
#define GBE13_HOST_PORT_OFFSET		0x34
#define GBE13_SLAVE_PORT_OFFSET		0x60
#define GBE13_EMAC_OFFSET		0x100
#define GBE13_SLAVE_PORT2_OFFSET	0x200
#define GBE13_HW_STATS_OFFSET		0x300
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#define GBE13_CPTS_OFFSET		0x500
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#define GBE13_ALE_OFFSET		0x600
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#define GBE13_HOST_PORT_NUM		0
#define GBE13_NUM_ALE_ENTRIES		1024

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/* 1G Ethernet NU SS defines */
#define GBENU_MODULE_NAME		"netcp-gbenu"
#define GBE_SS_ID_NU			0x4ee6
#define GBE_SS_ID_2U			0x4ee8

#define IS_SS_ID_MU(d) \
	((GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) || \
	 (GBE_IDENT((d)->ss_version) == GBE_SS_ID_2U))

#define IS_SS_ID_NU(d) \
	(GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU)

#define GBENU_SS_REG_INDEX		0
#define GBENU_SM_REG_INDEX		1
#define GBENU_SGMII_MODULE_OFFSET	0x100
#define GBENU_HOST_PORT_OFFSET		0x1000
#define GBENU_SLAVE_PORT_OFFSET		0x2000
#define GBENU_EMAC_OFFSET		0x2330
#define GBENU_HW_STATS_OFFSET		0x1a000
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#define GBENU_CPTS_OFFSET		0x1d000
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#define GBENU_ALE_OFFSET		0x1e000
#define GBENU_HOST_PORT_NUM		0
#define GBENU_NUM_ALE_ENTRIES		1024
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#define GBENU_SGMII_MODULE_SIZE		0x100
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/* 10G Ethernet SS defines */
#define XGBE_MODULE_NAME		"netcp-xgbe"
#define XGBE_SS_VERSION_10		0x4ee42100

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#define XGBE_SS_REG_INDEX		0
#define XGBE_SM_REG_INDEX		1
#define XGBE_SERDES_REG_INDEX		2

/* offset relative to base of XGBE_SS_REG_INDEX */
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#define XGBE10_SGMII_MODULE_OFFSET	0x100
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#define IS_SS_ID_XGBE(d)		((d)->ss_version == XGBE_SS_VERSION_10)
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/* offset relative to base of XGBE_SM_REG_INDEX */
#define XGBE10_HOST_PORT_OFFSET		0x34
#define XGBE10_SLAVE_PORT_OFFSET	0x64
#define XGBE10_EMAC_OFFSET		0x400
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#define XGBE10_CPTS_OFFSET		0x600
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#define XGBE10_ALE_OFFSET		0x700
#define XGBE10_HW_STATS_OFFSET		0x800
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#define XGBE10_HOST_PORT_NUM		0
#define XGBE10_NUM_ALE_ENTRIES		1024

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#define	GBE_TIMER_INTERVAL			(HZ / 2)

/* Soft reset register values */
#define SOFT_RESET_MASK				BIT(0)
#define SOFT_RESET				BIT(0)
#define DEVICE_EMACSL_RESET_POLL_COUNT		100
#define GMACSL_RET_WARN_RESET_INCOMPLETE	-2

#define MACSL_RX_ENABLE_CSF			BIT(23)
#define MACSL_ENABLE_EXT_CTL			BIT(18)
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#define MACSL_XGMII_ENABLE			BIT(13)
#define MACSL_XGIG_MODE				BIT(8)
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#define MACSL_GIG_MODE				BIT(7)
#define MACSL_GMII_ENABLE			BIT(5)
#define MACSL_FULLDUPLEX			BIT(0)

#define GBE_CTL_P0_ENABLE			BIT(2)
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#define ETH_SW_CTL_P0_TX_CRC_REMOVE		BIT(13)
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#define GBE13_REG_VAL_STAT_ENABLE_ALL		0xff
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#define XGBE_REG_VAL_STAT_ENABLE_ALL		0xf
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#define GBE_STATS_CD_SEL			BIT(28)

#define GBE_PORT_MASK(x)			(BIT(x) - 1)
#define GBE_MASK_NO_PORTS			0

#define GBE_DEF_1G_MAC_CONTROL					\
		(MACSL_GIG_MODE | MACSL_GMII_ENABLE |		\
		 MACSL_ENABLE_EXT_CTL |	MACSL_RX_ENABLE_CSF)

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#define GBE_DEF_10G_MAC_CONTROL				\
		(MACSL_XGIG_MODE | MACSL_XGMII_ENABLE |		\
		 MACSL_ENABLE_EXT_CTL |	MACSL_RX_ENABLE_CSF)

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#define GBE_STATSA_MODULE			0
#define GBE_STATSB_MODULE			1
#define GBE_STATSC_MODULE			2
#define GBE_STATSD_MODULE			3

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#define GBENU_STATS0_MODULE			0
#define GBENU_STATS1_MODULE			1
#define GBENU_STATS2_MODULE			2
#define GBENU_STATS3_MODULE			3
#define GBENU_STATS4_MODULE			4
#define GBENU_STATS5_MODULE			5
#define GBENU_STATS6_MODULE			6
#define GBENU_STATS7_MODULE			7
#define GBENU_STATS8_MODULE			8

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#define XGBE_STATS0_MODULE			0
#define XGBE_STATS1_MODULE			1
#define XGBE_STATS2_MODULE			2

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/* s: 0-based slave_port */
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#define SGMII_BASE(d, s) \
	(((s) < 2) ? (d)->sgmii_port_regs : (d)->sgmii_port34_regs)
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#define GBE_TX_QUEUE				648
#define	GBE_TXHOOK_ORDER			0
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#define	GBE_RXHOOK_ORDER			0
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#define GBE_DEFAULT_ALE_AGEOUT			30
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#define SLAVE_LINK_IS_XGMII(s) ((s)->link_interface >= XGMII_LINK_MAC_PHY)
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#define NETCP_LINK_STATE_INVALID		-1

#define GBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
		offsetof(struct gbe##_##rb, rn)
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#define GBENU_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
		offsetof(struct gbenu##_##rb, rn)
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#define XGBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
		offsetof(struct xgbe##_##rb, rn)
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#define GBE_REG_ADDR(p, rb, rn) (p->rb + p->rb##_ofs.rn)

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#define HOST_TX_PRI_MAP_DEFAULT			0x00000000

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#if IS_ENABLED(CONFIG_TI_CPTS)
/* Px_TS_CTL register fields */
#define TS_RX_ANX_F_EN				BIT(0)
#define TS_RX_VLAN_LT1_EN			BIT(1)
#define TS_RX_VLAN_LT2_EN			BIT(2)
#define TS_RX_ANX_D_EN				BIT(3)
#define TS_TX_ANX_F_EN				BIT(4)
#define TS_TX_VLAN_LT1_EN			BIT(5)
#define TS_TX_VLAN_LT2_EN			BIT(6)
#define TS_TX_ANX_D_EN				BIT(7)
#define TS_LT2_EN				BIT(8)
#define TS_RX_ANX_E_EN				BIT(9)
#define TS_TX_ANX_E_EN				BIT(10)
#define TS_MSG_TYPE_EN_SHIFT			16
#define TS_MSG_TYPE_EN_MASK			0xffff

/* Px_TS_SEQ_LTYPE register fields */
#define TS_SEQ_ID_OFS_SHIFT			16
#define TS_SEQ_ID_OFS_MASK			0x3f

/* Px_TS_CTL_LTYPE2 register fields */
#define TS_107					BIT(16)
#define TS_129					BIT(17)
#define TS_130					BIT(18)
#define TS_131					BIT(19)
#define TS_132					BIT(20)
#define TS_319					BIT(21)
#define TS_320					BIT(22)
#define TS_TTL_NONZERO				BIT(23)
#define TS_UNI_EN				BIT(24)
#define TS_UNI_EN_SHIFT				24

#define TS_TX_ANX_ALL_EN	 \
	(TS_TX_ANX_D_EN	| TS_TX_ANX_E_EN | TS_TX_ANX_F_EN)

#define TS_RX_ANX_ALL_EN	 \
	(TS_RX_ANX_D_EN	| TS_RX_ANX_E_EN | TS_RX_ANX_F_EN)

#define TS_CTL_DST_PORT				TS_319
#define TS_CTL_DST_PORT_SHIFT			21

#define TS_CTL_MADDR_ALL	\
	(TS_107 | TS_129 | TS_130 | TS_131 | TS_132)

#define TS_CTL_MADDR_SHIFT			16

/* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
#define EVENT_MSG_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3))
#endif /* CONFIG_TI_CPTS */

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struct xgbe_ss_regs {
	u32	id_ver;
	u32	synce_count;
	u32	synce_mux;
	u32	control;
};

struct xgbe_switch_regs {
	u32	id_ver;
	u32	control;
	u32	emcontrol;
	u32	stat_port_en;
	u32	ptype;
	u32	soft_idle;
	u32	thru_rate;
	u32	gap_thresh;
	u32	tx_start_wds;
	u32	flow_control;
	u32	cppi_thresh;
};

struct xgbe_port_regs {
	u32	blk_cnt;
	u32	port_vlan;
	u32	tx_pri_map;
	u32	sa_lo;
	u32	sa_hi;
	u32	ts_ctl;
	u32	ts_seq_ltype;
	u32	ts_vlan;
	u32	ts_ctl_ltype2;
	u32	ts_ctl2;
	u32	control;
};

struct xgbe_host_port_regs {
	u32	blk_cnt;
	u32	port_vlan;
	u32	tx_pri_map;
	u32	src_id;
	u32	rx_pri_map;
	u32	rx_maxlen;
};

struct xgbe_emac_regs {
	u32	id_ver;
	u32	mac_control;
	u32	mac_status;
	u32	soft_reset;
	u32	rx_maxlen;
	u32	__reserved_0;
	u32	rx_pause;
	u32	tx_pause;
	u32	em_control;
	u32	__reserved_1;
	u32	tx_gap;
	u32	rsvd[4];
};

struct xgbe_host_hw_stats {
	u32	rx_good_frames;
	u32	rx_broadcast_frames;
	u32	rx_multicast_frames;
	u32	__rsvd_0[3];
	u32	rx_oversized_frames;
	u32	__rsvd_1;
	u32	rx_undersized_frames;
	u32	__rsvd_2;
	u32	overrun_type4;
	u32	overrun_type5;
	u32	rx_bytes;
	u32	tx_good_frames;
	u32	tx_broadcast_frames;
	u32	tx_multicast_frames;
	u32	__rsvd_3[9];
	u32	tx_bytes;
	u32	tx_64byte_frames;
	u32	tx_65_to_127byte_frames;
	u32	tx_128_to_255byte_frames;
	u32	tx_256_to_511byte_frames;
	u32	tx_512_to_1023byte_frames;
	u32	tx_1024byte_frames;
	u32	net_bytes;
	u32	rx_sof_overruns;
	u32	rx_mof_overruns;
	u32	rx_dma_overruns;
};

struct xgbe_hw_stats {
	u32	rx_good_frames;
	u32	rx_broadcast_frames;
	u32	rx_multicast_frames;
	u32	rx_pause_frames;
	u32	rx_crc_errors;
	u32	rx_align_code_errors;
	u32	rx_oversized_frames;
	u32	rx_jabber_frames;
	u32	rx_undersized_frames;
	u32	rx_fragments;
	u32	overrun_type4;
	u32	overrun_type5;
	u32	rx_bytes;
	u32	tx_good_frames;
	u32	tx_broadcast_frames;
	u32	tx_multicast_frames;
	u32	tx_pause_frames;
	u32	tx_deferred_frames;
	u32	tx_collision_frames;
	u32	tx_single_coll_frames;
	u32	tx_mult_coll_frames;
	u32	tx_excessive_collisions;
	u32	tx_late_collisions;
	u32	tx_underrun;
	u32	tx_carrier_sense_errors;
	u32	tx_bytes;
	u32	tx_64byte_frames;
	u32	tx_65_to_127byte_frames;
	u32	tx_128_to_255byte_frames;
	u32	tx_256_to_511byte_frames;
	u32	tx_512_to_1023byte_frames;
	u32	tx_1024byte_frames;
	u32	net_bytes;
	u32	rx_sof_overruns;
	u32	rx_mof_overruns;
	u32	rx_dma_overruns;
};

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struct gbenu_ss_regs {
	u32	id_ver;
	u32	synce_count;		/* NU */
	u32	synce_mux;		/* NU */
	u32	control;		/* 2U */
	u32	__rsvd_0[2];		/* 2U */
	u32	rgmii_status;		/* 2U */
	u32	ss_status;		/* 2U */
};

struct gbenu_switch_regs {
	u32	id_ver;
	u32	control;
	u32	__rsvd_0[2];
	u32	emcontrol;
	u32	stat_port_en;
	u32	ptype;			/* NU */
	u32	soft_idle;
	u32	thru_rate;		/* NU */
	u32	gap_thresh;		/* NU */
	u32	tx_start_wds;		/* NU */
	u32	eee_prescale;		/* 2U */
	u32	tx_g_oflow_thresh_set;	/* NU */
	u32	tx_g_oflow_thresh_clr;	/* NU */
	u32	tx_g_buf_thresh_set_l;	/* NU */
	u32	tx_g_buf_thresh_set_h;	/* NU */
	u32	tx_g_buf_thresh_clr_l;	/* NU */
	u32	tx_g_buf_thresh_clr_h;	/* NU */
};

struct gbenu_port_regs {
	u32	__rsvd_0;
	u32	control;
	u32	max_blks;		/* 2U */
	u32	mem_align1;
	u32	blk_cnt;
	u32	port_vlan;
	u32	tx_pri_map;		/* NU */
	u32	pri_ctl;		/* 2U */
	u32	rx_pri_map;
	u32	rx_maxlen;
	u32	tx_blks_pri;		/* NU */
	u32	__rsvd_1;
	u32	idle2lpi;		/* 2U */
	u32	lpi2idle;		/* 2U */
	u32	eee_status;		/* 2U */
	u32	__rsvd_2;
	u32	__rsvd_3[176];		/* NU: more to add */
	u32	__rsvd_4[2];
	u32	sa_lo;
	u32	sa_hi;
	u32	ts_ctl;
	u32	ts_seq_ltype;
	u32	ts_vlan;
	u32	ts_ctl_ltype2;
	u32	ts_ctl2;
};

struct gbenu_host_port_regs {
	u32	__rsvd_0;
	u32	control;
	u32	flow_id_offset;		/* 2U */
	u32	__rsvd_1;
	u32	blk_cnt;
	u32	port_vlan;
	u32	tx_pri_map;		/* NU */
	u32	pri_ctl;
	u32	rx_pri_map;
	u32	rx_maxlen;
	u32	tx_blks_pri;		/* NU */
	u32	__rsvd_2;
	u32	idle2lpi;		/* 2U */
	u32	lpi2wake;		/* 2U */
	u32	eee_status;		/* 2U */
	u32	__rsvd_3;
	u32	__rsvd_4[184];		/* NU */
	u32	host_blks_pri;		/* NU */
};

struct gbenu_emac_regs {
	u32	mac_control;
	u32	mac_status;
	u32	soft_reset;
	u32	boff_test;
	u32	rx_pause;
	u32	__rsvd_0[11];		/* NU */
	u32	tx_pause;
	u32	__rsvd_1[11];		/* NU */
	u32	em_control;
	u32	tx_gap;
};

/* Some hw stat regs are applicable to slave port only.
 * This is handled by gbenu_et_stats struct.  Also some
 * are for SS version NU and some are for 2U.
 */
struct gbenu_hw_stats {
	u32	rx_good_frames;
	u32	rx_broadcast_frames;
	u32	rx_multicast_frames;
	u32	rx_pause_frames;		/* slave */
	u32	rx_crc_errors;
	u32	rx_align_code_errors;		/* slave */
	u32	rx_oversized_frames;
	u32	rx_jabber_frames;		/* slave */
	u32	rx_undersized_frames;
	u32	rx_fragments;			/* slave */
	u32	ale_drop;
	u32	ale_overrun_drop;
	u32	rx_bytes;
	u32	tx_good_frames;
	u32	tx_broadcast_frames;
	u32	tx_multicast_frames;
	u32	tx_pause_frames;		/* slave */
	u32	tx_deferred_frames;		/* slave */
	u32	tx_collision_frames;		/* slave */
	u32	tx_single_coll_frames;		/* slave */
	u32	tx_mult_coll_frames;		/* slave */
	u32	tx_excessive_collisions;	/* slave */
	u32	tx_late_collisions;		/* slave */
	u32	rx_ipg_error;			/* slave 10G only */
	u32	tx_carrier_sense_errors;	/* slave */
	u32	tx_bytes;
	u32	tx_64B_frames;
	u32	tx_65_to_127B_frames;
	u32	tx_128_to_255B_frames;
	u32	tx_256_to_511B_frames;
	u32	tx_512_to_1023B_frames;
	u32	tx_1024B_frames;
	u32	net_bytes;
	u32	rx_bottom_fifo_drop;
	u32	rx_port_mask_drop;
	u32	rx_top_fifo_drop;
	u32	ale_rate_limit_drop;
	u32	ale_vid_ingress_drop;
	u32	ale_da_eq_sa_drop;
	u32	__rsvd_0[3];
	u32	ale_unknown_ucast;
	u32	ale_unknown_ucast_bytes;
	u32	ale_unknown_mcast;
	u32	ale_unknown_mcast_bytes;
	u32	ale_unknown_bcast;
	u32	ale_unknown_bcast_bytes;
	u32	ale_pol_match;
	u32	ale_pol_match_red;		/* NU */
	u32	ale_pol_match_yellow;		/* NU */
	u32	__rsvd_1[44];
	u32	tx_mem_protect_err;
	/* following NU only */
	u32	tx_pri0;
	u32	tx_pri1;
	u32	tx_pri2;
	u32	tx_pri3;
	u32	tx_pri4;
	u32	tx_pri5;
	u32	tx_pri6;
	u32	tx_pri7;
	u32	tx_pri0_bcnt;
	u32	tx_pri1_bcnt;
	u32	tx_pri2_bcnt;
	u32	tx_pri3_bcnt;
	u32	tx_pri4_bcnt;
	u32	tx_pri5_bcnt;
	u32	tx_pri6_bcnt;
	u32	tx_pri7_bcnt;
	u32	tx_pri0_drop;
	u32	tx_pri1_drop;
	u32	tx_pri2_drop;
	u32	tx_pri3_drop;
	u32	tx_pri4_drop;
	u32	tx_pri5_drop;
	u32	tx_pri6_drop;
	u32	tx_pri7_drop;
	u32	tx_pri0_drop_bcnt;
	u32	tx_pri1_drop_bcnt;
	u32	tx_pri2_drop_bcnt;
	u32	tx_pri3_drop_bcnt;
	u32	tx_pri4_drop_bcnt;
	u32	tx_pri5_drop_bcnt;
	u32	tx_pri6_drop_bcnt;
	u32	tx_pri7_drop_bcnt;
};

#define GBENU_HW_STATS_REG_MAP_SZ	0x200

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struct gbe_ss_regs {
	u32	id_ver;
	u32	synce_count;
	u32	synce_mux;
};

struct gbe_ss_regs_ofs {
	u16	id_ver;
	u16	control;
};

struct gbe_switch_regs {
	u32	id_ver;
	u32	control;
	u32	soft_reset;
	u32	stat_port_en;
	u32	ptype;
	u32	soft_idle;
	u32	thru_rate;
	u32	gap_thresh;
	u32	tx_start_wds;
	u32	flow_control;
};

struct gbe_switch_regs_ofs {
	u16	id_ver;
	u16	control;
	u16	soft_reset;
	u16	emcontrol;
	u16	stat_port_en;
	u16	ptype;
	u16	flow_control;
};

struct gbe_port_regs {
	u32	max_blks;
	u32	blk_cnt;
	u32	port_vlan;
	u32	tx_pri_map;
	u32	sa_lo;
	u32	sa_hi;
	u32	ts_ctl;
	u32	ts_seq_ltype;
	u32	ts_vlan;
	u32	ts_ctl_ltype2;
	u32	ts_ctl2;
};

struct gbe_port_regs_ofs {
	u16	port_vlan;
	u16	tx_pri_map;
	u16	sa_lo;
	u16	sa_hi;
	u16	ts_ctl;
	u16	ts_seq_ltype;
	u16	ts_vlan;
	u16	ts_ctl_ltype2;
	u16	ts_ctl2;
601
	u16	rx_maxlen;	/* 2U, NU */
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};

struct gbe_host_port_regs {
	u32	src_id;
	u32	port_vlan;
	u32	rx_pri_map;
	u32	rx_maxlen;
};

struct gbe_host_port_regs_ofs {
	u16	port_vlan;
	u16	tx_pri_map;
	u16	rx_maxlen;
};

struct gbe_emac_regs {
	u32	id_ver;
	u32	mac_control;
	u32	mac_status;
	u32	soft_reset;
	u32	rx_maxlen;
	u32	__reserved_0;
	u32	rx_pause;
	u32	tx_pause;
	u32	__reserved_1;
	u32	rx_pri_map;
	u32	rsvd[6];
};

struct gbe_emac_regs_ofs {
	u16	mac_control;
	u16	soft_reset;
	u16	rx_maxlen;
};

struct gbe_hw_stats {
	u32	rx_good_frames;
	u32	rx_broadcast_frames;
	u32	rx_multicast_frames;
	u32	rx_pause_frames;
	u32	rx_crc_errors;
	u32	rx_align_code_errors;
	u32	rx_oversized_frames;
	u32	rx_jabber_frames;
	u32	rx_undersized_frames;
	u32	rx_fragments;
	u32	__pad_0[2];
	u32	rx_bytes;
	u32	tx_good_frames;
	u32	tx_broadcast_frames;
	u32	tx_multicast_frames;
	u32	tx_pause_frames;
	u32	tx_deferred_frames;
	u32	tx_collision_frames;
	u32	tx_single_coll_frames;
	u32	tx_mult_coll_frames;
	u32	tx_excessive_collisions;
	u32	tx_late_collisions;
	u32	tx_underrun;
	u32	tx_carrier_sense_errors;
	u32	tx_bytes;
	u32	tx_64byte_frames;
	u32	tx_65_to_127byte_frames;
	u32	tx_128_to_255byte_frames;
	u32	tx_256_to_511byte_frames;
	u32	tx_512_to_1023byte_frames;
	u32	tx_1024byte_frames;
	u32	net_bytes;
	u32	rx_sof_overruns;
	u32	rx_mof_overruns;
	u32	rx_dma_overruns;
};

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#define GBE_MAX_HW_STAT_MODS			9
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#define GBE_HW_STATS_REG_MAP_SZ			0x100

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struct ts_ctl {
	int     uni;
	u8      dst_port_map;
	u8      maddr_map;
	u8      ts_mcast_type;
};

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struct gbe_slave {
	void __iomem			*port_regs;
	void __iomem			*emac_regs;
	struct gbe_port_regs_ofs	port_regs_ofs;
	struct gbe_emac_regs_ofs	emac_regs_ofs;
	int				slave_num; /* 0 based logical number */
	int				port_num;  /* actual port number */
	atomic_t			link_state;
	bool				open;
	struct phy_device		*phy;
	u32				link_interface;
	u32				mac_control;
	u8				phy_port_t;
	struct device_node		*phy_node;
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	struct ts_ctl                   ts_ctl;
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	struct list_head		slave_list;
};

struct gbe_priv {
	struct device			*dev;
	struct netcp_device		*netcp_device;
	struct timer_list		timer;
	u32				num_slaves;
	u32				ale_entries;
	u32				ale_ports;
	bool				enable_ale;
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	u8				max_num_slaves;
	u8				max_num_ports; /* max_num_slaves + 1 */
713
	u8				num_stats_mods;
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	struct netcp_tx_pipe		tx_pipe;

	int				host_port;
	u32				rx_packet_max;
	u32				ss_version;
719
	u32				stats_en_mask;
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	void __iomem			*ss_regs;
	void __iomem			*switch_regs;
	void __iomem			*host_port_regs;
	void __iomem			*ale_reg;
725
	void __iomem                    *cpts_reg;
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	void __iomem			*sgmii_port_regs;
	void __iomem			*sgmii_port34_regs;
	void __iomem			*xgbe_serdes_regs;
	void __iomem			*hw_stats_regs[GBE_MAX_HW_STAT_MODS];

	struct gbe_ss_regs_ofs		ss_regs_ofs;
	struct gbe_switch_regs_ofs	switch_regs_ofs;
	struct gbe_host_port_regs_ofs	host_port_regs_ofs;

	struct cpsw_ale			*ale;
	unsigned int			tx_queue_id;
	const char			*dma_chan_name;

	struct list_head		gbe_intf_head;
	struct list_head		secondary_slaves;
	struct net_device		*dummy_ndev;

	u64				*hw_stats;
744
	u32				*hw_stats_prev;
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	const struct netcp_ethtool_stat *et_stats;
	int				num_et_stats;
	/*  Lock for updating the hwstats */
	spinlock_t			hw_stats_lock;
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	int                             cpts_registered;
	struct cpts                     *cpts;
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};

struct gbe_intf {
	struct net_device	*ndev;
	struct device		*dev;
	struct gbe_priv		*gbe_dev;
	struct netcp_tx_pipe	tx_pipe;
	struct gbe_slave	*slave;
	struct list_head	gbe_intf_list;
	unsigned long		active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
};

static struct netcp_module gbe_module;
765
static struct netcp_module xgbe_module;
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/* Statistic management */
struct netcp_ethtool_stat {
	char desc[ETH_GSTRING_LEN];
	int type;
	u32 size;
	int offset;
};

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#define GBE_STATSA_INFO(field)						\
{									\
	"GBE_A:"#field, GBE_STATSA_MODULE,				\
	FIELD_SIZEOF(struct gbe_hw_stats, field),			\
	offsetof(struct gbe_hw_stats, field)				\
}

#define GBE_STATSB_INFO(field)						\
{									\
	"GBE_B:"#field, GBE_STATSB_MODULE,				\
	FIELD_SIZEOF(struct gbe_hw_stats, field),			\
	offsetof(struct gbe_hw_stats, field)				\
}

#define GBE_STATSC_INFO(field)						\
{									\
	"GBE_C:"#field, GBE_STATSC_MODULE,				\
	FIELD_SIZEOF(struct gbe_hw_stats, field),			\
	offsetof(struct gbe_hw_stats, field)				\
}

#define GBE_STATSD_INFO(field)						\
{									\
	"GBE_D:"#field, GBE_STATSD_MODULE,				\
	FIELD_SIZEOF(struct gbe_hw_stats, field),			\
	offsetof(struct gbe_hw_stats, field)				\
}
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static const struct netcp_ethtool_stat gbe13_et_stats[] = {
	/* GBE module A */
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	GBE_STATSA_INFO(rx_good_frames),
	GBE_STATSA_INFO(rx_broadcast_frames),
	GBE_STATSA_INFO(rx_multicast_frames),
	GBE_STATSA_INFO(rx_pause_frames),
	GBE_STATSA_INFO(rx_crc_errors),
	GBE_STATSA_INFO(rx_align_code_errors),
	GBE_STATSA_INFO(rx_oversized_frames),
	GBE_STATSA_INFO(rx_jabber_frames),
	GBE_STATSA_INFO(rx_undersized_frames),
	GBE_STATSA_INFO(rx_fragments),
	GBE_STATSA_INFO(rx_bytes),
	GBE_STATSA_INFO(tx_good_frames),
	GBE_STATSA_INFO(tx_broadcast_frames),
	GBE_STATSA_INFO(tx_multicast_frames),
	GBE_STATSA_INFO(tx_pause_frames),
	GBE_STATSA_INFO(tx_deferred_frames),
	GBE_STATSA_INFO(tx_collision_frames),
	GBE_STATSA_INFO(tx_single_coll_frames),
	GBE_STATSA_INFO(tx_mult_coll_frames),
	GBE_STATSA_INFO(tx_excessive_collisions),
	GBE_STATSA_INFO(tx_late_collisions),
	GBE_STATSA_INFO(tx_underrun),
	GBE_STATSA_INFO(tx_carrier_sense_errors),
	GBE_STATSA_INFO(tx_bytes),
	GBE_STATSA_INFO(tx_64byte_frames),
	GBE_STATSA_INFO(tx_65_to_127byte_frames),
	GBE_STATSA_INFO(tx_128_to_255byte_frames),
	GBE_STATSA_INFO(tx_256_to_511byte_frames),
	GBE_STATSA_INFO(tx_512_to_1023byte_frames),
	GBE_STATSA_INFO(tx_1024byte_frames),
	GBE_STATSA_INFO(net_bytes),
	GBE_STATSA_INFO(rx_sof_overruns),
	GBE_STATSA_INFO(rx_mof_overruns),
	GBE_STATSA_INFO(rx_dma_overruns),
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	/* GBE module B */
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	GBE_STATSB_INFO(rx_good_frames),
	GBE_STATSB_INFO(rx_broadcast_frames),
	GBE_STATSB_INFO(rx_multicast_frames),
	GBE_STATSB_INFO(rx_pause_frames),
	GBE_STATSB_INFO(rx_crc_errors),
	GBE_STATSB_INFO(rx_align_code_errors),
	GBE_STATSB_INFO(rx_oversized_frames),
	GBE_STATSB_INFO(rx_jabber_frames),
	GBE_STATSB_INFO(rx_undersized_frames),
	GBE_STATSB_INFO(rx_fragments),
	GBE_STATSB_INFO(rx_bytes),
	GBE_STATSB_INFO(tx_good_frames),
	GBE_STATSB_INFO(tx_broadcast_frames),
	GBE_STATSB_INFO(tx_multicast_frames),
	GBE_STATSB_INFO(tx_pause_frames),
	GBE_STATSB_INFO(tx_deferred_frames),
	GBE_STATSB_INFO(tx_collision_frames),
	GBE_STATSB_INFO(tx_single_coll_frames),
	GBE_STATSB_INFO(tx_mult_coll_frames),
	GBE_STATSB_INFO(tx_excessive_collisions),
	GBE_STATSB_INFO(tx_late_collisions),
	GBE_STATSB_INFO(tx_underrun),
	GBE_STATSB_INFO(tx_carrier_sense_errors),
	GBE_STATSB_INFO(tx_bytes),
	GBE_STATSB_INFO(tx_64byte_frames),
	GBE_STATSB_INFO(tx_65_to_127byte_frames),
	GBE_STATSB_INFO(tx_128_to_255byte_frames),
	GBE_STATSB_INFO(tx_256_to_511byte_frames),
	GBE_STATSB_INFO(tx_512_to_1023byte_frames),
	GBE_STATSB_INFO(tx_1024byte_frames),
	GBE_STATSB_INFO(net_bytes),
	GBE_STATSB_INFO(rx_sof_overruns),
	GBE_STATSB_INFO(rx_mof_overruns),
	GBE_STATSB_INFO(rx_dma_overruns),
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	/* GBE module C */
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	GBE_STATSC_INFO(rx_good_frames),
	GBE_STATSC_INFO(rx_broadcast_frames),
	GBE_STATSC_INFO(rx_multicast_frames),
	GBE_STATSC_INFO(rx_pause_frames),
	GBE_STATSC_INFO(rx_crc_errors),
	GBE_STATSC_INFO(rx_align_code_errors),
	GBE_STATSC_INFO(rx_oversized_frames),
	GBE_STATSC_INFO(rx_jabber_frames),
	GBE_STATSC_INFO(rx_undersized_frames),
	GBE_STATSC_INFO(rx_fragments),
	GBE_STATSC_INFO(rx_bytes),
	GBE_STATSC_INFO(tx_good_frames),
	GBE_STATSC_INFO(tx_broadcast_frames),
	GBE_STATSC_INFO(tx_multicast_frames),
	GBE_STATSC_INFO(tx_pause_frames),
	GBE_STATSC_INFO(tx_deferred_frames),
	GBE_STATSC_INFO(tx_collision_frames),
	GBE_STATSC_INFO(tx_single_coll_frames),
	GBE_STATSC_INFO(tx_mult_coll_frames),
	GBE_STATSC_INFO(tx_excessive_collisions),
	GBE_STATSC_INFO(tx_late_collisions),
	GBE_STATSC_INFO(tx_underrun),
	GBE_STATSC_INFO(tx_carrier_sense_errors),
	GBE_STATSC_INFO(tx_bytes),
	GBE_STATSC_INFO(tx_64byte_frames),
	GBE_STATSC_INFO(tx_65_to_127byte_frames),
	GBE_STATSC_INFO(tx_128_to_255byte_frames),
	GBE_STATSC_INFO(tx_256_to_511byte_frames),
	GBE_STATSC_INFO(tx_512_to_1023byte_frames),
	GBE_STATSC_INFO(tx_1024byte_frames),
	GBE_STATSC_INFO(net_bytes),
	GBE_STATSC_INFO(rx_sof_overruns),
	GBE_STATSC_INFO(rx_mof_overruns),
	GBE_STATSC_INFO(rx_dma_overruns),
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	/* GBE module D */
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	GBE_STATSD_INFO(rx_good_frames),
	GBE_STATSD_INFO(rx_broadcast_frames),
	GBE_STATSD_INFO(rx_multicast_frames),
	GBE_STATSD_INFO(rx_pause_frames),
	GBE_STATSD_INFO(rx_crc_errors),
	GBE_STATSD_INFO(rx_align_code_errors),
	GBE_STATSD_INFO(rx_oversized_frames),
	GBE_STATSD_INFO(rx_jabber_frames),
	GBE_STATSD_INFO(rx_undersized_frames),
	GBE_STATSD_INFO(rx_fragments),
	GBE_STATSD_INFO(rx_bytes),
	GBE_STATSD_INFO(tx_good_frames),
	GBE_STATSD_INFO(tx_broadcast_frames),
	GBE_STATSD_INFO(tx_multicast_frames),
	GBE_STATSD_INFO(tx_pause_frames),
	GBE_STATSD_INFO(tx_deferred_frames),
	GBE_STATSD_INFO(tx_collision_frames),
	GBE_STATSD_INFO(tx_single_coll_frames),
	GBE_STATSD_INFO(tx_mult_coll_frames),
	GBE_STATSD_INFO(tx_excessive_collisions),
	GBE_STATSD_INFO(tx_late_collisions),
	GBE_STATSD_INFO(tx_underrun),
	GBE_STATSD_INFO(tx_carrier_sense_errors),
	GBE_STATSD_INFO(tx_bytes),
	GBE_STATSD_INFO(tx_64byte_frames),
	GBE_STATSD_INFO(tx_65_to_127byte_frames),
	GBE_STATSD_INFO(tx_128_to_255byte_frames),
	GBE_STATSD_INFO(tx_256_to_511byte_frames),
	GBE_STATSD_INFO(tx_512_to_1023byte_frames),
	GBE_STATSD_INFO(tx_1024byte_frames),
	GBE_STATSD_INFO(net_bytes),
	GBE_STATSD_INFO(rx_sof_overruns),
	GBE_STATSD_INFO(rx_mof_overruns),
	GBE_STATSD_INFO(rx_dma_overruns),
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};

946
/* This is the size of entries in GBENU_STATS_HOST */
947
#define GBENU_ET_STATS_HOST_SIZE	52
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#define GBENU_STATS_HOST(field)					\
{								\
	"GBE_HOST:"#field, GBENU_STATS0_MODULE,			\
	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
	offsetof(struct gbenu_hw_stats, field)			\
}

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/* This is the size of entries in GBENU_STATS_PORT */
#define GBENU_ET_STATS_PORT_SIZE	65
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#define GBENU_STATS_P1(field)					\
{								\
	"GBE_P1:"#field, GBENU_STATS1_MODULE,			\
	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
	offsetof(struct gbenu_hw_stats, field)			\
}

#define GBENU_STATS_P2(field)					\
{								\
	"GBE_P2:"#field, GBENU_STATS2_MODULE,			\
	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
	offsetof(struct gbenu_hw_stats, field)			\
}

#define GBENU_STATS_P3(field)					\
{								\
	"GBE_P3:"#field, GBENU_STATS3_MODULE,			\
	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
	offsetof(struct gbenu_hw_stats, field)			\
}

#define GBENU_STATS_P4(field)					\
{								\
	"GBE_P4:"#field, GBENU_STATS4_MODULE,			\
	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
	offsetof(struct gbenu_hw_stats, field)			\
}

#define GBENU_STATS_P5(field)					\
{								\
	"GBE_P5:"#field, GBENU_STATS5_MODULE,			\
	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
	offsetof(struct gbenu_hw_stats, field)			\
}

#define GBENU_STATS_P6(field)					\
{								\
	"GBE_P6:"#field, GBENU_STATS6_MODULE,			\
	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
	offsetof(struct gbenu_hw_stats, field)			\
}

#define GBENU_STATS_P7(field)					\
{								\
	"GBE_P7:"#field, GBENU_STATS7_MODULE,			\
	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
	offsetof(struct gbenu_hw_stats, field)			\
}

#define GBENU_STATS_P8(field)					\
{								\
	"GBE_P8:"#field, GBENU_STATS8_MODULE,			\
	FIELD_SIZEOF(struct gbenu_hw_stats, field),		\
	offsetof(struct gbenu_hw_stats, field)			\
}

static const struct netcp_ethtool_stat gbenu_et_stats[] = {
	/* GBENU Host Module */
	GBENU_STATS_HOST(rx_good_frames),
	GBENU_STATS_HOST(rx_broadcast_frames),
	GBENU_STATS_HOST(rx_multicast_frames),
	GBENU_STATS_HOST(rx_crc_errors),
	GBENU_STATS_HOST(rx_oversized_frames),
	GBENU_STATS_HOST(rx_undersized_frames),
	GBENU_STATS_HOST(ale_drop),
	GBENU_STATS_HOST(ale_overrun_drop),
	GBENU_STATS_HOST(rx_bytes),
	GBENU_STATS_HOST(tx_good_frames),
	GBENU_STATS_HOST(tx_broadcast_frames),
	GBENU_STATS_HOST(tx_multicast_frames),
	GBENU_STATS_HOST(tx_bytes),
	GBENU_STATS_HOST(tx_64B_frames),
	GBENU_STATS_HOST(tx_65_to_127B_frames),
	GBENU_STATS_HOST(tx_128_to_255B_frames),
	GBENU_STATS_HOST(tx_256_to_511B_frames),
	GBENU_STATS_HOST(tx_512_to_1023B_frames),
	GBENU_STATS_HOST(tx_1024B_frames),
	GBENU_STATS_HOST(net_bytes),
	GBENU_STATS_HOST(rx_bottom_fifo_drop),
	GBENU_STATS_HOST(rx_port_mask_drop),
	GBENU_STATS_HOST(rx_top_fifo_drop),
	GBENU_STATS_HOST(ale_rate_limit_drop),
	GBENU_STATS_HOST(ale_vid_ingress_drop),
	GBENU_STATS_HOST(ale_da_eq_sa_drop),
	GBENU_STATS_HOST(ale_unknown_ucast),
	GBENU_STATS_HOST(ale_unknown_ucast_bytes),
	GBENU_STATS_HOST(ale_unknown_mcast),
	GBENU_STATS_HOST(ale_unknown_mcast_bytes),
	GBENU_STATS_HOST(ale_unknown_bcast),
	GBENU_STATS_HOST(ale_unknown_bcast_bytes),
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	GBENU_STATS_HOST(ale_pol_match),
	GBENU_STATS_HOST(ale_pol_match_red),
	GBENU_STATS_HOST(ale_pol_match_yellow),
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	GBENU_STATS_HOST(tx_mem_protect_err),
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	GBENU_STATS_HOST(tx_pri0_drop),
	GBENU_STATS_HOST(tx_pri1_drop),
	GBENU_STATS_HOST(tx_pri2_drop),
	GBENU_STATS_HOST(tx_pri3_drop),
	GBENU_STATS_HOST(tx_pri4_drop),
	GBENU_STATS_HOST(tx_pri5_drop),
	GBENU_STATS_HOST(tx_pri6_drop),
	GBENU_STATS_HOST(tx_pri7_drop),
	GBENU_STATS_HOST(tx_pri0_drop_bcnt),
	GBENU_STATS_HOST(tx_pri1_drop_bcnt),
	GBENU_STATS_HOST(tx_pri2_drop_bcnt),
	GBENU_STATS_HOST(tx_pri3_drop_bcnt),
	GBENU_STATS_HOST(tx_pri4_drop_bcnt),
	GBENU_STATS_HOST(tx_pri5_drop_bcnt),
	GBENU_STATS_HOST(tx_pri6_drop_bcnt),
	GBENU_STATS_HOST(tx_pri7_drop_bcnt),
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	/* GBENU Module 1 */
	GBENU_STATS_P1(rx_good_frames),
	GBENU_STATS_P1(rx_broadcast_frames),
	GBENU_STATS_P1(rx_multicast_frames),
	GBENU_STATS_P1(rx_pause_frames),
	GBENU_STATS_P1(rx_crc_errors),
	GBENU_STATS_P1(rx_align_code_errors),
	GBENU_STATS_P1(rx_oversized_frames),
	GBENU_STATS_P1(rx_jabber_frames),
	GBENU_STATS_P1(rx_undersized_frames),
	GBENU_STATS_P1(rx_fragments),
	GBENU_STATS_P1(ale_drop),
	GBENU_STATS_P1(ale_overrun_drop),
	GBENU_STATS_P1(rx_bytes),
	GBENU_STATS_P1(tx_good_frames),
	GBENU_STATS_P1(tx_broadcast_frames),
	GBENU_STATS_P1(tx_multicast_frames),
	GBENU_STATS_P1(tx_pause_frames),
	GBENU_STATS_P1(tx_deferred_frames),
	GBENU_STATS_P1(tx_collision_frames),
	GBENU_STATS_P1(tx_single_coll_frames),
	GBENU_STATS_P1(tx_mult_coll_frames),
	GBENU_STATS_P1(tx_excessive_collisions),
	GBENU_STATS_P1(tx_late_collisions),
	GBENU_STATS_P1(rx_ipg_error),
	GBENU_STATS_P1(tx_carrier_sense_errors),
	GBENU_STATS_P1(tx_bytes),
	GBENU_STATS_P1(tx_64B_frames),
	GBENU_STATS_P1(tx_65_to_127B_frames),
	GBENU_STATS_P1(tx_128_to_255B_frames),
	GBENU_STATS_P1(tx_256_to_511B_frames),
	GBENU_STATS_P1(tx_512_to_1023B_frames),
	GBENU_STATS_P1(tx_1024B_frames),
	GBENU_STATS_P1(net_bytes),
	GBENU_STATS_P1(rx_bottom_fifo_drop),
	GBENU_STATS_P1(rx_port_mask_drop),
	GBENU_STATS_P1(rx_top_fifo_drop),
	GBENU_STATS_P1(ale_rate_limit_drop),
	GBENU_STATS_P1(ale_vid_ingress_drop),
	GBENU_STATS_P1(ale_da_eq_sa_drop),
	GBENU_STATS_P1(ale_unknown_ucast),
	GBENU_STATS_P1(ale_unknown_ucast_bytes),
	GBENU_STATS_P1(ale_unknown_mcast),
	GBENU_STATS_P1(ale_unknown_mcast_bytes),
	GBENU_STATS_P1(ale_unknown_bcast),
	GBENU_STATS_P1(ale_unknown_bcast_bytes),
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	GBENU_STATS_P1(ale_pol_match),
	GBENU_STATS_P1(ale_pol_match_red),
	GBENU_STATS_P1(ale_pol_match_yellow),
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	GBENU_STATS_P1(tx_mem_protect_err),
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	GBENU_STATS_P1(tx_pri0_drop),
	GBENU_STATS_P1(tx_pri1_drop),
	GBENU_STATS_P1(tx_pri2_drop),
	GBENU_STATS_P1(tx_pri3_drop),
	GBENU_STATS_P1(tx_pri4_drop),
	GBENU_STATS_P1(tx_pri5_drop),
	GBENU_STATS_P1(tx_pri6_drop),
	GBENU_STATS_P1(tx_pri7_drop),
	GBENU_STATS_P1(tx_pri0_drop_bcnt),
	GBENU_STATS_P1(tx_pri1_drop_bcnt),
	GBENU_STATS_P1(tx_pri2_drop_bcnt),
	GBENU_STATS_P1(tx_pri3_drop_bcnt),
	GBENU_STATS_P1(tx_pri4_drop_bcnt),
	GBENU_STATS_P1(tx_pri5_drop_bcnt),
	GBENU_STATS_P1(tx_pri6_drop_bcnt),
	GBENU_STATS_P1(tx_pri7_drop_bcnt),
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	/* GBENU Module 2 */
	GBENU_STATS_P2(rx_good_frames),
	GBENU_STATS_P2(rx_broadcast_frames),
	GBENU_STATS_P2(rx_multicast_frames),
	GBENU_STATS_P2(rx_pause_frames),
	GBENU_STATS_P2(rx_crc_errors),
	GBENU_STATS_P2(rx_align_code_errors),
	GBENU_STATS_P2(rx_oversized_frames),
	GBENU_STATS_P2(rx_jabber_frames),
	GBENU_STATS_P2(rx_undersized_frames),
	GBENU_STATS_P2(rx_fragments),
	GBENU_STATS_P2(ale_drop),
	GBENU_STATS_P2(ale_overrun_drop),
	GBENU_STATS_P2(rx_bytes),
	GBENU_STATS_P2(tx_good_frames),
	GBENU_STATS_P2(tx_broadcast_frames),
	GBENU_STATS_P2(tx_multicast_frames),
	GBENU_STATS_P2(tx_pause_frames),
	GBENU_STATS_P2(tx_deferred_frames),
	GBENU_STATS_P2(tx_collision_frames),
	GBENU_STATS_P2(tx_single_coll_frames),
	GBENU_STATS_P2(tx_mult_coll_frames),
	GBENU_STATS_P2(tx_excessive_collisions),
	GBENU_STATS_P2(tx_late_collisions),
	GBENU_STATS_P2(rx_ipg_error),
	GBENU_STATS_P2(tx_carrier_sense_errors),
	GBENU_STATS_P2(tx_bytes),
	GBENU_STATS_P2(tx_64B_frames),
	GBENU_STATS_P2(tx_65_to_127B_frames),
	GBENU_STATS_P2(tx_128_to_255B_frames),
	GBENU_STATS_P2(tx_256_to_511B_frames),
	GBENU_STATS_P2(tx_512_to_1023B_frames),
	GBENU_STATS_P2(tx_1024B_frames),
	GBENU_STATS_P2(net_bytes),
	GBENU_STATS_P2(rx_bottom_fifo_drop),
	GBENU_STATS_P2(rx_port_mask_drop),
	GBENU_STATS_P2(rx_top_fifo_drop),
	GBENU_STATS_P2(ale_rate_limit_drop),
	GBENU_STATS_P2(ale_vid_ingress_drop),
	GBENU_STATS_P2(ale_da_eq_sa_drop),
	GBENU_STATS_P2(ale_unknown_ucast),
	GBENU_STATS_P2(ale_unknown_ucast_bytes),
	GBENU_STATS_P2(ale_unknown_mcast),
	GBENU_STATS_P2(ale_unknown_mcast_bytes),
	GBENU_STATS_P2(ale_unknown_bcast),
	GBENU_STATS_P2(ale_unknown_bcast_bytes),
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	GBENU_STATS_P2(ale_pol_match),
	GBENU_STATS_P2(ale_pol_match_red),
	GBENU_STATS_P2(ale_pol_match_yellow),
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	GBENU_STATS_P2(tx_mem_protect_err),
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	GBENU_STATS_P2(tx_pri0_drop),
	GBENU_STATS_P2(tx_pri1_drop),
	GBENU_STATS_P2(tx_pri2_drop),
	GBENU_STATS_P2(tx_pri3_drop),
	GBENU_STATS_P2(tx_pri4_drop),
	GBENU_STATS_P2(tx_pri5_drop),
	GBENU_STATS_P2(tx_pri6_drop),
	GBENU_STATS_P2(tx_pri7_drop),
	GBENU_STATS_P2(tx_pri0_drop_bcnt),
	GBENU_STATS_P2(tx_pri1_drop_bcnt),
	GBENU_STATS_P2(tx_pri2_drop_bcnt),
	GBENU_STATS_P2(tx_pri3_drop_bcnt),
	GBENU_STATS_P2(tx_pri4_drop_bcnt),
	GBENU_STATS_P2(tx_pri5_drop_bcnt),
	GBENU_STATS_P2(tx_pri6_drop_bcnt),
	GBENU_STATS_P2(tx_pri7_drop_bcnt),
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	/* GBENU Module 3 */
	GBENU_STATS_P3(rx_good_frames),
	GBENU_STATS_P3(rx_broadcast_frames),
	GBENU_STATS_P3(rx_multicast_frames),
	GBENU_STATS_P3(rx_pause_frames),
	GBENU_STATS_P3(rx_crc_errors),
	GBENU_STATS_P3(rx_align_code_errors),
	GBENU_STATS_P3(rx_oversized_frames),
	GBENU_STATS_P3(rx_jabber_frames),
	GBENU_STATS_P3(rx_undersized_frames),
	GBENU_STATS_P3(rx_fragments),
	GBENU_STATS_P3(ale_drop),
	GBENU_STATS_P3(ale_overrun_drop),
	GBENU_STATS_P3(rx_bytes),
	GBENU_STATS_P3(tx_good_frames),
	GBENU_STATS_P3(tx_broadcast_frames),
	GBENU_STATS_P3(tx_multicast_frames),
	GBENU_STATS_P3(tx_pause_frames),
	GBENU_STATS_P3(tx_deferred_frames),
	GBENU_STATS_P3(tx_collision_frames),
	GBENU_STATS_P3(tx_single_coll_frames),
	GBENU_STATS_P3(tx_mult_coll_frames),
	GBENU_STATS_P3(tx_excessive_collisions),
	GBENU_STATS_P3(tx_late_collisions),
	GBENU_STATS_P3(rx_ipg_error),
	GBENU_STATS_P3(tx_carrier_sense_errors),
	GBENU_STATS_P3(tx_bytes),
	GBENU_STATS_P3(tx_64B_frames),
	GBENU_STATS_P3(tx_65_to_127B_frames),
	GBENU_STATS_P3(tx_128_to_255B_frames),
	GBENU_STATS_P3(tx_256_to_511B_frames),
	GBENU_STATS_P3(tx_512_to_1023B_frames),
	GBENU_STATS_P3(tx_1024B_frames),
	GBENU_STATS_P3(net_bytes),
	GBENU_STATS_P3(rx_bottom_fifo_drop),
	GBENU_STATS_P3(rx_port_mask_drop),
	GBENU_STATS_P3(rx_top_fifo_drop),
	GBENU_STATS_P3(ale_rate_limit_drop),
	GBENU_STATS_P3(ale_vid_ingress_drop),
	GBENU_STATS_P3(ale_da_eq_sa_drop),
	GBENU_STATS_P3(ale_unknown_ucast),
	GBENU_STATS_P3(ale_unknown_ucast_bytes),
	GBENU_STATS_P3(ale_unknown_mcast),
	GBENU_STATS_P3(ale_unknown_mcast_bytes),
	GBENU_STATS_P3(ale_unknown_bcast),
	GBENU_STATS_P3(ale_unknown_bcast_bytes),
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	GBENU_STATS_P3(ale_pol_match),
	GBENU_STATS_P3(ale_pol_match_red),
	GBENU_STATS_P3(ale_pol_match_yellow),
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	GBENU_STATS_P3(tx_mem_protect_err),
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	GBENU_STATS_P3(tx_pri0_drop),
	GBENU_STATS_P3(tx_pri1_drop),
	GBENU_STATS_P3(tx_pri2_drop),
	GBENU_STATS_P3(tx_pri3_drop),
	GBENU_STATS_P3(tx_pri4_drop),
	GBENU_STATS_P3(tx_pri5_drop),
	GBENU_STATS_P3(tx_pri6_drop),
	GBENU_STATS_P3(tx_pri7_drop),
	GBENU_STATS_P3(tx_pri0_drop_bcnt),
	GBENU_STATS_P3(tx_pri1_drop_bcnt),
	GBENU_STATS_P3(tx_pri2_drop_bcnt),
	GBENU_STATS_P3(tx_pri3_drop_bcnt),
	GBENU_STATS_P3(tx_pri4_drop_bcnt),
	GBENU_STATS_P3(tx_pri5_drop_bcnt),
	GBENU_STATS_P3(tx_pri6_drop_bcnt),
	GBENU_STATS_P3(tx_pri7_drop_bcnt),
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	/* GBENU Module 4 */
	GBENU_STATS_P4(rx_good_frames),
	GBENU_STATS_P4(rx_broadcast_frames),
	GBENU_STATS_P4(rx_multicast_frames),
	GBENU_STATS_P4(rx_pause_frames),
	GBENU_STATS_P4(rx_crc_errors),
	GBENU_STATS_P4(rx_align_code_errors),
	GBENU_STATS_P4(rx_oversized_frames),
	GBENU_STATS_P4(rx_jabber_frames),
	GBENU_STATS_P4(rx_undersized_frames),
	GBENU_STATS_P4(rx_fragments),
	GBENU_STATS_P4(ale_drop),
	GBENU_STATS_P4(ale_overrun_drop),
	GBENU_STATS_P4(rx_bytes),
	GBENU_STATS_P4(tx_good_frames),
	GBENU_STATS_P4(tx_broadcast_frames),
	GBENU_STATS_P4(tx_multicast_frames),
	GBENU_STATS_P4(tx_pause_frames),
	GBENU_STATS_P4(tx_deferred_frames),
	GBENU_STATS_P4(tx_collision_frames),
	GBENU_STATS_P4(tx_single_coll_frames),
	GBENU_STATS_P4(tx_mult_coll_frames),
	GBENU_STATS_P4(tx_excessive_collisions),
	GBENU_STATS_P4(tx_late_collisions),
	GBENU_STATS_P4(rx_ipg_error),
	GBENU_STATS_P4(tx_carrier_sense_errors),
	GBENU_STATS_P4(tx_bytes),
	GBENU_STATS_P4(tx_64B_frames),
	GBENU_STATS_P4(tx_65_to_127B_frames),
	GBENU_STATS_P4(tx_128_to_255B_frames),
	GBENU_STATS_P4(tx_256_to_511B_frames),
	GBENU_STATS_P4(tx_512_to_1023B_frames),
	GBENU_STATS_P4(tx_1024B_frames),
	GBENU_STATS_P4(net_bytes),
	GBENU_STATS_P4(rx_bottom_fifo_drop),
	GBENU_STATS_P4(rx_port_mask_drop),
	GBENU_STATS_P4(rx_top_fifo_drop),
	GBENU_STATS_P4(ale_rate_limit_drop),
	GBENU_STATS_P4(ale_vid_ingress_drop),
	GBENU_STATS_P4(ale_da_eq_sa_drop),
	GBENU_STATS_P4(ale_unknown_ucast),
	GBENU_STATS_P4(ale_unknown_ucast_bytes),
	GBENU_STATS_P4(ale_unknown_mcast),
	GBENU_STATS_P4(ale_unknown_mcast_bytes),
	GBENU_STATS_P4(ale_unknown_bcast),
	GBENU_STATS_P4(ale_unknown_bcast_bytes),
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	GBENU_STATS_P4(ale_pol_match),
	GBENU_STATS_P4(ale_pol_match_red),
	GBENU_STATS_P4(ale_pol_match_yellow),
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	GBENU_STATS_P4(tx_mem_protect_err),
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	GBENU_STATS_P4(tx_pri0_drop),
	GBENU_STATS_P4(tx_pri1_drop),
	GBENU_STATS_P4(tx_pri2_drop),
	GBENU_STATS_P4(tx_pri3_drop),
	GBENU_STATS_P4(tx_pri4_drop),
	GBENU_STATS_P4(tx_pri5_drop),
	GBENU_STATS_P4(tx_pri6_drop),
	GBENU_STATS_P4(tx_pri7_drop),
	GBENU_STATS_P4(tx_pri0_drop_bcnt),
	GBENU_STATS_P4(tx_pri1_drop_bcnt),
	GBENU_STATS_P4(tx_pri2_drop_bcnt),
	GBENU_STATS_P4(tx_pri3_drop_bcnt),
	GBENU_STATS_P4(tx_pri4_drop_bcnt),
	GBENU_STATS_P4(tx_pri5_drop_bcnt),
	GBENU_STATS_P4(tx_pri6_drop_bcnt),
	GBENU_STATS_P4(tx_pri7_drop_bcnt),
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	/* GBENU Module 5 */
	GBENU_STATS_P5(rx_good_frames),
	GBENU_STATS_P5(rx_broadcast_frames),
	GBENU_STATS_P5(rx_multicast_frames),
	GBENU_STATS_P5(rx_pause_frames),
	GBENU_STATS_P5(rx_crc_errors),
	GBENU_STATS_P5(rx_align_code_errors),
	GBENU_STATS_P5(rx_oversized_frames),
	GBENU_STATS_P5(rx_jabber_frames),
	GBENU_STATS_P5(rx_undersized_frames),
	GBENU_STATS_P5(rx_fragments),
	GBENU_STATS_P5(ale_drop),
	GBENU_STATS_P5(ale_overrun_drop),
	GBENU_STATS_P5(rx_bytes),
	GBENU_STATS_P5(tx_good_frames),
	GBENU_STATS_P5(tx_broadcast_frames),
	GBENU_STATS_P5(tx_multicast_frames),
	GBENU_STATS_P5(tx_pause_frames),
	GBENU_STATS_P5(tx_deferred_frames),
	GBENU_STATS_P5(tx_collision_frames),
	GBENU_STATS_P5(tx_single_coll_frames),
	GBENU_STATS_P5(tx_mult_coll_frames),
	GBENU_STATS_P5(tx_excessive_collisions),
	GBENU_STATS_P5(tx_late_collisions),
	GBENU_STATS_P5(rx_ipg_error),
	GBENU_STATS_P5(tx_carrier_sense_errors),
	GBENU_STATS_P5(tx_bytes),
	GBENU_STATS_P5(tx_64B_frames),
	GBENU_STATS_P5(tx_65_to_127B_frames),
	GBENU_STATS_P5(tx_128_to_255B_frames),
	GBENU_STATS_P5(tx_256_to_511B_frames),
	GBENU_STATS_P5(tx_512_to_1023B_frames),
	GBENU_STATS_P5(tx_1024B_frames),
	GBENU_STATS_P5(net_bytes),
	GBENU_STATS_P5(rx_bottom_fifo_drop),
	GBENU_STATS_P5(rx_port_mask_drop),
	GBENU_STATS_P5(rx_top_fifo_drop),
	GBENU_STATS_P5(ale_rate_limit_drop),
	GBENU_STATS_P5(ale_vid_ingress_drop),
	GBENU_STATS_P5(ale_da_eq_sa_drop),
	GBENU_STATS_P5(ale_unknown_ucast),
	GBENU_STATS_P5(ale_unknown_ucast_bytes),
	GBENU_STATS_P5(ale_unknown_mcast),
	GBENU_STATS_P5(ale_unknown_mcast_bytes),
	GBENU_STATS_P5(ale_unknown_bcast),
	GBENU_STATS_P5(ale_unknown_bcast_bytes),
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	GBENU_STATS_P5(ale_pol_match),
	GBENU_STATS_P5(ale_pol_match_red),
	GBENU_STATS_P5(ale_pol_match_yellow),
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	GBENU_STATS_P5(tx_mem_protect_err),
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	GBENU_STATS_P5(tx_pri0_drop),
	GBENU_STATS_P5(tx_pri1_drop),
	GBENU_STATS_P5(tx_pri2_drop),
	GBENU_STATS_P5(tx_pri3_drop),
	GBENU_STATS_P5(tx_pri4_drop),
	GBENU_STATS_P5(tx_pri5_drop),
	GBENU_STATS_P5(tx_pri6_drop),
	GBENU_STATS_P5(tx_pri7_drop),
	GBENU_STATS_P5(tx_pri0_drop_bcnt),
	GBENU_STATS_P5(tx_pri1_drop_bcnt),
	GBENU_STATS_P5(tx_pri2_drop_bcnt),
	GBENU_STATS_P5(tx_pri3_drop_bcnt),
	GBENU_STATS_P5(tx_pri4_drop_bcnt),
	GBENU_STATS_P5(tx_pri5_drop_bcnt),
	GBENU_STATS_P5(tx_pri6_drop_bcnt),
	GBENU_STATS_P5(tx_pri7_drop_bcnt),
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	/* GBENU Module 6 */
	GBENU_STATS_P6(rx_good_frames),
	GBENU_STATS_P6(rx_broadcast_frames),
	GBENU_STATS_P6(rx_multicast_frames),
	GBENU_STATS_P6(rx_pause_frames),
	GBENU_STATS_P6(rx_crc_errors),
	GBENU_STATS_P6(rx_align_code_errors),
	GBENU_STATS_P6(rx_oversized_frames),
	GBENU_STATS_P6(rx_jabber_frames),
	GBENU_STATS_P6(rx_undersized_frames),
	GBENU_STATS_P6(rx_fragments),
	GBENU_STATS_P6(ale_drop),
	GBENU_STATS_P6(ale_overrun_drop),
	GBENU_STATS_P6(rx_bytes),
	GBENU_STATS_P6(tx_good_frames),
	GBENU_STATS_P6(tx_broadcast_frames),
	GBENU_STATS_P6(tx_multicast_frames),
	GBENU_STATS_P6(tx_pause_frames),
	GBENU_STATS_P6(tx_deferred_frames),
	GBENU_STATS_P6(tx_collision_frames),
	GBENU_STATS_P6(tx_single_coll_frames),
	GBENU_STATS_P6(tx_mult_coll_frames),
	GBENU_STATS_P6(tx_excessive_collisions),
	GBENU_STATS_P6(tx_late_collisions),
	GBENU_STATS_P6(rx_ipg_error),
	GBENU_STATS_P6(tx_carrier_sense_errors),
	GBENU_STATS_P6(tx_bytes),
	GBENU_STATS_P6(tx_64B_frames),
	GBENU_STATS_P6(tx_65_to_127B_frames),
	GBENU_STATS_P6(tx_128_to_255B_frames),
	GBENU_STATS_P6(tx_256_to_511B_frames),
	GBENU_STATS_P6(tx_512_to_1023B_frames),
	GBENU_STATS_P6(tx_1024B_frames),
	GBENU_STATS_P6(net_bytes),
	GBENU_STATS_P6(rx_bottom_fifo_drop),
	GBENU_STATS_P6(rx_port_mask_drop),
	GBENU_STATS_P6(rx_top_fifo_drop),
	GBENU_STATS_P6(ale_rate_limit_drop),
	GBENU_STATS_P6(ale_vid_ingress_drop),
	GBENU_STATS_P6(ale_da_eq_sa_drop),
	GBENU_STATS_P6(ale_unknown_ucast),
	GBENU_STATS_P6(ale_unknown_ucast_bytes),
	GBENU_STATS_P6(ale_unknown_mcast),
	GBENU_STATS_P6(ale_unknown_mcast_bytes),
	GBENU_STATS_P6(ale_unknown_bcast),
	GBENU_STATS_P6(ale_unknown_bcast_bytes),
1445 1446 1447
	GBENU_STATS_P6(ale_pol_match),
	GBENU_STATS_P6(ale_pol_match_red),
	GBENU_STATS_P6(ale_pol_match_yellow),
1448
	GBENU_STATS_P6(tx_mem_protect_err),
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	GBENU_STATS_P6(tx_pri0_drop),
	GBENU_STATS_P6(tx_pri1_drop),
	GBENU_STATS_P6(tx_pri2_drop),
	GBENU_STATS_P6(tx_pri3_drop),
	GBENU_STATS_P6(tx_pri4_drop),
	GBENU_STATS_P6(tx_pri5_drop),
	GBENU_STATS_P6(tx_pri6_drop),
	GBENU_STATS_P6(tx_pri7_drop),
	GBENU_STATS_P6(tx_pri0_drop_bcnt),
	GBENU_STATS_P6(tx_pri1_drop_bcnt),
	GBENU_STATS_P6(tx_pri2_drop_bcnt),
	GBENU_STATS_P6(tx_pri3_drop_bcnt),
	GBENU_STATS_P6(tx_pri4_drop_bcnt),
	GBENU_STATS_P6(tx_pri5_drop_bcnt),
	GBENU_STATS_P6(tx_pri6_drop_bcnt),
	GBENU_STATS_P6(tx_pri7_drop_bcnt),
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	/* GBENU Module 7 */
	GBENU_STATS_P7(rx_good_frames),
	GBENU_STATS_P7(rx_broadcast_frames),
	GBENU_STATS_P7(rx_multicast_frames),
	GBENU_STATS_P7(rx_pause_frames),
	GBENU_STATS_P7(rx_crc_errors),
	GBENU_STATS_P7(rx_align_code_errors),
	GBENU_STATS_P7(rx_oversized_frames),
	GBENU_STATS_P7(rx_jabber_frames),
	GBENU_STATS_P7(rx_undersized_frames),
	GBENU_STATS_P7(rx_fragments),
	GBENU_STATS_P7(ale_drop),
	GBENU_STATS_P7(ale_overrun_drop),
	GBENU_STATS_P7(rx_bytes),
	GBENU_STATS_P7(tx_good_frames),
	GBENU_STATS_P7(tx_broadcast_frames),
	GBENU_STATS_P7(tx_multicast_frames),
	GBENU_STATS_P7(tx_pause_frames),
	GBENU_STATS_P7(tx_deferred_frames),
	GBENU_STATS_P7(tx_collision_frames),
	GBENU_STATS_P7(tx_single_coll_frames),
	GBENU_STATS_P7(tx_mult_coll_frames),
	GBENU_STATS_P7(tx_excessive_collisions),
	GBENU_STATS_P7(tx_late_collisions),
	GBENU_STATS_P7(rx_ipg_error),
	GBENU_STATS_P7(tx_carrier_sense_errors),
	GBENU_STATS_P7(tx_bytes),
	GBENU_STATS_P7(tx_64B_frames),
	GBENU_STATS_P7(tx_65_to_127B_frames),
	GBENU_STATS_P7(tx_128_to_255B_frames),
	GBENU_STATS_P7(tx_256_to_511B_frames),
	GBENU_STATS_P7(tx_512_to_1023B_frames),
	GBENU_STATS_P7(tx_1024B_frames),
	GBENU_STATS_P7(net_bytes),
	GBENU_STATS_P7(rx_bottom_fifo_drop),
	GBENU_STATS_P7(rx_port_mask_drop),
	GBENU_STATS_P7(rx_top_fifo_drop),
	GBENU_STATS_P7(ale_rate_limit_drop),
	GBENU_STATS_P7(ale_vid_ingress_drop),
	GBENU_STATS_P7(ale_da_eq_sa_drop),
	GBENU_STATS_P7(ale_unknown_ucast),
	GBENU_STATS_P7(ale_unknown_ucast_bytes),
	GBENU_STATS_P7(ale_unknown_mcast),
	GBENU_STATS_P7(ale_unknown_mcast_bytes),
	GBENU_STATS_P7(ale_unknown_bcast),
	GBENU_STATS_P7(ale_unknown_bcast_bytes),
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	GBENU_STATS_P7(ale_pol_match),
	GBENU_STATS_P7(ale_pol_match_red),
	GBENU_STATS_P7(ale_pol_match_yellow),
1514
	GBENU_STATS_P7(tx_mem_protect_err),
1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530
	GBENU_STATS_P7(tx_pri0_drop),
	GBENU_STATS_P7(tx_pri1_drop),
	GBENU_STATS_P7(tx_pri2_drop),
	GBENU_STATS_P7(tx_pri3_drop),
	GBENU_STATS_P7(tx_pri4_drop),
	GBENU_STATS_P7(tx_pri5_drop),
	GBENU_STATS_P7(tx_pri6_drop),
	GBENU_STATS_P7(tx_pri7_drop),
	GBENU_STATS_P7(tx_pri0_drop_bcnt),
	GBENU_STATS_P7(tx_pri1_drop_bcnt),
	GBENU_STATS_P7(tx_pri2_drop_bcnt),
	GBENU_STATS_P7(tx_pri3_drop_bcnt),
	GBENU_STATS_P7(tx_pri4_drop_bcnt),
	GBENU_STATS_P7(tx_pri5_drop_bcnt),
	GBENU_STATS_P7(tx_pri6_drop_bcnt),
	GBENU_STATS_P7(tx_pri7_drop_bcnt),
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	/* GBENU Module 8 */
	GBENU_STATS_P8(rx_good_frames),
	GBENU_STATS_P8(rx_broadcast_frames),
	GBENU_STATS_P8(rx_multicast_frames),
	GBENU_STATS_P8(rx_pause_frames),
	GBENU_STATS_P8(rx_crc_errors),
	GBENU_STATS_P8(rx_align_code_errors),
	GBENU_STATS_P8(rx_oversized_frames),
	GBENU_STATS_P8(rx_jabber_frames),
	GBENU_STATS_P8(rx_undersized_frames),
	GBENU_STATS_P8(rx_fragments),
	GBENU_STATS_P8(ale_drop),
	GBENU_STATS_P8(ale_overrun_drop),
	GBENU_STATS_P8(rx_bytes),
	GBENU_STATS_P8(tx_good_frames),
	GBENU_STATS_P8(tx_broadcast_frames),
	GBENU_STATS_P8(tx_multicast_frames),
	GBENU_STATS_P8(tx_pause_frames),
	GBENU_STATS_P8(tx_deferred_frames),
	GBENU_STATS_P8(tx_collision_frames),
	GBENU_STATS_P8(tx_single_coll_frames),
	GBENU_STATS_P8(tx_mult_coll_frames),
	GBENU_STATS_P8(tx_excessive_collisions),
	GBENU_STATS_P8(tx_late_collisions),
	GBENU_STATS_P8(rx_ipg_error),
	GBENU_STATS_P8(tx_carrier_sense_errors),
	GBENU_STATS_P8(tx_bytes),
	GBENU_STATS_P8(tx_64B_frames),
	GBENU_STATS_P8(tx_65_to_127B_frames),
	GBENU_STATS_P8(tx_128_to_255B_frames),
	GBENU_STATS_P8(tx_256_to_511B_frames),
	GBENU_STATS_P8(tx_512_to_1023B_frames),
	GBENU_STATS_P8(tx_1024B_frames),
	GBENU_STATS_P8(net_bytes),
	GBENU_STATS_P8(rx_bottom_fifo_drop),
	GBENU_STATS_P8(rx_port_mask_drop),
	GBENU_STATS_P8(rx_top_fifo_drop),
	GBENU_STATS_P8(ale_rate_limit_drop),
	GBENU_STATS_P8(ale_vid_ingress_drop),
	GBENU_STATS_P8(ale_da_eq_sa_drop),
	GBENU_STATS_P8(ale_unknown_ucast),
	GBENU_STATS_P8(ale_unknown_ucast_bytes),
	GBENU_STATS_P8(ale_unknown_mcast),
	GBENU_STATS_P8(ale_unknown_mcast_bytes),
	GBENU_STATS_P8(ale_unknown_bcast),
	GBENU_STATS_P8(ale_unknown_bcast_bytes),
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	GBENU_STATS_P8(ale_pol_match),
	GBENU_STATS_P8(ale_pol_match_red),
	GBENU_STATS_P8(ale_pol_match_yellow),
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	GBENU_STATS_P8(tx_mem_protect_err),
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	GBENU_STATS_P8(tx_pri0_drop),
	GBENU_STATS_P8(tx_pri1_drop),
	GBENU_STATS_P8(tx_pri2_drop),
	GBENU_STATS_P8(tx_pri3_drop),
	GBENU_STATS_P8(tx_pri4_drop),
	GBENU_STATS_P8(tx_pri5_drop),
	GBENU_STATS_P8(tx_pri6_drop),
	GBENU_STATS_P8(tx_pri7_drop),
	GBENU_STATS_P8(tx_pri0_drop_bcnt),
	GBENU_STATS_P8(tx_pri1_drop_bcnt),
	GBENU_STATS_P8(tx_pri2_drop_bcnt),
	GBENU_STATS_P8(tx_pri3_drop_bcnt),
	GBENU_STATS_P8(tx_pri4_drop_bcnt),
	GBENU_STATS_P8(tx_pri5_drop_bcnt),
	GBENU_STATS_P8(tx_pri6_drop_bcnt),
	GBENU_STATS_P8(tx_pri7_drop_bcnt),
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};

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#define XGBE_STATS0_INFO(field)				\
{							\
	"GBE_0:"#field, XGBE_STATS0_MODULE,		\
	FIELD_SIZEOF(struct xgbe_hw_stats, field),	\
	offsetof(struct xgbe_hw_stats, field)		\
}

#define XGBE_STATS1_INFO(field)				\
{							\
	"GBE_1:"#field, XGBE_STATS1_MODULE,		\
	FIELD_SIZEOF(struct xgbe_hw_stats, field),	\
	offsetof(struct xgbe_hw_stats, field)		\
}

#define XGBE_STATS2_INFO(field)				\
{							\
	"GBE_2:"#field, XGBE_STATS2_MODULE,		\
	FIELD_SIZEOF(struct xgbe_hw_stats, field),	\
	offsetof(struct xgbe_hw_stats, field)		\
}
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static const struct netcp_ethtool_stat xgbe10_et_stats[] = {
	/* GBE module 0 */
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	XGBE_STATS0_INFO(rx_good_frames),
	XGBE_STATS0_INFO(rx_broadcast_frames),
	XGBE_STATS0_INFO(rx_multicast_frames),
	XGBE_STATS0_INFO(rx_oversized_frames),
	XGBE_STATS0_INFO(rx_undersized_frames),
	XGBE_STATS0_INFO(overrun_type4),
	XGBE_STATS0_INFO(overrun_type5),
	XGBE_STATS0_INFO(rx_bytes),
	XGBE_STATS0_INFO(tx_good_frames),
	XGBE_STATS0_INFO(tx_broadcast_frames),
	XGBE_STATS0_INFO(tx_multicast_frames),
	XGBE_STATS0_INFO(tx_bytes),
	XGBE_STATS0_INFO(tx_64byte_frames),
	XGBE_STATS0_INFO(tx_65_to_127byte_frames),
	XGBE_STATS0_INFO(tx_128_to_255byte_frames),
	XGBE_STATS0_INFO(tx_256_to_511byte_frames),
	XGBE_STATS0_INFO(tx_512_to_1023byte_frames),
	XGBE_STATS0_INFO(tx_1024byte_frames),
	XGBE_STATS0_INFO(net_bytes),
	XGBE_STATS0_INFO(rx_sof_overruns),
	XGBE_STATS0_INFO(rx_mof_overruns),
	XGBE_STATS0_INFO(rx_dma_overruns),
1644
	/* XGBE module 1 */
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	XGBE_STATS1_INFO(rx_good_frames),
	XGBE_STATS1_INFO(rx_broadcast_frames),
	XGBE_STATS1_INFO(rx_multicast_frames),
	XGBE_STATS1_INFO(rx_pause_frames),
	XGBE_STATS1_INFO(rx_crc_errors),
	XGBE_STATS1_INFO(rx_align_code_errors),
	XGBE_STATS1_INFO(rx_oversized_frames),
	XGBE_STATS1_INFO(rx_jabber_frames),
	XGBE_STATS1_INFO(rx_undersized_frames),
	XGBE_STATS1_INFO(rx_fragments),
	XGBE_STATS1_INFO(overrun_type4),
	XGBE_STATS1_INFO(overrun_type5),
	XGBE_STATS1_INFO(rx_bytes),
	XGBE_STATS1_INFO(tx_good_frames),
	XGBE_STATS1_INFO(tx_broadcast_frames),
	XGBE_STATS1_INFO(tx_multicast_frames),
	XGBE_STATS1_INFO(tx_pause_frames),
	XGBE_STATS1_INFO(tx_deferred_frames),
	XGBE_STATS1_INFO(tx_collision_frames),
	XGBE_STATS1_INFO(tx_single_coll_frames),
	XGBE_STATS1_INFO(tx_mult_coll_frames),
	XGBE_STATS1_INFO(tx_excessive_collisions),
	XGBE_STATS1_INFO(tx_late_collisions),
	XGBE_STATS1_INFO(tx_underrun),
	XGBE_STATS1_INFO(tx_carrier_sense_errors),
	XGBE_STATS1_INFO(tx_bytes),
	XGBE_STATS1_INFO(tx_64byte_frames),
	XGBE_STATS1_INFO(tx_65_to_127byte_frames),
	XGBE_STATS1_INFO(tx_128_to_255byte_frames),
	XGBE_STATS1_INFO(tx_256_to_511byte_frames),
	XGBE_STATS1_INFO(tx_512_to_1023byte_frames),
	XGBE_STATS1_INFO(tx_1024byte_frames),
	XGBE_STATS1_INFO(net_bytes),
	XGBE_STATS1_INFO(rx_sof_overruns),
	XGBE_STATS1_INFO(rx_mof_overruns),
	XGBE_STATS1_INFO(rx_dma_overruns),
1681
	/* XGBE module 2 */
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	XGBE_STATS2_INFO(rx_good_frames),
	XGBE_STATS2_INFO(rx_broadcast_frames),
	XGBE_STATS2_INFO(rx_multicast_frames),
	XGBE_STATS2_INFO(rx_pause_frames),
	XGBE_STATS2_INFO(rx_crc_errors),
	XGBE_STATS2_INFO(rx_align_code_errors),
	XGBE_STATS2_INFO(rx_oversized_frames),
	XGBE_STATS2_INFO(rx_jabber_frames),
	XGBE_STATS2_INFO(rx_undersized_frames),
	XGBE_STATS2_INFO(rx_fragments),
	XGBE_STATS2_INFO(overrun_type4),
	XGBE_STATS2_INFO(overrun_type5),
	XGBE_STATS2_INFO(rx_bytes),
	XGBE_STATS2_INFO(tx_good_frames),
	XGBE_STATS2_INFO(tx_broadcast_frames),
	XGBE_STATS2_INFO(tx_multicast_frames),
	XGBE_STATS2_INFO(tx_pause_frames),
	XGBE_STATS2_INFO(tx_deferred_frames),
	XGBE_STATS2_INFO(tx_collision_frames),
	XGBE_STATS2_INFO(tx_single_coll_frames),
	XGBE_STATS2_INFO(tx_mult_coll_frames),
	XGBE_STATS2_INFO(tx_excessive_collisions),
	XGBE_STATS2_INFO(tx_late_collisions),
	XGBE_STATS2_INFO(tx_underrun),
	XGBE_STATS2_INFO(tx_carrier_sense_errors),
	XGBE_STATS2_INFO(tx_bytes),
	XGBE_STATS2_INFO(tx_64byte_frames),
	XGBE_STATS2_INFO(tx_65_to_127byte_frames),
	XGBE_STATS2_INFO(tx_128_to_255byte_frames),
	XGBE_STATS2_INFO(tx_256_to_511byte_frames),
	XGBE_STATS2_INFO(tx_512_to_1023byte_frames),
	XGBE_STATS2_INFO(tx_1024byte_frames),
	XGBE_STATS2_INFO(net_bytes),
	XGBE_STATS2_INFO(rx_sof_overruns),
	XGBE_STATS2_INFO(rx_mof_overruns),
	XGBE_STATS2_INFO(rx_dma_overruns),
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};

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#define for_each_intf(i, priv) \
	list_for_each_entry((i), &(priv)->gbe_intf_head, gbe_intf_list)

#define for_each_sec_slave(slave, priv) \
	list_for_each_entry((slave), &(priv)->secondary_slaves, slave_list)

#define first_sec_slave(priv)					\
	list_first_entry(&priv->secondary_slaves, \
			struct gbe_slave, slave_list)

static void keystone_get_drvinfo(struct net_device *ndev,
				 struct ethtool_drvinfo *info)
{
	strncpy(info->driver, NETCP_DRIVER_NAME, sizeof(info->driver));
	strncpy(info->version, NETCP_DRIVER_VERSION, sizeof(info->version));
}

static u32 keystone_get_msglevel(struct net_device *ndev)
{
	struct netcp_intf *netcp = netdev_priv(ndev);

	return netcp->msg_enable;
}

static void keystone_set_msglevel(struct net_device *ndev, u32 value)
{
	struct netcp_intf *netcp = netdev_priv(ndev);

	netcp->msg_enable = value;
}

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static struct gbe_intf *keystone_get_intf_data(struct netcp_intf *netcp)
{
	struct gbe_intf *gbe_intf;

	gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
	if (!gbe_intf)
		gbe_intf = netcp_module_get_intf_data(&xgbe_module, netcp);

	return gbe_intf;
}

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static void keystone_get_stat_strings(struct net_device *ndev,
				      uint32_t stringset, uint8_t *data)
{
	struct netcp_intf *netcp = netdev_priv(ndev);
	struct gbe_intf *gbe_intf;
	struct gbe_priv *gbe_dev;
	int i;

1770
	gbe_intf = keystone_get_intf_data(netcp);
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	if (!gbe_intf)
		return;
	gbe_dev = gbe_intf->gbe_dev;

	switch (stringset) {
	case ETH_SS_STATS:
		for (i = 0; i < gbe_dev->num_et_stats; i++) {
			memcpy(data, gbe_dev->et_stats[i].desc,
			       ETH_GSTRING_LEN);
			data += ETH_GSTRING_LEN;
		}
		break;
	case ETH_SS_TEST:
		break;
	}
}

static int keystone_get_sset_count(struct net_device *ndev, int stringset)
{
	struct netcp_intf *netcp = netdev_priv(ndev);
	struct gbe_intf *gbe_intf;
	struct gbe_priv *gbe_dev;

1794
	gbe_intf = keystone_get_intf_data(netcp);
1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808
	if (!gbe_intf)
		return -EINVAL;
	gbe_dev = gbe_intf->gbe_dev;

	switch (stringset) {
	case ETH_SS_TEST:
		return 0;
	case ETH_SS_STATS:
		return gbe_dev->num_et_stats;
	default:
		return -EINVAL;
	}
}

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static void gbe_reset_mod_stats(struct gbe_priv *gbe_dev, int stats_mod)
{
	void __iomem *base = gbe_dev->hw_stats_regs[stats_mod];
	u32  __iomem *p_stats_entry;
	int i;

	for (i = 0; i < gbe_dev->num_et_stats; i++) {
		if (gbe_dev->et_stats[i].type == stats_mod) {
			p_stats_entry = base + gbe_dev->et_stats[i].offset;
			gbe_dev->hw_stats[i] = 0;
			gbe_dev->hw_stats_prev[i] = readl(p_stats_entry);
		}
	}
}

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static inline void gbe_update_hw_stats_entry(struct gbe_priv *gbe_dev,
					     int et_stats_entry)
1826 1827
{
	void __iomem *base = NULL;
1828 1829
	u32  __iomem *p_stats_entry;
	u32 curr, delta;
1830 1831 1832 1833 1834

	/* The hw_stats_regs pointers are already
	 * properly set to point to the right base:
	 */
	base = gbe_dev->hw_stats_regs[gbe_dev->et_stats[et_stats_entry].type];
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	p_stats_entry = base + gbe_dev->et_stats[et_stats_entry].offset;
	curr = readl(p_stats_entry);
	delta = curr - gbe_dev->hw_stats_prev[et_stats_entry];
	gbe_dev->hw_stats_prev[et_stats_entry] = curr;
	gbe_dev->hw_stats[et_stats_entry] += delta;
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}

static void gbe_update_stats(struct gbe_priv *gbe_dev, uint64_t *data)
{
1844 1845 1846
	int i;

	for (i = 0; i < gbe_dev->num_et_stats; i++) {
1847 1848
		gbe_update_hw_stats_entry(gbe_dev, i);

1849 1850 1851 1852 1853
		if (data)
			data[i] = gbe_dev->hw_stats[i];
	}
}

1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877
static inline void gbe_stats_mod_visible_ver14(struct gbe_priv *gbe_dev,
					       int stats_mod)
{
	u32 val;

	val = readl(GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));

	switch (stats_mod) {
	case GBE_STATSA_MODULE:
	case GBE_STATSB_MODULE:
		val &= ~GBE_STATS_CD_SEL;
		break;
	case GBE_STATSC_MODULE:
	case GBE_STATSD_MODULE:
		val |= GBE_STATS_CD_SEL;
		break;
	default:
		return;
	}

	/* make the stat module visible */
	writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
}

1878 1879 1880 1881 1882 1883
static void gbe_reset_mod_stats_ver14(struct gbe_priv *gbe_dev, int stats_mod)
{
	gbe_stats_mod_visible_ver14(gbe_dev, stats_mod);
	gbe_reset_mod_stats(gbe_dev, stats_mod);
}

1884 1885
static void gbe_update_stats_ver14(struct gbe_priv *gbe_dev, uint64_t *data)
{
1886 1887
	u32 half_num_et_stats = (gbe_dev->num_et_stats / 2);
	int et_entry, j, pair;
1888 1889

	for (pair = 0; pair < 2; pair++) {
1890 1891 1892 1893 1894 1895 1896 1897
		gbe_stats_mod_visible_ver14(gbe_dev, (pair ?
						      GBE_STATSC_MODULE :
						      GBE_STATSA_MODULE));

		for (j = 0; j < half_num_et_stats; j++) {
			et_entry = pair * half_num_et_stats + j;
			gbe_update_hw_stats_entry(gbe_dev, et_entry);

1898
			if (data)
1899
				data[et_entry] = gbe_dev->hw_stats[et_entry];
1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911
		}
	}
}

static void keystone_get_ethtool_stats(struct net_device *ndev,
				       struct ethtool_stats *stats,
				       uint64_t *data)
{
	struct netcp_intf *netcp = netdev_priv(ndev);
	struct gbe_intf *gbe_intf;
	struct gbe_priv *gbe_dev;

1912
	gbe_intf = keystone_get_intf_data(netcp);
1913 1914 1915 1916 1917
	if (!gbe_intf)
		return;

	gbe_dev = gbe_intf->gbe_dev;
	spin_lock_bh(&gbe_dev->hw_stats_lock);
1918 1919 1920 1921
	if (gbe_dev->ss_version == GBE_SS_VERSION_14)
		gbe_update_stats_ver14(gbe_dev, data);
	else
		gbe_update_stats(gbe_dev, data);
1922 1923 1924
	spin_unlock_bh(&gbe_dev->hw_stats_lock);
}

1925 1926
static int keystone_get_link_ksettings(struct net_device *ndev,
				       struct ethtool_link_ksettings *cmd)
1927 1928 1929 1930 1931 1932 1933 1934 1935
{
	struct netcp_intf *netcp = netdev_priv(ndev);
	struct phy_device *phy = ndev->phydev;
	struct gbe_intf *gbe_intf;
	int ret;

	if (!phy)
		return -EINVAL;

1936
	gbe_intf = keystone_get_intf_data(netcp);
1937 1938 1939 1940 1941 1942
	if (!gbe_intf)
		return -EINVAL;

	if (!gbe_intf->slave)
		return -EINVAL;

1943
	ret = phy_ethtool_ksettings_get(phy, cmd);
1944
	if (!ret)
1945
		cmd->base.port = gbe_intf->slave->phy_port_t;
1946 1947 1948 1949

	return ret;
}

1950 1951
static int keystone_set_link_ksettings(struct net_device *ndev,
				       const struct ethtool_link_ksettings *cmd)
1952 1953 1954 1955
{
	struct netcp_intf *netcp = netdev_priv(ndev);
	struct phy_device *phy = ndev->phydev;
	struct gbe_intf *gbe_intf;
1956 1957 1958 1959 1960 1961 1962 1963 1964
	u8 port = cmd->base.port;
	u32 advertising, supported;
	u32 features;

	ethtool_convert_link_mode_to_legacy_u32(&advertising,
						cmd->link_modes.advertising);
	ethtool_convert_link_mode_to_legacy_u32(&supported,
						cmd->link_modes.supported);
	features = advertising & supported;
1965 1966 1967 1968

	if (!phy)
		return -EINVAL;

1969
	gbe_intf = keystone_get_intf_data(netcp);
1970 1971 1972 1973 1974 1975
	if (!gbe_intf)
		return -EINVAL;

	if (!gbe_intf->slave)
		return -EINVAL;

1976 1977
	if (port != gbe_intf->slave->phy_port_t) {
		if ((port == PORT_TP) && !(features & ADVERTISED_TP))
1978 1979
			return -EINVAL;

1980
		if ((port == PORT_AUI) && !(features & ADVERTISED_AUI))
1981 1982
			return -EINVAL;

1983
		if ((port == PORT_BNC) && !(features & ADVERTISED_BNC))
1984 1985
			return -EINVAL;

1986
		if ((port == PORT_MII) && !(features & ADVERTISED_MII))
1987 1988
			return -EINVAL;

1989
		if ((port == PORT_FIBRE) && !(features & ADVERTISED_FIBRE))
1990 1991 1992
			return -EINVAL;
	}

1993 1994
	gbe_intf->slave->phy_port_t = port;
	return phy_ethtool_ksettings_set(phy, cmd);
1995 1996
}

1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039
#if IS_ENABLED(CONFIG_TI_CPTS)
static int keystone_get_ts_info(struct net_device *ndev,
				struct ethtool_ts_info *info)
{
	struct netcp_intf *netcp = netdev_priv(ndev);
	struct gbe_intf *gbe_intf;

	gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
	if (!gbe_intf || !gbe_intf->gbe_dev->cpts)
		return -EINVAL;

	info->so_timestamping =
		SOF_TIMESTAMPING_TX_HARDWARE |
		SOF_TIMESTAMPING_TX_SOFTWARE |
		SOF_TIMESTAMPING_RX_HARDWARE |
		SOF_TIMESTAMPING_RX_SOFTWARE |
		SOF_TIMESTAMPING_SOFTWARE |
		SOF_TIMESTAMPING_RAW_HARDWARE;
	info->phc_index = gbe_intf->gbe_dev->cpts->phc_index;
	info->tx_types =
		(1 << HWTSTAMP_TX_OFF) |
		(1 << HWTSTAMP_TX_ON);
	info->rx_filters =
		(1 << HWTSTAMP_FILTER_NONE) |
		(1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
		(1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
	return 0;
}
#else
static int keystone_get_ts_info(struct net_device *ndev,
				struct ethtool_ts_info *info)
{
	info->so_timestamping =
		SOF_TIMESTAMPING_TX_SOFTWARE |
		SOF_TIMESTAMPING_RX_SOFTWARE |
		SOF_TIMESTAMPING_SOFTWARE;
	info->phc_index = -1;
	info->tx_types = 0;
	info->rx_filters = 0;
	return 0;
}
#endif /* CONFIG_TI_CPTS */

2040 2041 2042 2043 2044 2045 2046 2047
static const struct ethtool_ops keystone_ethtool_ops = {
	.get_drvinfo		= keystone_get_drvinfo,
	.get_link		= ethtool_op_get_link,
	.get_msglevel		= keystone_get_msglevel,
	.set_msglevel		= keystone_set_msglevel,
	.get_strings		= keystone_get_stat_strings,
	.get_sset_count		= keystone_get_sset_count,
	.get_ethtool_stats	= keystone_get_ethtool_stats,
2048 2049
	.get_link_ksettings	= keystone_get_link_ksettings,
	.set_link_ksettings	= keystone_set_link_ksettings,
2050
	.get_ts_info		= keystone_get_ts_info,
2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083
};

#define mac_hi(mac)	(((mac)[0] << 0) | ((mac)[1] << 8) |	\
			 ((mac)[2] << 16) | ((mac)[3] << 24))
#define mac_lo(mac)	(((mac)[4] << 0) | ((mac)[5] << 8))

static void gbe_set_slave_mac(struct gbe_slave *slave,
			      struct gbe_intf *gbe_intf)
{
	struct net_device *ndev = gbe_intf->ndev;

	writel(mac_hi(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_hi));
	writel(mac_lo(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_lo));
}

static int gbe_get_slave_port(struct gbe_priv *priv, u32 slave_num)
{
	if (priv->host_port == 0)
		return slave_num + 1;

	return slave_num;
}

static void netcp_ethss_link_state_action(struct gbe_priv *gbe_dev,
					  struct net_device *ndev,
					  struct gbe_slave *slave,
					  int up)
{
	struct phy_device *phy = slave->phy;
	u32 mac_control = 0;

	if (up) {
		mac_control = slave->mac_control;
2084
		if (phy && (phy->speed == SPEED_1000)) {
2085
			mac_control |= MACSL_GIG_MODE;
2086 2087 2088 2089 2090
			mac_control &= ~MACSL_XGIG_MODE;
		} else if (phy && (phy->speed == SPEED_10000)) {
			mac_control |= MACSL_XGIG_MODE;
			mac_control &= ~MACSL_GIG_MODE;
		}
2091 2092 2093 2094 2095 2096 2097 2098

		writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
						 mac_control));

		cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
				     ALE_PORT_STATE,
				     ALE_PORT_STATE_FORWARD);

2099 2100 2101
		if (ndev && slave->open &&
		    slave->link_interface != SGMII_LINK_MAC_PHY &&
		    slave->link_interface != XGMII_LINK_MAC_PHY)
2102 2103 2104 2105 2106 2107 2108
			netif_carrier_on(ndev);
	} else {
		writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
						 mac_control));
		cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
				     ALE_PORT_STATE,
				     ALE_PORT_STATE_DISABLE);
2109 2110 2111
		if (ndev &&
		    slave->link_interface != SGMII_LINK_MAC_PHY &&
		    slave->link_interface != XGMII_LINK_MAC_PHY)
2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133
			netif_carrier_off(ndev);
	}

	if (phy)
		phy_print_status(phy);
}

static bool gbe_phy_link_status(struct gbe_slave *slave)
{
	 return !slave->phy || slave->phy->link;
}

static void netcp_ethss_update_link_state(struct gbe_priv *gbe_dev,
					  struct gbe_slave *slave,
					  struct net_device *ndev)
{
	int sp = slave->slave_num;
	int phy_link_state, sgmii_link_state = 1, link_state;

	if (!slave->open)
		return;

2134
	if (!SLAVE_LINK_IS_XGMII(slave)) {
2135 2136
		sgmii_link_state =
			netcp_sgmii_get_port_link(SGMII_BASE(gbe_dev, sp), sp);
2137 2138
	}

2139 2140 2141 2142 2143 2144 2145 2146
	phy_link_state = gbe_phy_link_status(slave);
	link_state = phy_link_state & sgmii_link_state;

	if (atomic_xchg(&slave->link_state, link_state) != link_state)
		netcp_ethss_link_state_action(gbe_dev, ndev, slave,
					      link_state);
}

2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159
static void xgbe_adjust_link(struct net_device *ndev)
{
	struct netcp_intf *netcp = netdev_priv(ndev);
	struct gbe_intf *gbe_intf;

	gbe_intf = netcp_module_get_intf_data(&xgbe_module, netcp);
	if (!gbe_intf)
		return;

	netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
				      ndev);
}

2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206
static void gbe_adjust_link(struct net_device *ndev)
{
	struct netcp_intf *netcp = netdev_priv(ndev);
	struct gbe_intf *gbe_intf;

	gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
	if (!gbe_intf)
		return;

	netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
				      ndev);
}

static void gbe_adjust_link_sec_slaves(struct net_device *ndev)
{
	struct gbe_priv *gbe_dev = netdev_priv(ndev);
	struct gbe_slave *slave;

	for_each_sec_slave(slave, gbe_dev)
		netcp_ethss_update_link_state(gbe_dev, slave, NULL);
}

/* Reset EMAC
 * Soft reset is set and polled until clear, or until a timeout occurs
 */
static int gbe_port_reset(struct gbe_slave *slave)
{
	u32 i, v;

	/* Set the soft reset bit */
	writel(SOFT_RESET, GBE_REG_ADDR(slave, emac_regs, soft_reset));

	/* Wait for the bit to clear */
	for (i = 0; i < DEVICE_EMACSL_RESET_POLL_COUNT; i++) {
		v = readl(GBE_REG_ADDR(slave, emac_regs, soft_reset));
		if ((v & SOFT_RESET_MASK) != SOFT_RESET)
			return 0;
	}

	/* Timeout on the reset */
	return GMACSL_RET_WARN_RESET_INCOMPLETE;
}

/* Configure EMAC */
static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
			    int max_rx_len)
{
2207
	void __iomem *rx_maxlen_reg;
2208 2209
	u32 xgmii_mode;

2210 2211 2212
	if (max_rx_len > NETCP_MAX_FRAME_SIZE)
		max_rx_len = NETCP_MAX_FRAME_SIZE;

2213 2214 2215 2216 2217 2218 2219 2220
	/* Enable correct MII mode at SS level */
	if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) &&
	    (slave->link_interface >= XGMII_LINK_MAC_PHY)) {
		xgmii_mode = readl(GBE_REG_ADDR(gbe_dev, ss_regs, control));
		xgmii_mode |= (1 << slave->slave_num);
		writel(xgmii_mode, GBE_REG_ADDR(gbe_dev, ss_regs, control));
	}

2221 2222 2223 2224 2225 2226
	if (IS_SS_ID_MU(gbe_dev))
		rx_maxlen_reg = GBE_REG_ADDR(slave, port_regs, rx_maxlen);
	else
		rx_maxlen_reg = GBE_REG_ADDR(slave, emac_regs, rx_maxlen);

	writel(max_rx_len, rx_maxlen_reg);
2227 2228 2229
	writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control));
}

2230 2231 2232 2233 2234 2235
static void gbe_sgmii_rtreset(struct gbe_priv *priv,
			      struct gbe_slave *slave, bool set)
{
	if (SLAVE_LINK_IS_XGMII(slave))
		return;

2236 2237
	netcp_sgmii_rtreset(SGMII_BASE(priv, slave->slave_num),
			    slave->slave_num, set);
2238 2239
}

2240 2241 2242 2243 2244
static void gbe_slave_stop(struct gbe_intf *intf)
{
	struct gbe_priv *gbe_dev = intf->gbe_dev;
	struct gbe_slave *slave = intf->slave;

2245
	gbe_sgmii_rtreset(gbe_dev, slave, true);
2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262
	gbe_port_reset(slave);
	/* Disable forwarding */
	cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
			     ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
	cpsw_ale_del_mcast(gbe_dev->ale, intf->ndev->broadcast,
			   1 << slave->port_num, 0, 0);

	if (!slave->phy)
		return;

	phy_stop(slave->phy);
	phy_disconnect(slave->phy);
	slave->phy = NULL;
}

static void gbe_sgmii_config(struct gbe_priv *priv, struct gbe_slave *slave)
{
2263 2264
	if (SLAVE_LINK_IS_XGMII(slave))
		return;
2265

2266 2267 2268
	netcp_sgmii_reset(SGMII_BASE(priv, slave->slave_num), slave->slave_num);
	netcp_sgmii_config(SGMII_BASE(priv, slave->slave_num), slave->slave_num,
			   slave->link_interface);
2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281
}

static int gbe_slave_open(struct gbe_intf *gbe_intf)
{
	struct gbe_priv *priv = gbe_intf->gbe_dev;
	struct gbe_slave *slave = gbe_intf->slave;
	phy_interface_t phy_mode;
	bool has_phy = false;

	void (*hndlr)(struct net_device *) = gbe_adjust_link;

	gbe_sgmii_config(priv, slave);
	gbe_port_reset(slave);
2282
	gbe_sgmii_rtreset(priv, slave, false);
2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301
	gbe_port_config(priv, slave, priv->rx_packet_max);
	gbe_set_slave_mac(slave, gbe_intf);
	/* enable forwarding */
	cpsw_ale_control_set(priv->ale, slave->port_num,
			     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
	cpsw_ale_add_mcast(priv->ale, gbe_intf->ndev->broadcast,
			   1 << slave->port_num, 0, 0, ALE_MCAST_FWD_2);

	if (slave->link_interface == SGMII_LINK_MAC_PHY) {
		has_phy = true;
		phy_mode = PHY_INTERFACE_MODE_SGMII;
		slave->phy_port_t = PORT_MII;
	} else if (slave->link_interface == XGMII_LINK_MAC_PHY) {
		has_phy = true;
		phy_mode = PHY_INTERFACE_MODE_NA;
		slave->phy_port_t = PORT_FIBRE;
	}

	if (has_phy) {
2302 2303 2304
		if (priv->ss_version == XGBE_SS_VERSION_10)
			hndlr = xgbe_adjust_link;

2305 2306 2307 2308 2309 2310 2311 2312 2313 2314
		slave->phy = of_phy_connect(gbe_intf->ndev,
					    slave->phy_node,
					    hndlr, 0,
					    phy_mode);
		if (!slave->phy) {
			dev_err(priv->dev, "phy not found on slave %d\n",
				slave->slave_num);
			return -ENODEV;
		}
		dev_dbg(priv->dev, "phy found: id is: 0x%s\n",
A
Andrew Lunn 已提交
2315
			phydev_name(slave->phy));
2316 2317 2318 2319 2320 2321 2322 2323 2324
		phy_start(slave->phy);
		phy_read_status(slave->phy);
	}
	return 0;
}

static void gbe_init_host_port(struct gbe_priv *priv)
{
	int bypass_en = 1;
2325 2326

	/* Host Tx Pri */
2327
	if (IS_SS_ID_NU(priv) || IS_SS_ID_XGBE(priv))
2328 2329 2330
		writel(HOST_TX_PRI_MAP_DEFAULT,
		       GBE_REG_ADDR(priv, host_port_regs, tx_pri_map));

2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493
	/* Max length register */
	writel(NETCP_MAX_FRAME_SIZE, GBE_REG_ADDR(priv, host_port_regs,
						  rx_maxlen));

	cpsw_ale_start(priv->ale);

	if (priv->enable_ale)
		bypass_en = 0;

	cpsw_ale_control_set(priv->ale, 0, ALE_BYPASS, bypass_en);

	cpsw_ale_control_set(priv->ale, 0, ALE_NO_PORT_VLAN, 1);

	cpsw_ale_control_set(priv->ale, priv->host_port,
			     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);

	cpsw_ale_control_set(priv->ale, 0,
			     ALE_PORT_UNKNOWN_VLAN_MEMBER,
			     GBE_PORT_MASK(priv->ale_ports));

	cpsw_ale_control_set(priv->ale, 0,
			     ALE_PORT_UNKNOWN_MCAST_FLOOD,
			     GBE_PORT_MASK(priv->ale_ports - 1));

	cpsw_ale_control_set(priv->ale, 0,
			     ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,
			     GBE_PORT_MASK(priv->ale_ports));

	cpsw_ale_control_set(priv->ale, 0,
			     ALE_PORT_UNTAGGED_EGRESS,
			     GBE_PORT_MASK(priv->ale_ports));
}

static void gbe_add_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
{
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
	u16 vlan_id;

	cpsw_ale_add_mcast(gbe_dev->ale, addr,
			   GBE_PORT_MASK(gbe_dev->ale_ports), 0, 0,
			   ALE_MCAST_FWD_2);
	for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
		cpsw_ale_add_mcast(gbe_dev->ale, addr,
				   GBE_PORT_MASK(gbe_dev->ale_ports),
				   ALE_VLAN, vlan_id, ALE_MCAST_FWD_2);
	}
}

static void gbe_add_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
{
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
	u16 vlan_id;

	cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);

	for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID)
		cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
				   ALE_VLAN, vlan_id);
}

static void gbe_del_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
{
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
	u16 vlan_id;

	cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, 0, 0);

	for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
		cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, ALE_VLAN, vlan_id);
	}
}

static void gbe_del_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
{
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
	u16 vlan_id;

	cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);

	for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
		cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
				   ALE_VLAN, vlan_id);
	}
}

static int gbe_add_addr(void *intf_priv, struct netcp_addr *naddr)
{
	struct gbe_intf *gbe_intf = intf_priv;
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;

	dev_dbg(gbe_dev->dev, "ethss adding address %pM, type %d\n",
		naddr->addr, naddr->type);

	switch (naddr->type) {
	case ADDR_MCAST:
	case ADDR_BCAST:
		gbe_add_mcast_addr(gbe_intf, naddr->addr);
		break;
	case ADDR_UCAST:
	case ADDR_DEV:
		gbe_add_ucast_addr(gbe_intf, naddr->addr);
		break;
	case ADDR_ANY:
		/* nothing to do for promiscuous */
	default:
		break;
	}

	return 0;
}

static int gbe_del_addr(void *intf_priv, struct netcp_addr *naddr)
{
	struct gbe_intf *gbe_intf = intf_priv;
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;

	dev_dbg(gbe_dev->dev, "ethss deleting address %pM, type %d\n",
		naddr->addr, naddr->type);

	switch (naddr->type) {
	case ADDR_MCAST:
	case ADDR_BCAST:
		gbe_del_mcast_addr(gbe_intf, naddr->addr);
		break;
	case ADDR_UCAST:
	case ADDR_DEV:
		gbe_del_ucast_addr(gbe_intf, naddr->addr);
		break;
	case ADDR_ANY:
		/* nothing to do for promiscuous */
	default:
		break;
	}

	return 0;
}

static int gbe_add_vid(void *intf_priv, int vid)
{
	struct gbe_intf *gbe_intf = intf_priv;
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;

	set_bit(vid, gbe_intf->active_vlans);

	cpsw_ale_add_vlan(gbe_dev->ale, vid,
			  GBE_PORT_MASK(gbe_dev->ale_ports),
			  GBE_MASK_NO_PORTS,
			  GBE_PORT_MASK(gbe_dev->ale_ports),
			  GBE_PORT_MASK(gbe_dev->ale_ports - 1));

	return 0;
}

static int gbe_del_vid(void *intf_priv, int vid)
{
	struct gbe_intf *gbe_intf = intf_priv;
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;

	cpsw_ale_del_vlan(gbe_dev->ale, vid, 0);
	clear_bit(vid, gbe_intf->active_vlans);
	return 0;
}

2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748
#if IS_ENABLED(CONFIG_TI_CPTS)
#define HAS_PHY_TXTSTAMP(p) ((p)->drv && (p)->drv->txtstamp)
#define HAS_PHY_RXTSTAMP(p) ((p)->drv && (p)->drv->rxtstamp)

static void gbe_txtstamp(void *context, struct sk_buff *skb)
{
	struct gbe_intf *gbe_intf = context;
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;

	cpts_tx_timestamp(gbe_dev->cpts, skb);
}

static bool gbe_need_txtstamp(struct gbe_intf *gbe_intf,
			      const struct netcp_packet *p_info)
{
	struct sk_buff *skb = p_info->skb;
	unsigned int class = ptp_classify_raw(skb);

	if (class == PTP_CLASS_NONE)
		return false;

	switch (class) {
	case PTP_CLASS_V1_IPV4:
	case PTP_CLASS_V1_IPV6:
	case PTP_CLASS_V2_IPV4:
	case PTP_CLASS_V2_IPV6:
	case PTP_CLASS_V2_L2:
	case (PTP_CLASS_V2_VLAN | PTP_CLASS_L2):
	case (PTP_CLASS_V2_VLAN | PTP_CLASS_IPV4):
	case (PTP_CLASS_V2_VLAN | PTP_CLASS_IPV6):
		return true;
	}

	return false;
}

static int gbe_txtstamp_mark_pkt(struct gbe_intf *gbe_intf,
				 struct netcp_packet *p_info)
{
	struct phy_device *phydev = p_info->skb->dev->phydev;
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;

	if (!(skb_shinfo(p_info->skb)->tx_flags & SKBTX_HW_TSTAMP) ||
	    !cpts_is_tx_enabled(gbe_dev->cpts))
		return 0;

	/* If phy has the txtstamp api, assume it will do it.
	 * We mark it here because skb_tx_timestamp() is called
	 * after all the txhooks are called.
	 */
	if (phydev && HAS_PHY_TXTSTAMP(phydev)) {
		skb_shinfo(p_info->skb)->tx_flags |= SKBTX_IN_PROGRESS;
		return 0;
	}

	if (gbe_need_txtstamp(gbe_intf, p_info)) {
		p_info->txtstamp = gbe_txtstamp;
		p_info->ts_context = (void *)gbe_intf;
		skb_shinfo(p_info->skb)->tx_flags |= SKBTX_IN_PROGRESS;
	}

	return 0;
}

static int gbe_rxtstamp(struct gbe_intf *gbe_intf, struct netcp_packet *p_info)
{
	struct phy_device *phydev = p_info->skb->dev->phydev;
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;

	if (p_info->rxtstamp_complete)
		return 0;

	if (phydev && HAS_PHY_RXTSTAMP(phydev)) {
		p_info->rxtstamp_complete = true;
		return 0;
	}

	cpts_rx_timestamp(gbe_dev->cpts, p_info->skb);
	p_info->rxtstamp_complete = true;

	return 0;
}

static int gbe_hwtstamp_get(struct gbe_intf *gbe_intf, struct ifreq *ifr)
{
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
	struct cpts *cpts = gbe_dev->cpts;
	struct hwtstamp_config cfg;

	if (!cpts)
		return -EOPNOTSUPP;

	cfg.flags = 0;
	cfg.tx_type = cpts_is_tx_enabled(cpts) ?
		      HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
	cfg.rx_filter = (cpts_is_rx_enabled(cpts) ?
			 cpts->rx_enable : HWTSTAMP_FILTER_NONE);

	return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
}

static void gbe_hwtstamp(struct gbe_intf *gbe_intf)
{
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
	struct gbe_slave *slave = gbe_intf->slave;
	u32 ts_en, seq_id, ctl;

	if (!cpts_is_rx_enabled(gbe_dev->cpts) &&
	    !cpts_is_tx_enabled(gbe_dev->cpts)) {
		writel(0, GBE_REG_ADDR(slave, port_regs, ts_ctl));
		return;
	}

	seq_id = (30 << TS_SEQ_ID_OFS_SHIFT) | ETH_P_1588;
	ts_en = EVENT_MSG_BITS << TS_MSG_TYPE_EN_SHIFT;
	ctl = ETH_P_1588 | TS_TTL_NONZERO |
		(slave->ts_ctl.dst_port_map << TS_CTL_DST_PORT_SHIFT) |
		(slave->ts_ctl.uni ?  TS_UNI_EN :
			slave->ts_ctl.maddr_map << TS_CTL_MADDR_SHIFT);

	if (cpts_is_tx_enabled(gbe_dev->cpts))
		ts_en |= (TS_TX_ANX_ALL_EN | TS_TX_VLAN_LT1_EN);

	if (cpts_is_rx_enabled(gbe_dev->cpts))
		ts_en |= (TS_RX_ANX_ALL_EN | TS_RX_VLAN_LT1_EN);

	writel(ts_en,  GBE_REG_ADDR(slave, port_regs, ts_ctl));
	writel(seq_id, GBE_REG_ADDR(slave, port_regs, ts_seq_ltype));
	writel(ctl,    GBE_REG_ADDR(slave, port_regs, ts_ctl_ltype2));
}

static int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *ifr)
{
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
	struct cpts *cpts = gbe_dev->cpts;
	struct hwtstamp_config cfg;

	if (!cpts)
		return -EOPNOTSUPP;

	if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
		return -EFAULT;

	/* reserved for future extensions */
	if (cfg.flags)
		return -EINVAL;

	switch (cfg.tx_type) {
	case HWTSTAMP_TX_OFF:
		cpts_tx_enable(cpts, 0);
		break;
	case HWTSTAMP_TX_ON:
		cpts_tx_enable(cpts, 1);
		break;
	default:
		return -ERANGE;
	}

	switch (cfg.rx_filter) {
	case HWTSTAMP_FILTER_NONE:
		cpts_rx_enable(cpts, 0);
		break;
	case HWTSTAMP_FILTER_ALL:
	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
		cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V1_L4_EVENT);
		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
		break;
	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
	case HWTSTAMP_FILTER_PTP_V2_EVENT:
	case HWTSTAMP_FILTER_PTP_V2_SYNC:
	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
		cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V2_EVENT);
		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
		break;
	default:
		return -ERANGE;
	}

	gbe_hwtstamp(gbe_intf);

	return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
}

static void gbe_register_cpts(struct gbe_priv *gbe_dev)
{
	if (!gbe_dev->cpts)
		return;

	if (gbe_dev->cpts_registered > 0)
		goto done;

	if (cpts_register(gbe_dev->cpts)) {
		dev_err(gbe_dev->dev, "error registering cpts device\n");
		return;
	}

done:
	++gbe_dev->cpts_registered;
}

static void gbe_unregister_cpts(struct gbe_priv *gbe_dev)
{
	if (!gbe_dev->cpts || (gbe_dev->cpts_registered <= 0))
		return;

	if (--gbe_dev->cpts_registered)
		return;

	cpts_unregister(gbe_dev->cpts);
}
#else
static inline int gbe_txtstamp_mark_pkt(struct gbe_intf *gbe_intf,
					struct netcp_packet *p_info)
{
	return 0;
}

static inline int gbe_rxtstamp(struct gbe_intf *gbe_intf,
			       struct netcp_packet *p_info)
{
	return 0;
}

static inline int gbe_hwtstamp(struct gbe_intf *gbe_intf,
			       struct ifreq *ifr, int cmd)
{
	return -EOPNOTSUPP;
}

static inline void gbe_register_cpts(struct gbe_priv *gbe_dev)
{
}

static inline void gbe_unregister_cpts(struct gbe_priv *gbe_dev)
{
}

static inline int gbe_hwtstamp_get(struct gbe_intf *gbe_intf, struct ifreq *req)
{
	return -EOPNOTSUPP;
}

static inline int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *req)
{
	return -EOPNOTSUPP;
}
#endif /* CONFIG_TI_CPTS */

2749 2750 2751 2752
static int gbe_ioctl(void *intf_priv, struct ifreq *req, int cmd)
{
	struct gbe_intf *gbe_intf = intf_priv;
	struct phy_device *phy = gbe_intf->slave->phy;
2753 2754 2755 2756 2757 2758 2759 2760 2761

	if (!phy || !phy->drv->hwtstamp) {
		switch (cmd) {
		case SIOCGHWTSTAMP:
			return gbe_hwtstamp_get(gbe_intf, req);
		case SIOCSHWTSTAMP:
			return gbe_hwtstamp_set(gbe_intf, req);
		}
	}
2762 2763

	if (phy)
2764
		return phy_mii_ioctl(phy, req, cmd);
2765

2766
	return -EOPNOTSUPP;
2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787
}

static void netcp_ethss_timer(unsigned long arg)
{
	struct gbe_priv *gbe_dev = (struct gbe_priv *)arg;
	struct gbe_intf *gbe_intf;
	struct gbe_slave *slave;

	/* Check & update SGMII link state of interfaces */
	for_each_intf(gbe_intf, gbe_dev) {
		if (!gbe_intf->slave->open)
			continue;
		netcp_ethss_update_link_state(gbe_dev, gbe_intf->slave,
					      gbe_intf->ndev);
	}

	/* Check & update SGMII link state of secondary ports */
	for_each_sec_slave(slave, gbe_dev) {
		netcp_ethss_update_link_state(gbe_dev, slave, NULL);
	}

2788 2789
	/* A timer runs as a BH, no need to block them */
	spin_lock(&gbe_dev->hw_stats_lock);
2790 2791 2792 2793 2794 2795

	if (gbe_dev->ss_version == GBE_SS_VERSION_14)
		gbe_update_stats_ver14(gbe_dev, NULL);
	else
		gbe_update_stats(gbe_dev, NULL);

2796
	spin_unlock(&gbe_dev->hw_stats_lock);
2797 2798 2799 2800 2801

	gbe_dev->timer.expires	= jiffies + GBE_TIMER_INTERVAL;
	add_timer(&gbe_dev->timer);
}

2802
static int gbe_txhook(int order, void *data, struct netcp_packet *p_info)
2803 2804 2805 2806
{
	struct gbe_intf *gbe_intf = data;

	p_info->tx_pipe = &gbe_intf->tx_pipe;
2807 2808 2809 2810 2811 2812 2813 2814 2815

	return gbe_txtstamp_mark_pkt(gbe_intf, p_info);
}

static int gbe_rxhook(int order, void *data, struct netcp_packet *p_info)
{
	struct gbe_intf *gbe_intf = data;

	return gbe_rxtstamp(gbe_intf, p_info);
2816 2817 2818 2819 2820 2821 2822 2823 2824
}

static int gbe_open(void *intf_priv, struct net_device *ndev)
{
	struct gbe_intf *gbe_intf = intf_priv;
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
	struct netcp_intf *netcp = netdev_priv(ndev);
	struct gbe_slave *slave = gbe_intf->slave;
	int port_num = slave->port_num;
2825
	u32 reg, val;
2826 2827 2828 2829 2830 2831 2832
	int ret;

	reg = readl(GBE_REG_ADDR(gbe_dev, switch_regs, id_ver));
	dev_dbg(gbe_dev->dev, "initializing gbe version %d.%d (%d) GBE identification value 0x%x\n",
		GBE_MAJOR_VERSION(reg), GBE_MINOR_VERSION(reg),
		GBE_RTL_VERSION(reg), GBE_IDENT(reg));

2833 2834
	/* For 10G and on NetCP 1.5, use directed to port */
	if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) || IS_SS_ID_MU(gbe_dev))
2835 2836
		gbe_intf->tx_pipe.flags = SWITCH_TO_PORT_IN_TAGINFO;

2837
	if (gbe_dev->enable_ale)
2838
		gbe_intf->tx_pipe.switch_to_port = 0;
2839
	else
2840
		gbe_intf->tx_pipe.switch_to_port = port_num;
2841

2842 2843
	dev_dbg(gbe_dev->dev,
		"opened TX channel %s: %p with to port %d, flags %d\n",
2844 2845
		gbe_intf->tx_pipe.dma_chan_name,
		gbe_intf->tx_pipe.dma_channel,
2846 2847
		gbe_intf->tx_pipe.switch_to_port,
		gbe_intf->tx_pipe.flags);
2848 2849 2850 2851 2852 2853 2854

	gbe_slave_stop(gbe_intf);

	/* disable priority elevation and enable statistics on all ports */
	writel(0, GBE_REG_ADDR(gbe_dev, switch_regs, ptype));

	/* Control register */
2855 2856 2857 2858 2859 2860
	val = GBE_CTL_P0_ENABLE;
	if (IS_SS_ID_MU(gbe_dev)) {
		val |= ETH_SW_CTL_P0_TX_CRC_REMOVE;
		netcp->hw_cap = ETH_SW_CAN_REMOVE_ETH_FCS;
	}
	writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, control));
2861 2862

	/* All statistics enabled and STAT AB visible by default */
2863 2864
	writel(gbe_dev->stats_en_mask, GBE_REG_ADDR(gbe_dev, switch_regs,
						    stat_port_en));
2865 2866 2867 2868 2869

	ret = gbe_slave_open(gbe_intf);
	if (ret)
		goto fail;

2870 2871
	netcp_register_txhook(netcp, GBE_TXHOOK_ORDER, gbe_txhook, gbe_intf);
	netcp_register_rxhook(netcp, GBE_RXHOOK_ORDER, gbe_rxhook, gbe_intf);
2872 2873 2874

	slave->open = true;
	netcp_ethss_update_link_state(gbe_dev, slave, ndev);
2875 2876 2877

	gbe_register_cpts(gbe_dev);

2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888
	return 0;

fail:
	gbe_slave_stop(gbe_intf);
	return ret;
}

static int gbe_close(void *intf_priv, struct net_device *ndev)
{
	struct gbe_intf *gbe_intf = intf_priv;
	struct netcp_intf *netcp = netdev_priv(ndev);
2889 2890 2891
	struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;

	gbe_unregister_cpts(gbe_dev);
2892 2893

	gbe_slave_stop(gbe_intf);
2894 2895 2896

	netcp_unregister_rxhook(netcp, GBE_RXHOOK_ORDER, gbe_rxhook, gbe_intf);
	netcp_unregister_txhook(netcp, GBE_TXHOOK_ORDER, gbe_txhook, gbe_intf);
2897 2898 2899 2900 2901 2902

	gbe_intf->slave->open = false;
	atomic_set(&gbe_intf->slave->link_state, NETCP_LINK_STATE_INVALID);
	return 0;
}

2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918
#if IS_ENABLED(CONFIG_TI_CPTS)
static void init_slave_ts_ctl(struct gbe_slave *slave)
{
	slave->ts_ctl.uni = 1;
	slave->ts_ctl.dst_port_map =
		(TS_CTL_DST_PORT >> TS_CTL_DST_PORT_SHIFT) & 0x3;
	slave->ts_ctl.maddr_map =
		(TS_CTL_MADDR_ALL >> TS_CTL_MADDR_SHIFT) & 0x1f;
}

#else
static void init_slave_ts_ctl(struct gbe_slave *slave)
{
}
#endif /* CONFIG_TI_CPTS */

2919 2920 2921 2922 2923
static int init_slave(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
		      struct device_node *node)
{
	int port_reg_num;
	u32 port_reg_ofs, emac_reg_ofs;
2924
	u32 port_reg_blk_sz, emac_reg_blk_sz;
2925 2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938

	if (of_property_read_u32(node, "slave-port", &slave->slave_num)) {
		dev_err(gbe_dev->dev, "missing slave-port parameter\n");
		return -EINVAL;
	}

	if (of_property_read_u32(node, "link-interface",
				 &slave->link_interface)) {
		dev_warn(gbe_dev->dev,
			 "missing link-interface value defaulting to 1G mac-phy link\n");
		slave->link_interface = SGMII_LINK_MAC_PHY;
	}

	slave->open = false;
2939 2940 2941
	if ((slave->link_interface == SGMII_LINK_MAC_PHY) ||
	    (slave->link_interface == XGMII_LINK_MAC_PHY))
		slave->phy_node = of_parse_phandle(node, "phy-handle", 0);
2942 2943
	slave->port_num = gbe_get_slave_port(gbe_dev, slave->slave_num);

2944 2945 2946 2947
	if (slave->link_interface >= XGMII_LINK_MAC_PHY)
		slave->mac_control = GBE_DEF_10G_MAC_CONTROL;
	else
		slave->mac_control = GBE_DEF_1G_MAC_CONTROL;
2948 2949 2950 2951 2952 2953 2954 2955 2956 2957

	/* Emac regs memmap are contiguous but port regs are not */
	port_reg_num = slave->slave_num;
	if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
		if (slave->slave_num > 1) {
			port_reg_ofs = GBE13_SLAVE_PORT2_OFFSET;
			port_reg_num -= 2;
		} else {
			port_reg_ofs = GBE13_SLAVE_PORT_OFFSET;
		}
2958 2959 2960 2961 2962 2963 2964 2965
		emac_reg_ofs = GBE13_EMAC_OFFSET;
		port_reg_blk_sz = 0x30;
		emac_reg_blk_sz = 0x40;
	} else if (IS_SS_ID_MU(gbe_dev)) {
		port_reg_ofs = GBENU_SLAVE_PORT_OFFSET;
		emac_reg_ofs = GBENU_EMAC_OFFSET;
		port_reg_blk_sz = 0x1000;
		emac_reg_blk_sz = 0x1000;
2966 2967
	} else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
		port_reg_ofs = XGBE10_SLAVE_PORT_OFFSET;
2968 2969 2970
		emac_reg_ofs = XGBE10_EMAC_OFFSET;
		port_reg_blk_sz = 0x30;
		emac_reg_blk_sz = 0x40;
2971 2972 2973 2974 2975 2976
	} else {
		dev_err(gbe_dev->dev, "unknown ethss(0x%x)\n",
			gbe_dev->ss_version);
		return -EINVAL;
	}

2977
	slave->port_regs = gbe_dev->switch_regs + port_reg_ofs +
2978
				(port_reg_blk_sz * port_reg_num);
2979
	slave->emac_regs = gbe_dev->switch_regs + emac_reg_ofs +
2980
				(emac_reg_blk_sz * slave->slave_num);
2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998

	if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
		/* Initialize  slave port register offsets */
		GBE_SET_REG_OFS(slave, port_regs, port_vlan);
		GBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
		GBE_SET_REG_OFS(slave, port_regs, sa_lo);
		GBE_SET_REG_OFS(slave, port_regs, sa_hi);
		GBE_SET_REG_OFS(slave, port_regs, ts_ctl);
		GBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
		GBE_SET_REG_OFS(slave, port_regs, ts_vlan);
		GBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
		GBE_SET_REG_OFS(slave, port_regs, ts_ctl2);

		/* Initialize EMAC register offsets */
		GBE_SET_REG_OFS(slave, emac_regs, mac_control);
		GBE_SET_REG_OFS(slave, emac_regs, soft_reset);
		GBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);

2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015
	} else if (IS_SS_ID_MU(gbe_dev)) {
		/* Initialize  slave port register offsets */
		GBENU_SET_REG_OFS(slave, port_regs, port_vlan);
		GBENU_SET_REG_OFS(slave, port_regs, tx_pri_map);
		GBENU_SET_REG_OFS(slave, port_regs, sa_lo);
		GBENU_SET_REG_OFS(slave, port_regs, sa_hi);
		GBENU_SET_REG_OFS(slave, port_regs, ts_ctl);
		GBENU_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
		GBENU_SET_REG_OFS(slave, port_regs, ts_vlan);
		GBENU_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
		GBENU_SET_REG_OFS(slave, port_regs, ts_ctl2);
		GBENU_SET_REG_OFS(slave, port_regs, rx_maxlen);

		/* Initialize EMAC register offsets */
		GBENU_SET_REG_OFS(slave, emac_regs, mac_control);
		GBENU_SET_REG_OFS(slave, emac_regs, soft_reset);

3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031
	} else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
		/* Initialize  slave port register offsets */
		XGBE_SET_REG_OFS(slave, port_regs, port_vlan);
		XGBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
		XGBE_SET_REG_OFS(slave, port_regs, sa_lo);
		XGBE_SET_REG_OFS(slave, port_regs, sa_hi);
		XGBE_SET_REG_OFS(slave, port_regs, ts_ctl);
		XGBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
		XGBE_SET_REG_OFS(slave, port_regs, ts_vlan);
		XGBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
		XGBE_SET_REG_OFS(slave, port_regs, ts_ctl2);

		/* Initialize EMAC register offsets */
		XGBE_SET_REG_OFS(slave, emac_regs, mac_control);
		XGBE_SET_REG_OFS(slave, emac_regs, soft_reset);
		XGBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);
3032 3033 3034
	}

	atomic_set(&slave->link_state, NETCP_LINK_STATE_INVALID);
3035 3036

	init_slave_ts_ctl(slave);
3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071
	return 0;
}

static void init_secondary_ports(struct gbe_priv *gbe_dev,
				 struct device_node *node)
{
	struct device *dev = gbe_dev->dev;
	phy_interface_t phy_mode;
	struct gbe_priv **priv;
	struct device_node *port;
	struct gbe_slave *slave;
	bool mac_phy_link = false;

	for_each_child_of_node(node, port) {
		slave = devm_kzalloc(dev, sizeof(*slave), GFP_KERNEL);
		if (!slave) {
			dev_err(dev,
				"memomry alloc failed for secondary port(%s), skipping...\n",
				port->name);
			continue;
		}

		if (init_slave(gbe_dev, slave, port)) {
			dev_err(dev,
				"Failed to initialize secondary port(%s), skipping...\n",
				port->name);
			devm_kfree(dev, slave);
			continue;
		}

		gbe_sgmii_config(gbe_dev, slave);
		gbe_port_reset(slave);
		gbe_port_config(gbe_dev, slave, gbe_dev->rx_packet_max);
		list_add_tail(&slave->slave_list, &gbe_dev->secondary_slaves);
		gbe_dev->num_slaves++;
3072 3073
		if ((slave->link_interface == SGMII_LINK_MAC_PHY) ||
		    (slave->link_interface == XGMII_LINK_MAC_PHY))
3074 3075 3076
			mac_phy_link = true;

		slave->open = true;
J
Julia Lawall 已提交
3077 3078
		if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves) {
			of_node_put(port);
3079
			break;
J
Julia Lawall 已提交
3080
		}
3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104 3105 3106
	}

	/* of_phy_connect() is needed only for MAC-PHY interface */
	if (!mac_phy_link)
		return;

	/* Allocate dummy netdev device for attaching to phy device */
	gbe_dev->dummy_ndev = alloc_netdev(sizeof(gbe_dev), "dummy",
					NET_NAME_UNKNOWN, ether_setup);
	if (!gbe_dev->dummy_ndev) {
		dev_err(dev,
			"Failed to allocate dummy netdev for secondary ports, skipping phy_connect()...\n");
		return;
	}
	priv = netdev_priv(gbe_dev->dummy_ndev);
	*priv = gbe_dev;

	if (slave->link_interface == SGMII_LINK_MAC_PHY) {
		phy_mode = PHY_INTERFACE_MODE_SGMII;
		slave->phy_port_t = PORT_MII;
	} else {
		phy_mode = PHY_INTERFACE_MODE_NA;
		slave->phy_port_t = PORT_FIBRE;
	}

	for_each_sec_slave(slave, gbe_dev) {
3107 3108
		if ((slave->link_interface != SGMII_LINK_MAC_PHY) &&
		    (slave->link_interface != XGMII_LINK_MAC_PHY))
3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120
			continue;
		slave->phy =
			of_phy_connect(gbe_dev->dummy_ndev,
				       slave->phy_node,
				       gbe_adjust_link_sec_slaves,
				       0, phy_mode);
		if (!slave->phy) {
			dev_err(dev, "phy not found for slave %d\n",
				slave->slave_num);
			slave->phy = NULL;
		} else {
			dev_dbg(dev, "phy found: id is: 0x%s\n",
A
Andrew Lunn 已提交
3121
				phydev_name(slave->phy));
3122 3123 3124 3125 3126 3127 3128 3129 3130 3131
			phy_start(slave->phy);
			phy_read_status(slave->phy);
		}
	}
}

static void free_secondary_ports(struct gbe_priv *gbe_dev)
{
	struct gbe_slave *slave;

3132
	while (!list_empty(&gbe_dev->secondary_slaves)) {
3133
		slave = first_sec_slave(gbe_dev);
3134

3135 3136 3137 3138 3139 3140 3141 3142
		if (slave->phy)
			phy_disconnect(slave->phy);
		list_del(&slave->slave_list);
	}
	if (gbe_dev->dummy_ndev)
		free_netdev(gbe_dev->dummy_ndev);
}

3143 3144 3145 3146 3147 3148 3149
static int set_xgbe_ethss10_priv(struct gbe_priv *gbe_dev,
				 struct device_node *node)
{
	struct resource res;
	void __iomem *regs;
	int ret, i;

3150
	ret = of_address_to_resource(node, XGBE_SS_REG_INDEX, &res);
3151
	if (ret) {
3152 3153 3154
		dev_err(gbe_dev->dev,
			"Can't xlate xgbe of node(%s) ss address at %d\n",
			node->name, XGBE_SS_REG_INDEX);
3155 3156 3157 3158 3159
		return ret;
	}

	regs = devm_ioremap_resource(gbe_dev->dev, &res);
	if (IS_ERR(regs)) {
3160
		dev_err(gbe_dev->dev, "Failed to map xgbe ss register base\n");
3161 3162 3163 3164
		return PTR_ERR(regs);
	}
	gbe_dev->ss_regs = regs;

3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179
	ret = of_address_to_resource(node, XGBE_SM_REG_INDEX, &res);
	if (ret) {
		dev_err(gbe_dev->dev,
			"Can't xlate xgbe of node(%s) sm address at %d\n",
			node->name, XGBE_SM_REG_INDEX);
		return ret;
	}

	regs = devm_ioremap_resource(gbe_dev->dev, &res);
	if (IS_ERR(regs)) {
		dev_err(gbe_dev->dev, "Failed to map xgbe sm register base\n");
		return PTR_ERR(regs);
	}
	gbe_dev->switch_regs = regs;

3180 3181
	ret = of_address_to_resource(node, XGBE_SERDES_REG_INDEX, &res);
	if (ret) {
3182 3183 3184
		dev_err(gbe_dev->dev,
			"Can't xlate xgbe serdes of node(%s) address at %d\n",
			node->name, XGBE_SERDES_REG_INDEX);
3185 3186 3187 3188 3189 3190 3191 3192 3193 3194
		return ret;
	}

	regs = devm_ioremap_resource(gbe_dev->dev, &res);
	if (IS_ERR(regs)) {
		dev_err(gbe_dev->dev, "Failed to map xgbe serdes register base\n");
		return PTR_ERR(regs);
	}
	gbe_dev->xgbe_serdes_regs = regs;

3195
	gbe_dev->num_stats_mods = gbe_dev->max_num_ports;
3196 3197 3198
	gbe_dev->et_stats = xgbe10_et_stats;
	gbe_dev->num_et_stats = ARRAY_SIZE(xgbe10_et_stats);

3199
	gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
3200 3201
					 gbe_dev->num_et_stats * sizeof(u64),
					 GFP_KERNEL);
3202 3203 3204 3205 3206
	if (!gbe_dev->hw_stats) {
		dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
		return -ENOMEM;
	}

3207 3208 3209 3210 3211 3212 3213 3214 3215 3216
	gbe_dev->hw_stats_prev =
		devm_kzalloc(gbe_dev->dev,
			     gbe_dev->num_et_stats * sizeof(u32),
			     GFP_KERNEL);
	if (!gbe_dev->hw_stats_prev) {
		dev_err(gbe_dev->dev,
			"hw_stats_prev memory allocation failed\n");
		return -ENOMEM;
	}

3217 3218 3219 3220 3221
	gbe_dev->ss_version = XGBE_SS_VERSION_10;
	gbe_dev->sgmii_port_regs = gbe_dev->ss_regs +
					XGBE10_SGMII_MODULE_OFFSET;
	gbe_dev->host_port_regs = gbe_dev->ss_regs + XGBE10_HOST_PORT_OFFSET;

3222
	for (i = 0; i < gbe_dev->max_num_ports; i++)
3223
		gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs +
3224 3225
			XGBE10_HW_STATS_OFFSET + (GBE_HW_STATS_REG_MAP_SZ * i);

3226
	gbe_dev->ale_reg = gbe_dev->switch_regs + XGBE10_ALE_OFFSET;
3227
	gbe_dev->cpts_reg = gbe_dev->switch_regs + XGBE10_CPTS_OFFSET;
3228
	gbe_dev->ale_ports = gbe_dev->max_num_ports;
3229 3230
	gbe_dev->host_port = XGBE10_HOST_PORT_NUM;
	gbe_dev->ale_entries = XGBE10_NUM_ALE_ENTRIES;
3231
	gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1;
3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250

	/* Subsystem registers */
	XGBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
	XGBE_SET_REG_OFS(gbe_dev, ss_regs, control);

	/* Switch module registers */
	XGBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
	XGBE_SET_REG_OFS(gbe_dev, switch_regs, control);
	XGBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
	XGBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
	XGBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);

	/* Host port registers */
	XGBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
	XGBE_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map);
	XGBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
	return 0;
}

3251 3252 3253 3254 3255 3256 3257
static int get_gbe_resource_version(struct gbe_priv *gbe_dev,
				    struct device_node *node)
{
	struct resource res;
	void __iomem *regs;
	int ret;

3258
	ret = of_address_to_resource(node, GBE_SS_REG_INDEX, &res);
3259
	if (ret) {
3260 3261 3262
		dev_err(gbe_dev->dev,
			"Can't translate of node(%s) of gbe ss address at %d\n",
			node->name, GBE_SS_REG_INDEX);
3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278
		return ret;
	}

	regs = devm_ioremap_resource(gbe_dev->dev, &res);
	if (IS_ERR(regs)) {
		dev_err(gbe_dev->dev, "Failed to map gbe register base\n");
		return PTR_ERR(regs);
	}
	gbe_dev->ss_regs = regs;
	gbe_dev->ss_version = readl(gbe_dev->ss_regs);
	return 0;
}

static int set_gbe_ethss14_priv(struct gbe_priv *gbe_dev,
				struct device_node *node)
{
3279
	struct resource res;
3280
	void __iomem *regs;
3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313
	int i, ret;

	ret = of_address_to_resource(node, GBE_SGMII34_REG_INDEX, &res);
	if (ret) {
		dev_err(gbe_dev->dev,
			"Can't translate of gbe node(%s) address at index %d\n",
			node->name, GBE_SGMII34_REG_INDEX);
		return ret;
	}

	regs = devm_ioremap_resource(gbe_dev->dev, &res);
	if (IS_ERR(regs)) {
		dev_err(gbe_dev->dev,
			"Failed to map gbe sgmii port34 register base\n");
		return PTR_ERR(regs);
	}
	gbe_dev->sgmii_port34_regs = regs;

	ret = of_address_to_resource(node, GBE_SM_REG_INDEX, &res);
	if (ret) {
		dev_err(gbe_dev->dev,
			"Can't translate of gbe node(%s) address at index %d\n",
			node->name, GBE_SM_REG_INDEX);
		return ret;
	}

	regs = devm_ioremap_resource(gbe_dev->dev, &res);
	if (IS_ERR(regs)) {
		dev_err(gbe_dev->dev,
			"Failed to map gbe switch module register base\n");
		return PTR_ERR(regs);
	}
	gbe_dev->switch_regs = regs;
3314

3315
	gbe_dev->num_stats_mods = gbe_dev->max_num_slaves;
3316 3317 3318
	gbe_dev->et_stats = gbe13_et_stats;
	gbe_dev->num_et_stats = ARRAY_SIZE(gbe13_et_stats);

3319
	gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
3320 3321
					 gbe_dev->num_et_stats * sizeof(u64),
					 GFP_KERNEL);
3322 3323 3324 3325 3326
	if (!gbe_dev->hw_stats) {
		dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
		return -ENOMEM;
	}

3327 3328 3329 3330 3331 3332 3333 3334 3335 3336
	gbe_dev->hw_stats_prev =
		devm_kzalloc(gbe_dev->dev,
			     gbe_dev->num_et_stats * sizeof(u32),
			     GFP_KERNEL);
	if (!gbe_dev->hw_stats_prev) {
		dev_err(gbe_dev->dev,
			"hw_stats_prev memory allocation failed\n");
		return -ENOMEM;
	}

3337 3338
	gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBE13_SGMII_MODULE_OFFSET;
	gbe_dev->host_port_regs = gbe_dev->switch_regs + GBE13_HOST_PORT_OFFSET;
3339

3340 3341 3342 3343
	/* K2HK has only 2 hw stats modules visible at a time, so
	 * module 0 & 2 points to one base and
	 * module 1 & 3 points to the other base
	 */
3344
	for (i = 0; i < gbe_dev->max_num_slaves; i++) {
3345 3346
		gbe_dev->hw_stats_regs[i] =
			gbe_dev->switch_regs + GBE13_HW_STATS_OFFSET +
3347
			(GBE_HW_STATS_REG_MAP_SZ * (i & 0x1));
3348
	}
3349

3350
	gbe_dev->cpts_reg = gbe_dev->switch_regs + GBE13_CPTS_OFFSET;
3351
	gbe_dev->ale_reg = gbe_dev->switch_regs + GBE13_ALE_OFFSET;
3352
	gbe_dev->ale_ports = gbe_dev->max_num_ports;
3353 3354
	gbe_dev->host_port = GBE13_HOST_PORT_NUM;
	gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES;
3355
	gbe_dev->stats_en_mask = GBE13_REG_VAL_STAT_ENABLE_ALL;
3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373

	/* Subsystem registers */
	GBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);

	/* Switch module registers */
	GBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
	GBE_SET_REG_OFS(gbe_dev, switch_regs, control);
	GBE_SET_REG_OFS(gbe_dev, switch_regs, soft_reset);
	GBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
	GBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
	GBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);

	/* Host port registers */
	GBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
	GBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
	return 0;
}

3374 3375 3376 3377 3378 3379 3380
static int set_gbenu_ethss_priv(struct gbe_priv *gbe_dev,
				struct device_node *node)
{
	struct resource res;
	void __iomem *regs;
	int i, ret;

3381
	gbe_dev->num_stats_mods = gbe_dev->max_num_ports;
3382 3383 3384 3385 3386 3387 3388 3389 3390
	gbe_dev->et_stats = gbenu_et_stats;

	if (IS_SS_ID_NU(gbe_dev))
		gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE +
			(gbe_dev->max_num_slaves * GBENU_ET_STATS_PORT_SIZE);
	else
		gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE +
					GBENU_ET_STATS_PORT_SIZE;

3391
	gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
3392 3393
					 gbe_dev->num_et_stats * sizeof(u64),
					 GFP_KERNEL);
3394 3395 3396 3397 3398
	if (!gbe_dev->hw_stats) {
		dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
		return -ENOMEM;
	}

3399 3400 3401 3402 3403 3404 3405 3406 3407 3408
	gbe_dev->hw_stats_prev =
		devm_kzalloc(gbe_dev->dev,
			     gbe_dev->num_et_stats * sizeof(u32),
			     GFP_KERNEL);
	if (!gbe_dev->hw_stats_prev) {
		dev_err(gbe_dev->dev,
			"hw_stats_prev memory allocation failed\n");
		return -ENOMEM;
	}

3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421 3422 3423 3424 3425
	ret = of_address_to_resource(node, GBENU_SM_REG_INDEX, &res);
	if (ret) {
		dev_err(gbe_dev->dev,
			"Can't translate of gbenu node(%s) addr at index %d\n",
			node->name, GBENU_SM_REG_INDEX);
		return ret;
	}

	regs = devm_ioremap_resource(gbe_dev->dev, &res);
	if (IS_ERR(regs)) {
		dev_err(gbe_dev->dev,
			"Failed to map gbenu switch module register base\n");
		return PTR_ERR(regs);
	}
	gbe_dev->switch_regs = regs;

	gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBENU_SGMII_MODULE_OFFSET;
3426 3427 3428 3429 3430 3431 3432 3433

	/* Although sgmii modules are mem mapped to one contiguous
	 * region on GBENU devices, setting sgmii_port34_regs allows
	 * consistent code when accessing sgmii api
	 */
	gbe_dev->sgmii_port34_regs = gbe_dev->sgmii_port_regs +
				     (2 * GBENU_SGMII_MODULE_SIZE);

3434 3435 3436 3437 3438 3439
	gbe_dev->host_port_regs = gbe_dev->switch_regs + GBENU_HOST_PORT_OFFSET;

	for (i = 0; i < (gbe_dev->max_num_ports); i++)
		gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs +
			GBENU_HW_STATS_OFFSET + (GBENU_HW_STATS_REG_MAP_SZ * i);

3440
	gbe_dev->cpts_reg = gbe_dev->switch_regs + GBENU_CPTS_OFFSET;
3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467
	gbe_dev->ale_reg = gbe_dev->switch_regs + GBENU_ALE_OFFSET;
	gbe_dev->ale_ports = gbe_dev->max_num_ports;
	gbe_dev->host_port = GBENU_HOST_PORT_NUM;
	gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES;
	gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1;

	/* Subsystem registers */
	GBENU_SET_REG_OFS(gbe_dev, ss_regs, id_ver);

	/* Switch module registers */
	GBENU_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
	GBENU_SET_REG_OFS(gbe_dev, switch_regs, control);
	GBENU_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
	GBENU_SET_REG_OFS(gbe_dev, switch_regs, ptype);

	/* Host port registers */
	GBENU_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
	GBENU_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);

	/* For NU only.  2U does not need tx_pri_map.
	 * NU cppi port 0 tx pkt streaming interface has (n-1)*8 egress threads
	 * while 2U has only 1 such thread
	 */
	GBENU_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map);
	return 0;
}

3468 3469 3470 3471 3472 3473 3474 3475
static int gbe_probe(struct netcp_device *netcp_device, struct device *dev,
		     struct device_node *node, void **inst_priv)
{
	struct device_node *interfaces, *interface;
	struct device_node *secondary_ports;
	struct cpsw_ale_params ale_params;
	struct gbe_priv *gbe_dev;
	u32 slave_num;
3476
	int i, ret = 0;
3477 3478 3479 3480 3481 3482 3483 3484 3485 3486

	if (!node) {
		dev_err(dev, "device tree info unavailable\n");
		return -ENODEV;
	}

	gbe_dev = devm_kzalloc(dev, sizeof(struct gbe_priv), GFP_KERNEL);
	if (!gbe_dev)
		return -ENOMEM;

3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501
	if (of_device_is_compatible(node, "ti,netcp-gbe-5") ||
	    of_device_is_compatible(node, "ti,netcp-gbe")) {
		gbe_dev->max_num_slaves = 4;
	} else if (of_device_is_compatible(node, "ti,netcp-gbe-9")) {
		gbe_dev->max_num_slaves = 8;
	} else if (of_device_is_compatible(node, "ti,netcp-gbe-2")) {
		gbe_dev->max_num_slaves = 1;
	} else if (of_device_is_compatible(node, "ti,netcp-xgbe")) {
		gbe_dev->max_num_slaves = 2;
	} else {
		dev_err(dev, "device tree node for unknown device\n");
		return -EINVAL;
	}
	gbe_dev->max_num_ports = gbe_dev->max_num_slaves + 1;

3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527
	gbe_dev->dev = dev;
	gbe_dev->netcp_device = netcp_device;
	gbe_dev->rx_packet_max = NETCP_MAX_FRAME_SIZE;

	/* init the hw stats lock */
	spin_lock_init(&gbe_dev->hw_stats_lock);

	if (of_find_property(node, "enable-ale", NULL)) {
		gbe_dev->enable_ale = true;
		dev_info(dev, "ALE enabled\n");
	} else {
		gbe_dev->enable_ale = false;
		dev_dbg(dev, "ALE bypass enabled*\n");
	}

	ret = of_property_read_u32(node, "tx-queue",
				   &gbe_dev->tx_queue_id);
	if (ret < 0) {
		dev_err(dev, "missing tx_queue parameter\n");
		gbe_dev->tx_queue_id = GBE_TX_QUEUE;
	}

	ret = of_property_read_string(node, "tx-channel",
				      &gbe_dev->dma_chan_name);
	if (ret < 0) {
		dev_err(dev, "missing \"tx-channel\" parameter\n");
3528
		return -EINVAL;
3529 3530 3531 3532 3533
	}

	if (!strcmp(node->name, "gbe")) {
		ret = get_gbe_resource_version(gbe_dev, node);
		if (ret)
3534
			return ret;
3535

3536 3537 3538 3539 3540 3541 3542 3543 3544
		dev_dbg(dev, "ss_version: 0x%08x\n", gbe_dev->ss_version);

		if (gbe_dev->ss_version == GBE_SS_VERSION_14)
			ret = set_gbe_ethss14_priv(gbe_dev, node);
		else if (IS_SS_ID_MU(gbe_dev))
			ret = set_gbenu_ethss_priv(gbe_dev, node);
		else
			ret = -ENODEV;

3545 3546 3547
	} else if (!strcmp(node->name, "xgbe")) {
		ret = set_xgbe_ethss10_priv(gbe_dev, node);
		if (ret)
3548
			return ret;
3549 3550
		ret = netcp_xgbe_serdes_init(gbe_dev->xgbe_serdes_regs,
					     gbe_dev->ss_regs);
3551 3552 3553 3554 3555
	} else {
		dev_err(dev, "unknown GBE node(%s)\n", node->name);
		ret = -ENODEV;
	}

3556 3557 3558
	if (ret)
		return ret;

3559 3560 3561 3562 3563 3564 3565
	interfaces = of_get_child_by_name(node, "interfaces");
	if (!interfaces)
		dev_err(dev, "could not find interfaces\n");

	ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device,
				gbe_dev->dma_chan_name, gbe_dev->tx_queue_id);
	if (ret)
3566
		return ret;
3567 3568 3569

	ret = netcp_txpipe_open(&gbe_dev->tx_pipe);
	if (ret)
3570
		return ret;
3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581

	/* Create network interfaces */
	INIT_LIST_HEAD(&gbe_dev->gbe_intf_head);
	for_each_child_of_node(interfaces, interface) {
		ret = of_property_read_u32(interface, "slave-port", &slave_num);
		if (ret) {
			dev_err(dev, "missing slave-port parameter, skipping interface configuration for %s\n",
				interface->name);
			continue;
		}
		gbe_dev->num_slaves++;
J
Julia Lawall 已提交
3582 3583
		if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves) {
			of_node_put(interface);
3584
			break;
J
Julia Lawall 已提交
3585
		}
3586
	}
3587
	of_node_put(interfaces);
3588 3589 3590 3591 3592 3593 3594

	if (!gbe_dev->num_slaves)
		dev_warn(dev, "No network interface configured\n");

	/* Initialize Secondary slave ports */
	secondary_ports = of_get_child_by_name(node, "secondary-slave-ports");
	INIT_LIST_HEAD(&gbe_dev->secondary_slaves);
3595
	if (secondary_ports && (gbe_dev->num_slaves <  gbe_dev->max_num_slaves))
3596 3597 3598 3599
		init_secondary_ports(gbe_dev, secondary_ports);
	of_node_put(secondary_ports);

	if (!gbe_dev->num_slaves) {
3600 3601
		dev_err(dev,
			"No network interface or secondary ports configured\n");
3602
		ret = -ENODEV;
3603
		goto free_sec_ports;
3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616
	}

	memset(&ale_params, 0, sizeof(ale_params));
	ale_params.dev		= gbe_dev->dev;
	ale_params.ale_regs	= gbe_dev->ale_reg;
	ale_params.ale_ageout	= GBE_DEFAULT_ALE_AGEOUT;
	ale_params.ale_entries	= gbe_dev->ale_entries;
	ale_params.ale_ports	= gbe_dev->ale_ports;

	gbe_dev->ale = cpsw_ale_create(&ale_params);
	if (!gbe_dev->ale) {
		dev_err(gbe_dev->dev, "error initializing ale engine\n");
		ret = -ENODEV;
3617
		goto free_sec_ports;
3618 3619 3620 3621
	} else {
		dev_dbg(gbe_dev->dev, "Created a gbe ale engine\n");
	}

3622 3623 3624 3625 3626 3627
	gbe_dev->cpts = cpts_create(gbe_dev->dev, gbe_dev->cpts_reg, node);
	if (IS_ENABLED(CONFIG_TI_CPTS) && IS_ERR(gbe_dev->cpts)) {
		ret = PTR_ERR(gbe_dev->cpts);
		goto free_sec_ports;
	}

3628 3629 3630
	/* initialize host port */
	gbe_init_host_port(gbe_dev);

3631 3632 3633 3634 3635 3636 3637 3638 3639
	spin_lock_bh(&gbe_dev->hw_stats_lock);
	for (i = 0; i < gbe_dev->num_stats_mods; i++) {
		if (gbe_dev->ss_version == GBE_SS_VERSION_14)
			gbe_reset_mod_stats_ver14(gbe_dev, i);
		else
			gbe_reset_mod_stats(gbe_dev, i);
	}
	spin_unlock_bh(&gbe_dev->hw_stats_lock);

3640 3641 3642 3643 3644 3645 3646 3647
	init_timer(&gbe_dev->timer);
	gbe_dev->timer.data	 = (unsigned long)gbe_dev;
	gbe_dev->timer.function = netcp_ethss_timer;
	gbe_dev->timer.expires	 = jiffies + GBE_TIMER_INTERVAL;
	add_timer(&gbe_dev->timer);
	*inst_priv = gbe_dev;
	return 0;

3648 3649
free_sec_ports:
	free_secondary_ports(gbe_dev);
3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714 3715
	return ret;
}

static int gbe_attach(void *inst_priv, struct net_device *ndev,
		      struct device_node *node, void **intf_priv)
{
	struct gbe_priv *gbe_dev = inst_priv;
	struct gbe_intf *gbe_intf;
	int ret;

	if (!node) {
		dev_err(gbe_dev->dev, "interface node not available\n");
		return -ENODEV;
	}

	gbe_intf = devm_kzalloc(gbe_dev->dev, sizeof(*gbe_intf), GFP_KERNEL);
	if (!gbe_intf)
		return -ENOMEM;

	gbe_intf->ndev = ndev;
	gbe_intf->dev = gbe_dev->dev;
	gbe_intf->gbe_dev = gbe_dev;

	gbe_intf->slave = devm_kzalloc(gbe_dev->dev,
					sizeof(*gbe_intf->slave),
					GFP_KERNEL);
	if (!gbe_intf->slave) {
		ret = -ENOMEM;
		goto fail;
	}

	if (init_slave(gbe_dev, gbe_intf->slave, node)) {
		ret = -ENODEV;
		goto fail;
	}

	gbe_intf->tx_pipe = gbe_dev->tx_pipe;
	ndev->ethtool_ops = &keystone_ethtool_ops;
	list_add_tail(&gbe_intf->gbe_intf_list, &gbe_dev->gbe_intf_head);
	*intf_priv = gbe_intf;
	return 0;

fail:
	if (gbe_intf->slave)
		devm_kfree(gbe_dev->dev, gbe_intf->slave);
	if (gbe_intf)
		devm_kfree(gbe_dev->dev, gbe_intf);
	return ret;
}

static int gbe_release(void *intf_priv)
{
	struct gbe_intf *gbe_intf = intf_priv;

	gbe_intf->ndev->ethtool_ops = NULL;
	list_del(&gbe_intf->gbe_intf_list);
	devm_kfree(gbe_intf->dev, gbe_intf->slave);
	devm_kfree(gbe_intf->dev, gbe_intf);
	return 0;
}

static int gbe_remove(struct netcp_device *netcp_device, void *inst_priv)
{
	struct gbe_priv *gbe_dev = inst_priv;

	del_timer_sync(&gbe_dev->timer);
3716
	cpts_release(gbe_dev->cpts);
3717 3718 3719 3720 3721 3722
	cpsw_ale_stop(gbe_dev->ale);
	cpsw_ale_destroy(gbe_dev->ale);
	netcp_txpipe_close(&gbe_dev->tx_pipe);
	free_secondary_ports(gbe_dev);

	if (!list_empty(&gbe_dev->gbe_intf_head))
3723 3724
		dev_alert(gbe_dev->dev,
			  "unreleased ethss interfaces present\n");
3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745

	return 0;
}

static struct netcp_module gbe_module = {
	.name		= GBE_MODULE_NAME,
	.owner		= THIS_MODULE,
	.primary	= true,
	.probe		= gbe_probe,
	.open		= gbe_open,
	.close		= gbe_close,
	.remove		= gbe_remove,
	.attach		= gbe_attach,
	.release	= gbe_release,
	.add_addr	= gbe_add_addr,
	.del_addr	= gbe_del_addr,
	.add_vid	= gbe_add_vid,
	.del_vid	= gbe_del_vid,
	.ioctl		= gbe_ioctl,
};

3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760 3761 3762
static struct netcp_module xgbe_module = {
	.name		= XGBE_MODULE_NAME,
	.owner		= THIS_MODULE,
	.primary	= true,
	.probe		= gbe_probe,
	.open		= gbe_open,
	.close		= gbe_close,
	.remove		= gbe_remove,
	.attach		= gbe_attach,
	.release	= gbe_release,
	.add_addr	= gbe_add_addr,
	.del_addr	= gbe_del_addr,
	.add_vid	= gbe_add_vid,
	.del_vid	= gbe_del_vid,
	.ioctl		= gbe_ioctl,
};

3763 3764 3765 3766 3767 3768 3769 3770
static int __init keystone_gbe_init(void)
{
	int ret;

	ret = netcp_register_module(&gbe_module);
	if (ret)
		return ret;

3771 3772 3773 3774
	ret = netcp_register_module(&xgbe_module);
	if (ret)
		return ret;

3775 3776 3777 3778 3779 3780 3781
	return 0;
}
module_init(keystone_gbe_init);

static void __exit keystone_gbe_exit(void)
{
	netcp_unregister_module(&gbe_module);
3782
	netcp_unregister_module(&xgbe_module);
3783 3784
}
module_exit(keystone_gbe_exit);
3785 3786 3787 3788

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("TI NETCP ETHSS driver for Keystone SOCs");
MODULE_AUTHOR("Sandeep Nair <sandeep_n@ti.com");