core.c 16.8 KB
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/*
 *  Copyright (C) 1994 Linus Torvalds
 *
 *  Pentium III FXSR, SSE support
 *  General FPU state handling cleanups
 *	Gareth Hughes <gareth@valinux.com>, May 2000
 */
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#include <asm/fpu-internal.h>
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/*
 * Track whether the kernel is using the FPU state
 * currently.
 *
 * This flag is used:
 *
 *   - by IRQ context code to potentially use the FPU
 *     if it's unused.
 *
 *   - to debug kernel_fpu_begin()/end() correctness
 */
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static DEFINE_PER_CPU(bool, in_kernel_fpu);

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/*
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 * Track which context is using the FPU on the CPU:
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 */
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DEFINE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
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static void kernel_fpu_disable(void)
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{
	WARN_ON(this_cpu_read(in_kernel_fpu));
	this_cpu_write(in_kernel_fpu, true);
}

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static void kernel_fpu_enable(void)
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{
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	WARN_ON_ONCE(!this_cpu_read(in_kernel_fpu));
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	this_cpu_write(in_kernel_fpu, false);
}

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static bool kernel_fpu_disabled(void)
{
	return this_cpu_read(in_kernel_fpu);
}

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/*
 * Were we in an interrupt that interrupted kernel mode?
 *
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 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
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 * pair does nothing at all: the thread must not have fpu (so
 * that we don't try to save the FPU state), and TS must
 * be set (so that the clts/stts pair does nothing that is
 * visible in the interrupted kernel thread).
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 *
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 * Except for the eagerfpu case when we return true; in the likely case
 * the thread has FPU but we are not going to set/clear TS.
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 */
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static bool interrupted_kernel_fpu_idle(void)
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{
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	if (kernel_fpu_disabled())
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		return false;

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	if (use_eager_fpu())
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		return true;
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	return !current->thread.fpu.has_fpu && (read_cr0() & X86_CR0_TS);
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}

/*
 * Were we in user mode (or vm86 mode) when we were
 * interrupted?
 *
 * Doing kernel_fpu_begin/end() is ok if we are running
 * in an interrupt context from user mode - we'll just
 * save the FPU state as required.
 */
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static bool interrupted_user_mode(void)
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{
	struct pt_regs *regs = get_irq_regs();
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	return regs && user_mode(regs);
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}

/*
 * Can we use the FPU in kernel mode with the
 * whole "kernel_fpu_begin/end()" sequence?
 *
 * It's always ok in process context (ie "not interrupt")
 * but it is sometimes ok even from an irq.
 */
bool irq_fpu_usable(void)
{
	return !in_interrupt() ||
		interrupted_user_mode() ||
		interrupted_kernel_fpu_idle();
}
EXPORT_SYMBOL(irq_fpu_usable);

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void __kernel_fpu_begin(void)
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{
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	struct fpu *fpu = &current->thread.fpu;
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	kernel_fpu_disable();
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	if (fpu->has_fpu) {
		fpu_save_init(fpu);
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	} else {
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		this_cpu_write(fpu_fpregs_owner_ctx, NULL);
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		if (!use_eager_fpu())
			clts();
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	}
}
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EXPORT_SYMBOL(__kernel_fpu_begin);
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void __kernel_fpu_end(void)
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{
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	struct task_struct *me = current;
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	struct fpu *fpu = &me->thread.fpu;
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	if (fpu->has_fpu) {
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		if (WARN_ON(restore_fpu_checking(me)))
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			fpu_reset_state(me);
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	} else if (!use_eager_fpu()) {
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		stts();
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	}
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	kernel_fpu_enable();
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}
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EXPORT_SYMBOL(__kernel_fpu_end);
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/*
 * Save the FPU state (initialize it if necessary):
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 *
 * This only ever gets called for the current task.
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 */
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void fpu__save(struct task_struct *tsk)
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{
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	struct fpu *fpu = &tsk->thread.fpu;

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	WARN_ON(tsk != current);

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	preempt_disable();
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	if (fpu->has_fpu) {
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		if (use_eager_fpu()) {
			__save_fpu(tsk);
		} else {
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			fpu_save_init(fpu);
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			__thread_fpu_end(fpu);
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		}
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	}
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	preempt_enable();
}
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EXPORT_SYMBOL_GPL(fpu__save);
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void fpstate_init(struct fpu *fpu)
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{
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	if (!cpu_has_fpu) {
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		finit_soft_fpu(&fpu->state->soft);
		return;
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	}

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	memset(fpu->state, 0, xstate_size);

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	if (cpu_has_fxsr) {
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		fx_finit(&fpu->state->fxsave);
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	} else {
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		struct i387_fsave_struct *fp = &fpu->state->fsave;
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		fp->cwd = 0xffff037fu;
		fp->swd = 0xffff0000u;
		fp->twd = 0xffffffffu;
		fp->fos = 0xffff0000u;
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	}
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}
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EXPORT_SYMBOL_GPL(fpstate_init);
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/*
 * FPU state allocation:
 */
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static struct kmem_cache *task_xstate_cachep;
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void fpstate_cache_init(void)
{
	task_xstate_cachep =
		kmem_cache_create("task_xstate", xstate_size,
				  __alignof__(union thread_xstate),
				  SLAB_PANIC | SLAB_NOTRACK, NULL);
	setup_xstate_comp();
}

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int fpstate_alloc(struct fpu *fpu)
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{
	if (fpu->state)
		return 0;
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	fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
	if (!fpu->state)
		return -ENOMEM;
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	/* The CPU requires the FPU state to be aligned to 16 byte boundaries: */
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	WARN_ON((unsigned long)fpu->state & 15);
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	return 0;
}
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EXPORT_SYMBOL_GPL(fpstate_alloc);
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void fpstate_free(struct fpu *fpu)
{
	if (fpu->state) {
		kmem_cache_free(task_xstate_cachep, fpu->state);
		fpu->state = NULL;
	}
}
EXPORT_SYMBOL_GPL(fpstate_free);

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/*
 * Copy the current task's FPU state to a new task's FPU context.
 *
 * In the 'eager' case we just save to the destination context.
 *
 * In the 'lazy' case we save to the source context, mark the FPU lazy
 * via stts() and copy the source context into the destination context.
 */
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static void fpu_copy(struct task_struct *dst, struct task_struct *src)
{
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	WARN_ON(src != current);

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	if (use_eager_fpu()) {
		memset(&dst->thread.fpu.state->xsave, 0, xstate_size);
		__save_fpu(dst);
	} else {
		struct fpu *dfpu = &dst->thread.fpu;
		struct fpu *sfpu = &src->thread.fpu;

		fpu__save(src);
		memcpy(dfpu->state, sfpu->state, xstate_size);
	}
}

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int fpu__copy(struct task_struct *dst, struct task_struct *src)
{
	dst->thread.fpu.counter = 0;
	dst->thread.fpu.has_fpu = 0;
	dst->thread.fpu.state = NULL;

	task_disable_lazy_fpu_restore(dst);

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	if (src->flags & PF_USED_MATH) {
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		int err = fpstate_alloc(&dst->thread.fpu);

		if (err)
			return err;
		fpu_copy(dst, src);
	}
	return 0;
}

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/*
 * Allocate the backing store for the current task's FPU registers
 * and initialize the registers themselves as well.
 *
 * Can fail.
 */
int fpstate_alloc_init(struct task_struct *curr)
{
	int ret;

	if (WARN_ON_ONCE(curr != current))
		return -EINVAL;
	if (WARN_ON_ONCE(curr->flags & PF_USED_MATH))
		return -EINVAL;

	/*
	 * Memory allocation at the first usage of the FPU and other state.
	 */
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	ret = fpstate_alloc(&curr->thread.fpu);
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	if (ret)
		return ret;

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	fpstate_init(&curr->thread.fpu);
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	/* Safe to do for the current task: */
	curr->flags |= PF_USED_MATH;

	return 0;
}
EXPORT_SYMBOL_GPL(fpstate_alloc_init);

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/*
 * The _current_ task is using the FPU for the first time
 * so initialize it and set the mxcsr to its default
 * value at reset if we support XMM instructions and then
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 * remember the current task has used the FPU.
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 */
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static int fpu__unlazy_stopped(struct task_struct *child)
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{
	int ret;

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	if (WARN_ON_ONCE(child == current))
		return -EINVAL;

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	if (child->flags & PF_USED_MATH) {
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		task_disable_lazy_fpu_restore(child);
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		return 0;
	}

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	/*
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	 * Memory allocation at the first usage of the FPU and other state.
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	 */
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	ret = fpstate_alloc(&child->thread.fpu);
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	if (ret)
		return ret;

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	fpstate_init(&child->thread.fpu);
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	/* Safe to do for stopped child tasks: */
	child->flags |= PF_USED_MATH;

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	return 0;
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}

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/*
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 * 'fpu__restore()' saves the current math information in the
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 * old math state array, and gets the new ones from the current task
 *
 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
 * Don't touch unless you *really* know how it works.
 *
 * Must be called with kernel preemption disabled (eg with local
 * local interrupts as in the case of do_device_not_available).
 */
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void fpu__restore(void)
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{
	struct task_struct *tsk = current;
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	struct fpu *fpu = &tsk->thread.fpu;
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	if (!(tsk->flags & PF_USED_MATH)) {
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		local_irq_enable();
		/*
		 * does a slab alloc which can sleep
		 */
		if (fpstate_alloc_init(tsk)) {
			/*
			 * ran out of memory!
			 */
			do_group_exit(SIGKILL);
			return;
		}
		local_irq_disable();
	}

	/* Avoid __kernel_fpu_begin() right after __thread_fpu_begin() */
	kernel_fpu_disable();
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	__thread_fpu_begin(fpu);
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	if (unlikely(restore_fpu_checking(tsk))) {
		fpu_reset_state(tsk);
		force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
	} else {
		tsk->thread.fpu.counter++;
	}
	kernel_fpu_enable();
}
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EXPORT_SYMBOL_GPL(fpu__restore);
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void fpu__flush_thread(struct task_struct *tsk)
{
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	WARN_ON(tsk != current);

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	if (!use_eager_fpu()) {
		/* FPU state will be reallocated lazily at the first use. */
		drop_fpu(tsk);
		fpstate_free(&tsk->thread.fpu);
	} else {
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		if (!(tsk->flags & PF_USED_MATH)) {
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			/* kthread execs. TODO: cleanup this horror. */
		if (WARN_ON(fpstate_alloc_init(tsk)))
				force_sig(SIGKILL, tsk);
			user_fpu_begin();
		}
		restore_init_xstate();
	}
}

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/*
 * The xstateregs_active() routine is the same as the fpregs_active() routine,
 * as the "regset->n" for the xstate regset will be updated based on the feature
 * capabilites supported by the xsave.
 */
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int fpregs_active(struct task_struct *target, const struct user_regset *regset)
{
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	return (target->flags & PF_USED_MATH) ? regset->n : 0;
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}
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int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
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{
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	return (cpu_has_fxsr && (target->flags & PF_USED_MATH)) ? regset->n : 0;
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}
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int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
		unsigned int pos, unsigned int count,
		void *kbuf, void __user *ubuf)
{
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	int ret;

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	if (!cpu_has_fxsr)
		return -ENODEV;

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	ret = fpu__unlazy_stopped(target);
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	if (ret)
		return ret;
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	sanitize_i387_state(target);

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	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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				   &target->thread.fpu.state->fxsave, 0, -1);
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}
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int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
		unsigned int pos, unsigned int count,
		const void *kbuf, const void __user *ubuf)
{
	int ret;

	if (!cpu_has_fxsr)
		return -ENODEV;

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	ret = fpu__unlazy_stopped(target);
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	if (ret)
		return ret;

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	sanitize_i387_state(target);

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	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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				 &target->thread.fpu.state->fxsave, 0, -1);
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	/*
	 * mxcsr reserved bits must be masked to zero for security reasons.
	 */
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	target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
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	/*
	 * update the header bits in the xsave header, indicating the
	 * presence of FP and SSE state.
	 */
	if (cpu_has_xsave)
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		target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
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	return ret;
}

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int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
		unsigned int pos, unsigned int count,
		void *kbuf, void __user *ubuf)
{
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	struct xsave_struct *xsave;
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	int ret;

	if (!cpu_has_xsave)
		return -ENODEV;

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	ret = fpu__unlazy_stopped(target);
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	if (ret)
		return ret;

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	xsave = &target->thread.fpu.state->xsave;

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	/*
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	 * Copy the 48bytes defined by the software first into the xstate
	 * memory layout in the thread struct, so that we can copy the entire
	 * xstateregs to the user using one user_regset_copyout().
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	 */
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	memcpy(&xsave->i387.sw_reserved,
		xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
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	/*
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	 * Copy the xstate memory layout.
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	 */
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	ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
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	return ret;
}

int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
		  unsigned int pos, unsigned int count,
		  const void *kbuf, const void __user *ubuf)
{
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	struct xsave_struct *xsave;
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	int ret;

	if (!cpu_has_xsave)
		return -ENODEV;

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	ret = fpu__unlazy_stopped(target);
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	if (ret)
		return ret;

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	xsave = &target->thread.fpu.state->xsave;

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	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
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	/*
	 * mxcsr reserved bits must be masked to zero for security reasons.
	 */
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	xsave->i387.mxcsr &= mxcsr_feature_mask;
	xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
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	/*
	 * These bits must be zero.
	 */
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	memset(&xsave->xsave_hdr.reserved, 0, 48);
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	return ret;
}

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#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
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/*
 * FPU tag word conversions.
 */

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static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
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{
	unsigned int tmp; /* to avoid 16 bit prefixes in the code */
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	/* Transform each pair of bits into 01 (valid) or 00 (empty) */
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	tmp = ~twd;
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	tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
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	/* and move the valid bits to the lower byte. */
	tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
	tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
	tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
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	return tmp;
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}

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#define FPREG_ADDR(f, n)	((void *)&(f)->st_space + (n) * 16)
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#define FP_EXP_TAG_VALID	0
#define FP_EXP_TAG_ZERO		1
#define FP_EXP_TAG_SPECIAL	2
#define FP_EXP_TAG_EMPTY	3

static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
{
	struct _fpxreg *st;
	u32 tos = (fxsave->swd >> 11) & 7;
	u32 twd = (unsigned long) fxsave->twd;
	u32 tag;
	u32 ret = 0xffff0000u;
	int i;
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	for (i = 0; i < 8; i++, twd >>= 1) {
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		if (twd & 0x1) {
			st = FPREG_ADDR(fxsave, (i - tos) & 7);
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			switch (st->exponent & 0x7fff) {
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			case 0x7fff:
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				tag = FP_EXP_TAG_SPECIAL;
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				break;
			case 0x0000:
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				if (!st->significand[0] &&
				    !st->significand[1] &&
				    !st->significand[2] &&
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				    !st->significand[3])
					tag = FP_EXP_TAG_ZERO;
				else
					tag = FP_EXP_TAG_SPECIAL;
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				break;
			default:
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				if (st->significand[3] & 0x8000)
					tag = FP_EXP_TAG_VALID;
				else
					tag = FP_EXP_TAG_SPECIAL;
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				break;
			}
		} else {
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			tag = FP_EXP_TAG_EMPTY;
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		}
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		ret |= tag << (2 * i);
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	}
	return ret;
}

/*
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 * FXSR floating point environment conversions.
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 */

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void
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convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
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{
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	struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
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	struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
	struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
	int i;
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	env->cwd = fxsave->cwd | 0xffff0000u;
	env->swd = fxsave->swd | 0xffff0000u;
	env->twd = twd_fxsr_to_i387(fxsave);

#ifdef CONFIG_X86_64
	env->fip = fxsave->rip;
	env->foo = fxsave->rdp;
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	/*
	 * should be actually ds/cs at fpu exception time, but
	 * that information is not available in 64bit mode.
	 */
	env->fcs = task_pt_regs(tsk)->cs;
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	if (tsk == current) {
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		savesegment(ds, env->fos);
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	} else {
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		env->fos = tsk->thread.ds;
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	}
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	env->fos |= 0xffff0000;
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#else
	env->fip = fxsave->fip;
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	env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
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	env->foo = fxsave->foo;
	env->fos = fxsave->fos;
#endif
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	for (i = 0; i < 8; ++i)
		memcpy(&to[i], &from[i], sizeof(to[0]));
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}

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void convert_to_fxsr(struct task_struct *tsk,
		     const struct user_i387_ia32_struct *env)
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{
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	struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
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	struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
	struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
	int i;
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	fxsave->cwd = env->cwd;
	fxsave->swd = env->swd;
	fxsave->twd = twd_i387_to_fxsr(env->twd);
	fxsave->fop = (u16) ((u32) env->fcs >> 16);
#ifdef CONFIG_X86_64
	fxsave->rip = env->fip;
	fxsave->rdp = env->foo;
	/* cs and ds ignored */
#else
	fxsave->fip = env->fip;
	fxsave->fcs = (env->fcs & 0xffff);
	fxsave->foo = env->foo;
	fxsave->fos = env->fos;
#endif
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	for (i = 0; i < 8; ++i)
		memcpy(&to[i], &from[i], sizeof(from[0]));
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}

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int fpregs_get(struct task_struct *target, const struct user_regset *regset,
	       unsigned int pos, unsigned int count,
	       void *kbuf, void __user *ubuf)
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{
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	struct user_i387_ia32_struct env;
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	int ret;
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	ret = fpu__unlazy_stopped(target);
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	if (ret)
		return ret;
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	if (!static_cpu_has(X86_FEATURE_FPU))
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		return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);

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	if (!cpu_has_fxsr)
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		return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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					   &target->thread.fpu.state->fsave, 0,
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					   -1);
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	sanitize_i387_state(target);

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	if (kbuf && pos == 0 && count == sizeof(env)) {
		convert_from_fxsr(kbuf, target);
		return 0;
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	}
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	convert_from_fxsr(&env, target);
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	return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
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}

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int fpregs_set(struct task_struct *target, const struct user_regset *regset,
	       unsigned int pos, unsigned int count,
	       const void *kbuf, const void __user *ubuf)
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{
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	struct user_i387_ia32_struct env;
	int ret;
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	ret = fpu__unlazy_stopped(target);
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	if (ret)
		return ret;

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	sanitize_i387_state(target);

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	if (!static_cpu_has(X86_FEATURE_FPU))
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		return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);

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	if (!cpu_has_fxsr)
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		return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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					  &target->thread.fpu.state->fsave, 0,
					  -1);
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	if (pos > 0 || count < sizeof(env))
		convert_from_fxsr(&env, target);

	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
	if (!ret)
		convert_to_fxsr(target, &env);

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	/*
	 * update the header bit in the xsave header, indicating the
	 * presence of FP.
	 */
	if (cpu_has_xsave)
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		target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
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	return ret;
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}

/*
 * FPU state for core dumps.
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 * This is only used for a.out dumps now.
 * It is declared generically using elf_fpregset_t (which is
 * struct user_i387_struct) but is in fact only used for 32-bit
 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
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 */
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int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
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{
	struct task_struct *tsk = current;
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	int fpvalid;
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	fpvalid = !!(tsk->flags & PF_USED_MATH);
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	if (fpvalid)
		fpvalid = !fpregs_get(tsk, NULL,
				      0, sizeof(struct user_i387_ia32_struct),
				      fpu, NULL);
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	return fpvalid;
}
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EXPORT_SYMBOL(dump_fpu);
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#endif	/* CONFIG_X86_32 || CONFIG_IA32_EMULATION */