r8a7795-h3ulcb.dts

/*
 * Device Tree Source for the H3ULCB board
 *
 * Copyright (C) 2016 Renesas Electronics Corp.
 * Copyright (C) 2016 Cogent Embedded, Inc.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/dts-v1/;
#include "r8a7795.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Renesas H3ULCB board based on r8a7795";
	compatible = "renesas,h3ulcb", "renesas,r8a7795";

	aliases {
		serial0 = &scif2;
		ethernet0 = &avb;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x0 0x38000000>;
	};
};

&extal_clk {
	clock-frequency = <16666666>;
};

&extalr_clk {
	clock-frequency = <32768>;
};

&pfc {
	pinctrl-0 = <&scif_clk_pins>;
	pinctrl-names = "default";

	scif2_pins: scif2 {
		groups = "scif2_data_a";
		function = "scif2";
	};

	scif_clk_pins: scif_clk {
		groups = "scif_clk_a";
		function = "scif_clk";
	};

	i2c2_pins: i2c2 {
		groups = "i2c2_a";
		function = "i2c2";
	};

	avb_pins: avb {
		groups = "avb_mdc";
		function = "avb";
	};
};

&scif2 {
	pinctrl-0 = <&scif2_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&scif_clk {
	clock-frequency = <14745600>;
	status = "okay";
};

&i2c2 {
	pinctrl-0 = <&i2c2_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&wdt0 {
	timeout-sec = <60>;
	status = "okay";
};

&avb {
	pinctrl-0 = <&avb_pins>;
	pinctrl-names = "default";
	renesas,no-ether-link;
	phy-handle = <&phy0>;
	status = "okay";

	phy0: ethernet-phy@0 {
		rxc-skew-ps = <900>;
		rxdv-skew-ps = <0>;
		rxd0-skew-ps = <0>;
		rxd1-skew-ps = <0>;
		rxd2-skew-ps = <0>;
		rxd3-skew-ps = <0>;
		txc-skew-ps = <900>;
		txen-skew-ps = <0>;
		txd0-skew-ps = <0>;
		txd1-skew-ps = <0>;
		txd2-skew-ps = <0>;
		txd3-skew-ps = <0>;
		reg = <0>;
		interrupt-parent = <&gpio2>;
		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
	};
};