cx23885-dvb.c 25.3 KB
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/*
 *  Driver for the Conexant CX23885 PCIe bridge
 *
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 *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
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 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/kthread.h>
#include <linux/file.h>
#include <linux/suspend.h>

#include "cx23885.h"
#include <media/v4l2-common.h>

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#include "dvb_ca_en50221.h"
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#include "s5h1409.h"
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#include "s5h1411.h"
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#include "mt2131.h"
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#include "tda8290.h"
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#include "tda18271.h"
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#include "lgdt330x.h"
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#include "xc5000.h"
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#include "tda10048.h"
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#include "tuner-xc2028.h"
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#include "tuner-simple.h"
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#include "dib7000p.h"
#include "dibx000_common.h"
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#include "zl10353.h"
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#include "stv0900.h"
#include "stv6110.h"
#include "lnbh24.h"
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#include "cx24116.h"
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#include "cimax2.h"
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#include "lgs8gxx.h"
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#include "netup-eeprom.h"
#include "netup-init.h"
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#include "lgdt3305.h"
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static unsigned int debug;
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#define dprintk(level, fmt, arg...)\
	do { if (debug >= level)\
		printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
	} while (0)
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/* ------------------------------------------------------------------ */

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static unsigned int alt_tuner;
module_param(alt_tuner, int, 0644);
MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");

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DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);

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/* ------------------------------------------------------------------ */

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static int dvb_buf_setup(struct videobuf_queue *q,
			 unsigned int *count, unsigned int *size)
{
	struct cx23885_tsport *port = q->priv_data;

	port->ts_packet_size  = 188 * 4;
	port->ts_packet_count = 32;

	*size  = port->ts_packet_size * port->ts_packet_count;
	*count = 32;
	return 0;
}

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static int dvb_buf_prepare(struct videobuf_queue *q,
			   struct videobuf_buffer *vb, enum v4l2_field field)
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{
	struct cx23885_tsport *port = q->priv_data;
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	return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
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}

static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
{
	struct cx23885_tsport *port = q->priv_data;
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	cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
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}

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static void dvb_buf_release(struct videobuf_queue *q,
			    struct videobuf_buffer *vb)
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{
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	cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
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}

static struct videobuf_queue_ops dvb_qops = {
	.buf_setup    = dvb_buf_setup,
	.buf_prepare  = dvb_buf_prepare,
	.buf_queue    = dvb_buf_queue,
	.buf_release  = dvb_buf_release,
};

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static struct s5h1409_config hauppauge_generic_config = {
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	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
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	.qam_if        = 44000,
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	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct tda10048_config hauppauge_hvr1200_config = {
	.demod_address    = 0x10 >> 1,
	.output_mode      = TDA10048_SERIAL_OUTPUT,
	.fwbulkwritelen   = TDA10048_BULKWRITE_200,
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	.inversion        = TDA10048_INVERSION_ON,
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	.dtv6_if_freq_khz = TDA10048_IF_3300,
	.dtv7_if_freq_khz = TDA10048_IF_3800,
	.dtv8_if_freq_khz = TDA10048_IF_4300,
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	.clk_freq_khz     = TDA10048_CLK_16000,
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};

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static struct tda10048_config hauppauge_hvr1210_config = {
	.demod_address    = 0x10 >> 1,
	.output_mode      = TDA10048_SERIAL_OUTPUT,
	.fwbulkwritelen   = TDA10048_BULKWRITE_200,
	.inversion        = TDA10048_INVERSION_ON,
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	.dtv6_if_freq_khz = TDA10048_IF_3300,
	.dtv7_if_freq_khz = TDA10048_IF_3500,
	.dtv8_if_freq_khz = TDA10048_IF_4000,
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	.clk_freq_khz     = TDA10048_CLK_16000,
};

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static struct s5h1409_config hauppauge_ezqam_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
	.qam_if        = 4000,
	.inversion     = S5H1409_INVERSION_ON,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct s5h1409_config hauppauge_hvr1800lp_config = {
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	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
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	.qam_if        = 44000,
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	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct s5h1409_config hauppauge_hvr1500_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct mt2131_config hauppauge_generic_tunerconfig = {
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	0x61
};

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static struct lgdt330x_config fusionhdtv_5_express = {
	.demod_address = 0x0e,
	.demod_chip = LGDT3303,
	.serial_mpeg = 0x40,
};

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static struct s5h1409_config hauppauge_hvr1500q_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
	.qam_if        = 44000,
	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct s5h1409_config dvico_s5h1409_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
	.qam_if        = 44000,
	.inversion     = S5H1409_INVERSION_OFF,
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

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static struct s5h1411_config dvico_s5h1411_config = {
	.output_mode   = S5H1411_SERIAL_OUTPUT,
	.gpio          = S5H1411_GPIO_ON,
	.qam_if        = S5H1411_IF_44000,
	.vsb_if        = S5H1411_IF_44000,
	.inversion     = S5H1411_INVERSION_OFF,
	.status_mode   = S5H1411_DEMODLOCKING,
	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

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static struct s5h1411_config hcw_s5h1411_config = {
	.output_mode   = S5H1411_SERIAL_OUTPUT,
	.gpio          = S5H1411_GPIO_OFF,
	.vsb_if        = S5H1411_IF_44000,
	.qam_if        = S5H1411_IF_4000,
	.inversion     = S5H1411_INVERSION_ON,
	.status_mode   = S5H1411_DEMODLOCKING,
	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

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static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
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	.i2c_address      = 0x61,
	.if_khz           = 5380,
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};

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static struct xc5000_config dvico_xc5000_tunerconfig = {
	.i2c_address      = 0x64,
	.if_khz           = 5380,
};

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static struct tda829x_config tda829x_no_probe = {
	.probe_tuner = TDA829X_DONT_PROBE,
};

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static struct tda18271_std_map hauppauge_tda18271_std_map = {
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	.atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
		      .if_lvl = 6, .rfagc_top = 0x37 },
	.qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
		      .if_lvl = 6, .rfagc_top = 0x37 },
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};

static struct tda18271_config hauppauge_tda18271_config = {
	.std_map = &hauppauge_tda18271_std_map,
	.gate    = TDA18271_GATE_ANALOG,
};

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static struct tda18271_config hauppauge_hvr1200_tuner_config = {
	.gate    = TDA18271_GATE_ANALOG,
};

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static struct tda18271_config hauppauge_hvr1210_tuner_config = {
	.gate    = TDA18271_GATE_DIGITAL,
};

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static struct tda18271_std_map hauppauge_hvr127x_std_map = {
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	.atsc_6   = { .if_freq = 3250, .agc_mode = 3, .std = 4,
		      .if_lvl = 1, .rfagc_top = 0x58 },
	.qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 5,
		      .if_lvl = 1, .rfagc_top = 0x58 },
};

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static struct tda18271_config hauppauge_hvr127x_config = {
	.std_map = &hauppauge_hvr127x_std_map,
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};

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static struct lgdt3305_config hauppauge_lgdt3305_config = {
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	.i2c_addr           = 0x0e,
	.mpeg_mode          = LGDT3305_MPEG_SERIAL,
	.tpclk_edge         = LGDT3305_TPCLK_FALLING_EDGE,
	.tpvalid_polarity   = LGDT3305_TP_VALID_HIGH,
	.deny_i2c_rptr      = 1,
	.spectral_inversion = 1,
	.qam_if_khz         = 4000,
	.vsb_if_khz         = 3250,
};

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static struct dibx000_agc_config xc3028_agc_config = {
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	BAND_VHF | BAND_UHF,	/* band_caps */

	/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
	 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
	 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
	 * P_agc_nb_est=2, P_agc_write=0
	 */
	(0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
		(3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */

	712,	/* inv_gain */
	21,	/* time_stabiliz */

	0,	/* alpha_level */
	118,	/* thlock */

	0,	/* wbd_inv */
	2867,	/* wbd_ref */
	0,	/* wbd_sel */
	2,	/* wbd_alpha */

	0,	/* agc1_max */
	0,	/* agc1_min */
	39718,	/* agc2_max */
	9930,	/* agc2_min */
	0,	/* agc1_pt1 */
	0,	/* agc1_pt2 */
	0,	/* agc1_pt3 */
	0,	/* agc1_slope1 */
	0,	/* agc1_slope2 */
	0,	/* agc2_pt1 */
	128,	/* agc2_pt2 */
	29,	/* agc2_slope1 */
	29,	/* agc2_slope2 */

	17,	/* alpha_mant */
	27,	/* alpha_exp */
	23,	/* beta_mant */
	51,	/* beta_exp */

	1,	/* perform_agc_softsplit */
};

/* PLL Configuration for COFDM BW_MHz = 8.000000
 * With external clock = 30.000000 */
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static struct dibx000_bandwidth_config xc3028_bw_config = {
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	60000,	/* internal */
	30000,	/* sampling */
	1,	/* pll_cfg: prediv */
	8,	/* pll_cfg: ratio */
	3,	/* pll_cfg: range */
	1,	/* pll_cfg: reset */
	0,	/* pll_cfg: bypass */
	0,	/* misc: refdiv */
	0,	/* misc: bypclk_div */
	1,	/* misc: IO_CLK_en_core */
	1,	/* misc: ADClkSrc */
	0,	/* misc: modulo */
	(3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
	(1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
	20452225, /* timf */
	30000000  /* xtal_hz */
};

static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
	.output_mpeg2_in_188_bytes = 1,
	.hostbus_diversity = 1,
	.tuner_is_baseband = 0,
	.update_lna  = NULL,

	.agc_config_count = 1,
	.agc = &xc3028_agc_config,
	.bw  = &xc3028_bw_config,

	.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
	.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
	.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,

	.pwm_freq_div = 0,
	.agc_control  = NULL,
	.spur_protect = 0,

	.output_mode = OUTMODE_MPEG2_SERIAL,
};

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static struct zl10353_config dvico_fusionhdtv_xc3028 = {
	.demod_address = 0x0f,
	.if2           = 45600,
	.no_tuner      = 1,
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	.disable_i2c_gate_ctrl = 1,
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};

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static struct stv0900_config netup_stv0900_config = {
	.demod_address = 0x68,
	.xtal = 27000000,
	.clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
	.diseqc_mode = 2,/* 2/3 PWM */
	.path1_mode = 2,/*Serial continues clock */
	.path2_mode = 2,/*Serial continues clock */
	.tun1_maddress = 0,/* 0x60 */
	.tun2_maddress = 3,/* 0x63 */
	.tun1_adc = 1,/* 1 Vpp */
	.tun2_adc = 1,/* 1 Vpp */
};

static struct stv6110_config netup_stv6110_tunerconfig_a = {
	.i2c_address = 0x60,
	.mclk = 27000000,
	.iq_wiring = 0,
};

static struct stv6110_config netup_stv6110_tunerconfig_b = {
	.i2c_address = 0x63,
	.mclk = 27000000,
	.iq_wiring = 1,
};

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static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
{
	struct cx23885_tsport *port = fe->dvb->priv;
	struct cx23885_dev *dev = port->dev;

	if (voltage == SEC_VOLTAGE_18)
		cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
	else if (voltage == SEC_VOLTAGE_13)
		cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
	else
		cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
	return 0;
}

static struct cx24116_config tbs_cx24116_config = {
	.demod_address = 0x05,
};

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static struct cx24116_config tevii_cx24116_config = {
	.demod_address = 0x55,
};

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static struct cx24116_config dvbworld_cx24116_config = {
	.demod_address = 0x05,
};

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static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
	.prod = LGS8GXX_PROD_LGS8GL5,
	.demod_address = 0x19,
	.serial_ts = 0,
	.ts_clk_pol = 1,
	.ts_clk_gated = 1,
	.if_clk_freq = 30400, /* 30.4 MHz */
	.if_freq = 5380, /* 5.38 MHz */
	.if_neg_center = 1,
	.ext_adc = 0,
	.adc_signed = 0,
	.if_neg_edge = 0,
};

static struct xc5000_config mygica_x8506_xc5000_config = {
	.i2c_address = 0x61,
	.if_khz = 5380,
};

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static int dvb_register(struct cx23885_tsport *port)
{
	struct cx23885_dev *dev = port->dev;
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	struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
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	struct videobuf_dvb_frontend *fe0;
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	int ret;
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	/* Get the first frontend */
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	fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
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	if (!fe0)
		return -EINVAL;
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	/* init struct videobuf_dvb */
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	fe0->dvb.name = dev->name;
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	/* init frontend */
	switch (dev->board) {
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	case CX23885_BOARD_HAUPPAUGE_HVR1250:
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		i2c_bus = &dev->i2c_bus[0];
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		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
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						&hauppauge_generic_config,
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						&i2c_bus->i2c_adap);
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		if (fe0->dvb.frontend != NULL) {
			dvb_attach(mt2131_attach, fe0->dvb.frontend,
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				   &i2c_bus->i2c_adap,
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				   &hauppauge_generic_tunerconfig, 0);
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		}
		break;
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	case CX23885_BOARD_HAUPPAUGE_HVR1270:
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	case CX23885_BOARD_HAUPPAUGE_HVR1275:
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		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
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					       &hauppauge_lgdt3305_config,
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					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				   0x60, &dev->i2c_bus[1].i2c_adap,
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				   &hauppauge_hvr127x_config);
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		}
		break;
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	case CX23885_BOARD_HAUPPAUGE_HVR1255:
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
					       &hcw_s5h1411_config,
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				   0x60, &dev->i2c_bus[1].i2c_adap,
				   &hauppauge_tda18271_config);
		}
		break;
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	case CX23885_BOARD_HAUPPAUGE_HVR1800:
		i2c_bus = &dev->i2c_bus[0];
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		switch (alt_tuner) {
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		case 1:
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			fe0->dvb.frontend =
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				dvb_attach(s5h1409_attach,
					   &hauppauge_ezqam_config,
					   &i2c_bus->i2c_adap);
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			if (fe0->dvb.frontend != NULL) {
				dvb_attach(tda829x_attach, fe0->dvb.frontend,
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					   &dev->i2c_bus[1].i2c_adap, 0x42,
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					   &tda829x_no_probe);
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				dvb_attach(tda18271_attach, fe0->dvb.frontend,
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					   0x60, &dev->i2c_bus[1].i2c_adap,
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					   &hauppauge_tda18271_config);
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			}
			break;
		case 0:
		default:
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			fe0->dvb.frontend =
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				dvb_attach(s5h1409_attach,
					   &hauppauge_generic_config,
					   &i2c_bus->i2c_adap);
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			if (fe0->dvb.frontend != NULL)
				dvb_attach(mt2131_attach, fe0->dvb.frontend,
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					   &i2c_bus->i2c_adap,
					   &hauppauge_generic_tunerconfig, 0);
			break;
		}
		break;
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	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
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		i2c_bus = &dev->i2c_bus[0];
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		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
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						&hauppauge_hvr1800lp_config,
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						&i2c_bus->i2c_adap);
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		if (fe0->dvb.frontend != NULL) {
			dvb_attach(mt2131_attach, fe0->dvb.frontend,
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				   &i2c_bus->i2c_adap,
532 533 534
				   &hauppauge_generic_tunerconfig, 0);
		}
		break;
535
	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
536
		i2c_bus = &dev->i2c_bus[0];
537
		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
538
						&fusionhdtv_5_express,
539
						&i2c_bus->i2c_adap);
540 541
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
542 543
				   &i2c_bus->i2c_adap, 0x61,
				   TUNER_LG_TDVS_H06XF);
544 545
		}
		break;
546 547
	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
		i2c_bus = &dev->i2c_bus[1];
548
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
549 550
						&hauppauge_hvr1500q_config,
						&dev->i2c_bus[0].i2c_adap);
551 552
		if (fe0->dvb.frontend != NULL)
			dvb_attach(xc5000_attach, fe0->dvb.frontend,
553 554
				   &i2c_bus->i2c_adap,
				   &hauppauge_hvr1500q_tunerconfig);
555
		break;
556 557
	case CX23885_BOARD_HAUPPAUGE_HVR1500:
		i2c_bus = &dev->i2c_bus[1];
558
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
559 560
						&hauppauge_hvr1500_config,
						&dev->i2c_bus[0].i2c_adap);
561
		if (fe0->dvb.frontend != NULL) {
562 563 564 565 566 567
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap  = &i2c_bus->i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
568
				.fname       = XC2028_DEFAULT_FIRMWARE,
569
				.max_len     = 64,
570
				.demod       = XC3028_FE_OREN538,
571 572 573
			};

			fe = dvb_attach(xc2028_attach,
574
					fe0->dvb.frontend, &cfg);
575 576 577 578
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
579
	case CX23885_BOARD_HAUPPAUGE_HVR1200:
580
	case CX23885_BOARD_HAUPPAUGE_HVR1700:
581
		i2c_bus = &dev->i2c_bus[0];
582
		fe0->dvb.frontend = dvb_attach(tda10048_attach,
583 584
			&hauppauge_hvr1200_config,
			&i2c_bus->i2c_adap);
585 586
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda829x_attach, fe0->dvb.frontend,
587 588
				&dev->i2c_bus[1].i2c_adap, 0x42,
				&tda829x_no_probe);
589
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
590 591
				0x60, &dev->i2c_bus[1].i2c_adap,
				&hauppauge_hvr1200_tuner_config);
592 593 594 595 596 597 598 599 600 601 602
		}
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1210:
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(tda10048_attach,
			&hauppauge_hvr1210_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[1].i2c_adap,
				&hauppauge_hvr1210_tuner_config);
603 604
		}
		break;
605 606
	case CX23885_BOARD_HAUPPAUGE_HVR1400:
		i2c_bus = &dev->i2c_bus[0];
607
		fe0->dvb.frontend = dvb_attach(dib7000p_attach,
608 609
			&i2c_bus->i2c_adap,
			0x12, &hauppauge_hvr1400_dib7000_config);
610
		if (fe0->dvb.frontend != NULL) {
611 612 613 614 615 616
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap  = &dev->i2c_bus[1].i2c_adap,
				.i2c_addr  = 0x64,
			};
			static struct xc2028_ctrl ctl = {
617
				.fname   = XC3028L_DEFAULT_FIRMWARE,
618 619
				.max_len = 64,
				.demod   = 5000,
620 621
				/* This is true for all demods with
					v36 firmware? */
622
				.type    = XC2028_D2633,
623 624 625
			};

			fe = dvb_attach(xc2028_attach,
626
					fe0->dvb.frontend, &cfg);
627 628 629 630
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
631 632 633
	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
		i2c_bus = &dev->i2c_bus[port->nr - 1];

634
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
635 636
						&dvico_s5h1409_config,
						&i2c_bus->i2c_adap);
637 638
		if (fe0->dvb.frontend == NULL)
			fe0->dvb.frontend = dvb_attach(s5h1411_attach,
639 640
							&dvico_s5h1411_config,
							&i2c_bus->i2c_adap);
641 642
		if (fe0->dvb.frontend != NULL)
			dvb_attach(xc5000_attach, fe0->dvb.frontend,
643 644
				   &i2c_bus->i2c_adap,
				   &dvico_xc5000_tunerconfig);
645
		break;
646 647 648
	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
		i2c_bus = &dev->i2c_bus[port->nr - 1];

649
		fe0->dvb.frontend = dvb_attach(zl10353_attach,
650 651
					       &dvico_fusionhdtv_xc3028,
					       &i2c_bus->i2c_adap);
652
		if (fe0->dvb.frontend != NULL) {
653 654 655 656 657 658
			struct dvb_frontend      *fe;
			struct xc2028_config	  cfg = {
				.i2c_adap  = &i2c_bus->i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
659
				.fname       = XC2028_DEFAULT_FIRMWARE,
660 661 662 663
				.max_len     = 64,
				.demod       = XC3028_FE_ZARLINK456,
			};

664
			fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
665 666 667 668 669 670
					&cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
	}
671
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
672
	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
673 674
		i2c_bus = &dev->i2c_bus[0];

675
		fe0->dvb.frontend = dvb_attach(zl10353_attach,
676 677
			&dvico_fusionhdtv_xc3028,
			&i2c_bus->i2c_adap);
678
		if (fe0->dvb.frontend != NULL) {
679 680 681 682 683 684
			struct dvb_frontend      *fe;
			struct xc2028_config	  cfg = {
				.i2c_adap  = &dev->i2c_bus[1].i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
685
				.fname       = XC2028_DEFAULT_FIRMWARE,
686 687 688 689
				.max_len     = 64,
				.demod       = XC3028_FE_ZARLINK456,
			};

690
			fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
691 692 693 694
				&cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
695 696 697 698 699 700 701 702 703 704
		break;
	case CX23885_BOARD_TBS_6920:
		i2c_bus = &dev->i2c_bus[0];

		fe0->dvb.frontend = dvb_attach(cx24116_attach,
			&tbs_cx24116_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL)
			fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;

705 706 707 708 709 710 711 712 713 714
		break;
	case CX23885_BOARD_TEVII_S470:
		i2c_bus = &dev->i2c_bus[1];

		fe0->dvb.frontend = dvb_attach(cx24116_attach,
			&tevii_cx24116_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL)
			fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;

715
		break;
716 717 718 719 720 721 722
	case CX23885_BOARD_DVBWORLD_2005:
		i2c_bus = &dev->i2c_bus[1];

		fe0->dvb.frontend = dvb_attach(cx24116_attach,
			&dvbworld_cx24116_config,
			&i2c_bus->i2c_adap);
		break;
723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
		i2c_bus = &dev->i2c_bus[0];
		switch (port->nr) {
		/* port B */
		case 1:
			fe0->dvb.frontend = dvb_attach(stv0900_attach,
							&netup_stv0900_config,
							&i2c_bus->i2c_adap, 0);
			if (fe0->dvb.frontend != NULL) {
				if (dvb_attach(stv6110_attach,
						fe0->dvb.frontend,
						&netup_stv6110_tunerconfig_a,
						&i2c_bus->i2c_adap)) {
					if (!dvb_attach(lnbh24_attach,
							fe0->dvb.frontend,
							&i2c_bus->i2c_adap,
							LNBH24_PCL, 0, 0x09))
						printk(KERN_ERR
							"No LNBH24 found!\n");

				}
			}
			break;
		/* port C */
		case 2:
			fe0->dvb.frontend = dvb_attach(stv0900_attach,
							&netup_stv0900_config,
							&i2c_bus->i2c_adap, 1);
			if (fe0->dvb.frontend != NULL) {
				if (dvb_attach(stv6110_attach,
						fe0->dvb.frontend,
						&netup_stv6110_tunerconfig_b,
						&i2c_bus->i2c_adap)) {
					if (!dvb_attach(lnbh24_attach,
							fe0->dvb.frontend,
							&i2c_bus->i2c_adap,
							LNBH24_PCL, 0, 0x0a))
						printk(KERN_ERR
							"No LNBH24 found!\n");

				}
			}
			break;
		}
		break;
768 769 770 771 772 773 774 775 776 777 778 779 780
	case CX23885_BOARD_MYGICA_X8506:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
			&mygica_x8506_lgs8gl5_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(xc5000_attach,
				fe0->dvb.frontend,
				&i2c_bus2->i2c_adap,
				&mygica_x8506_xc5000_config);
		}
		break;
781
	default:
782 783
		printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
			" isn't supported yet\n",
784 785 786
		       dev->name);
		break;
	}
787
	if (NULL == fe0->dvb.frontend) {
788 789
		printk(KERN_ERR "%s: frontend initialization failed\n",
			dev->name);
790 791
		return -1;
	}
792
	/* define general-purpose callback pointer */
793
	fe0->dvb.frontend->callback = cx23885_tuner_callback;
794 795

	/* Put the analog decoder in standby to keep it quiet */
796
	call_all(dev, tuner, s_standby);
797

798 799
	if (fe0->dvb.frontend->ops.analog_ops.standby)
		fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
800

801
	/* register everything */
802
	ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
803
		&dev->pci->dev, adapter_nr, 0);
804

805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828
	/* init CI & MAC */
	switch (dev->board) {
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
		static struct netup_card_info cinfo;

		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
		memcpy(port->frontends.adapter.proposed_mac,
				cinfo.port[port->nr - 1].mac, 6);
		printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC="
			"%02X:%02X:%02X:%02X:%02X:%02X\n",
			port->nr,
			port->frontends.adapter.proposed_mac[0],
			port->frontends.adapter.proposed_mac[1],
			port->frontends.adapter.proposed_mac[2],
			port->frontends.adapter.proposed_mac[3],
			port->frontends.adapter.proposed_mac[4],
			port->frontends.adapter.proposed_mac[5]);

		netup_ci_init(port);
		break;
		}
	}

	return ret;
829 830 831 832
}

int cx23885_dvb_register(struct cx23885_tsport *port)
{
833 834

	struct videobuf_dvb_frontend *fe0;
835
	struct cx23885_dev *dev = port->dev;
836 837 838 839 840 841 842 843 844 845 846 847 848
	int err, i;

	/* Here we need to allocate the correct number of frontends,
	 * as reflected in the cards struct. The reality is that currrently
	 * no cx23885 boards support this - yet. But, if we don't modify this
	 * code then the second frontend would never be allocated (later)
	 * and fail with error before the attach in dvb_register().
	 * Without these changes we risk an OOPS later. The changes here
	 * are for safety, and should provide a good foundation for the
	 * future addition of any multi-frontend cx23885 based boards.
	 */
	printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
		port->num_frontends);
849

850
	for (i = 1; i <= port->num_frontends; i++) {
851
		if (videobuf_dvb_alloc_frontend(
852
			&port->frontends, i) == NULL) {
853 854 855 856 857 858 859
			printk(KERN_ERR "%s() failed to alloc\n", __func__);
			return -ENOMEM;
		}

		fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
		if (!fe0)
			err = -EINVAL;
860

861
		dprintk(1, "%s\n", __func__);
862
		dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
863 864 865 866
			dev->board,
			dev->name,
			dev->pci_bus,
			dev->pci_slot);
867

868
		err = -ENODEV;
869

870 871
		/* dvb stuff */
		/* We have to init the queue for each frontend on a port. */
872 873 874
		printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
		videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
			    &dev->pci->dev, &port->slock,
875 876
			    V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
			    sizeof(struct cx23885_buffer), port);
877
	}
878 879
	err = dvb_register(port);
	if (err != 0)
880 881
		printk(KERN_ERR "%s() dvb_register failed err = %d\n",
			__func__, err);
882 883 884 885 886 887

	return err;
}

int cx23885_dvb_unregister(struct cx23885_tsport *port)
{
888 889
	struct videobuf_dvb_frontend *fe0;

890 891 892 893 894 895 896
	/* FIXME: in an error condition where the we have
	 * an expected number of frontends (attach problem)
	 * then this might not clean up correctly, if 1
	 * is invalid.
	 * This comment only applies to future boards IF they
	 * implement MFE support.
	 */
897
	fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
898
	if (fe0->dvb.frontend)
899
		videobuf_dvb_unregister_bus(&port->frontends);
900

901 902 903 904 905
	switch (port->dev->board) {
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
		netup_ci_exit(port);
		break;
	}
906

907 908
	return 0;
}
909