recv.c 25.0 KB
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/*
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 * Copyright (c) 2008-2009 Atheros Communications Inc.
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 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

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#include "ath9k.h"
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static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
					     struct ieee80211_hdr *hdr)
{
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	struct ieee80211_hw *hw = sc->pri_wiphy->hw;
	int i;

	spin_lock_bh(&sc->wiphy_lock);
	for (i = 0; i < sc->num_sec_wiphy; i++) {
		struct ath_wiphy *aphy = sc->sec_wiphy[i];
		if (aphy == NULL)
			continue;
		if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
		    == 0) {
			hw = aphy->hw;
			break;
		}
	}
	spin_unlock_bh(&sc->wiphy_lock);
	return hw;
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}

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/*
 * Setup and link descriptors.
 *
 * 11N: we can no longer afford to self link the last descriptor.
 * MAC acknowledges BA status as long as it copies frames to host
 * buffer (or rx fifo). This can incorrectly acknowledge packets
 * to a sender if last desc is self-linked.
 */
static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
{
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	struct ath_hw *ah = sc->sc_ah;
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	struct ath_common *common = ath9k_hw_common(ah);
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	struct ath_desc *ds;
	struct sk_buff *skb;

	ATH_RXBUF_RESET(bf);

	ds = bf->bf_desc;
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	ds->ds_link = 0; /* link to null */
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	ds->ds_data = bf->bf_buf_addr;

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	/* virtual addr of the beginning of the buffer. */
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	skb = bf->bf_mpdu;
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	BUG_ON(skb == NULL);
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	ds->ds_vdata = skb->data;

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	/*
	 * setup rx descriptors. The rx_bufsize here tells the hardware
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	 * how much data it can DMA to us and that we are prepared
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	 * to process
	 */
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	ath9k_hw_setuprxdesc(ah, ds,
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			     common->rx_bufsize,
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			     0);

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	if (sc->rx.rxlink == NULL)
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		ath9k_hw_putrxbuf(ah, bf->bf_daddr);
	else
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		*sc->rx.rxlink = bf->bf_daddr;
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	sc->rx.rxlink = &ds->ds_link;
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	ath9k_hw_rxena(ah);
}

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static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
{
	/* XXX block beacon interrupts */
	ath9k_hw_setantenna(sc->sc_ah, antenna);
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	sc->rx.defant = antenna;
	sc->rx.rxotherant = 0;
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}

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/* Assumes you've already done the endian to CPU conversion */
static bool ath9k_rx_accept(struct ath_common *common,
			    struct sk_buff *skb,
			    struct ieee80211_rx_status *rxs,
			    struct ath_rx_status *rx_stats,
			    bool *decrypt_error)
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{
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	struct ath_hw *ah = common->ah;
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	struct ieee80211_hdr *hdr;
	__le16 fc;
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	hdr = (struct ieee80211_hdr *) skb->data;
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	fc = hdr->frame_control;

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	if (!rx_stats->rs_datalen)
		return false;
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        /*
         * rs_status follows rs_datalen so if rs_datalen is too large
         * we can take a hint that hardware corrupted it, so ignore
         * those frames.
         */
	if (rx_stats->rs_datalen > common->rx_bufsize)
		return false;
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	if (rx_stats->rs_more) {
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		/*
		 * Frame spans multiple descriptors; this cannot happen yet
		 * as we don't support jumbograms. If not in monitor mode,
		 * discard the frame. Enable this if you want to see
		 * error frames in Monitor mode.
		 */
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		if (ah->opmode != NL80211_IFTYPE_MONITOR)
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			return false;
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	} else if (rx_stats->rs_status != 0) {
		if (rx_stats->rs_status & ATH9K_RXERR_CRC)
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			rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
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		if (rx_stats->rs_status & ATH9K_RXERR_PHY)
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			return false;
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		if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
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			*decrypt_error = true;
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		} else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
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			if (ieee80211_is_ctl(fc))
				/*
				 * Sometimes, we get invalid
				 * MIC failures on valid control frames.
				 * Remove these mic errors.
				 */
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				rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
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			else
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				rxs->flag |= RX_FLAG_MMIC_ERROR;
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		}
		/*
		 * Reject error frames with the exception of
		 * decryption and MIC failures. For monitor mode,
		 * we also ignore the CRC error.
		 */
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		if (ah->opmode == NL80211_IFTYPE_MONITOR) {
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			if (rx_stats->rs_status &
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			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
			      ATH9K_RXERR_CRC))
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				return false;
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		} else {
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			if (rx_stats->rs_status &
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			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
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				return false;
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			}
		}
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	}
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	return true;
}

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static u8 ath9k_process_rate(struct ath_common *common,
			     struct ieee80211_hw *hw,
			     struct ath_rx_status *rx_stats,
			     struct ieee80211_rx_status *rxs,
			     struct sk_buff *skb)
{
	struct ieee80211_supported_band *sband;
	enum ieee80211_band band;
	unsigned int i = 0;

	band = hw->conf.channel->band;
	sband = hw->wiphy->bands[band];

	if (rx_stats->rs_rate & 0x80) {
		/* HT rate */
		rxs->flag |= RX_FLAG_HT;
		if (rx_stats->rs_flags & ATH9K_RX_2040)
			rxs->flag |= RX_FLAG_40MHZ;
		if (rx_stats->rs_flags & ATH9K_RX_GI)
			rxs->flag |= RX_FLAG_SHORT_GI;
		return rx_stats->rs_rate & 0x7f;
	}

	for (i = 0; i < sband->n_bitrates; i++) {
		if (sband->bitrates[i].hw_value == rx_stats->rs_rate)
			return i;
		if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
			rxs->flag |= RX_FLAG_SHORTPRE;
			return i;
		}
	}

	/* No valid hardware bitrate found -- we should not get here */
	ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
		  "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
	if ((common->debug_mask & ATH_DBG_XMIT))
		print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len);

        return 0;
}

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/*
 * Theory for reporting quality:
 *
 * At a hardware RSSI of 45 you will be able to use MCS 7  reliably.
 * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
 * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
 *
 * MCS 7  is the highets MCS index usable by a 1-stream device.
 * MCS 15 is the highest MCS index usable by a 2-stream device.
 *
 * All ath9k devices are either 1-stream or 2-stream.
 *
 * How many bars you see is derived from the qual reporting.
 *
 * A more elaborate scheme can be used here but it requires tables
 * of SNR/throughput for each possible mode used. For the MCS table
 * you can refer to the wireless wiki:
 *
 * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
 *
 */
static int ath9k_compute_qual(struct ieee80211_hw *hw,
			      struct ath_rx_status *rx_stats)
{
	int qual;

	if (conf_is_ht(&hw->conf))
		qual =  rx_stats->rs_rssi * 100 / 45;
	else
		qual =  rx_stats->rs_rssi * 100 / 35;

	/*
	 * rssi can be more than 45 though, anything above that
	 * should be considered at 100%
	 */
	if (qual > 100)
		qual = 100;

	return qual;
}

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static void ath9k_process_rssi(struct ath_common *common,
			       struct ieee80211_hw *hw,
			       struct sk_buff *skb,
			       struct ath_rx_status *rx_stats)
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{
	struct ath_hw *ah = common->ah;
	struct ieee80211_sta *sta;
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	struct ieee80211_hdr *hdr;
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	struct ath_node *an;
	int last_rssi = ATH_RSSI_DUMMY_MARKER;
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	__le16 fc;
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	hdr = (struct ieee80211_hdr *)skb->data;
	fc = hdr->frame_control;
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	rcu_read_lock();
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	/* XXX: use ieee80211_find_sta! */
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	sta = ieee80211_find_sta_by_hw(hw, hdr->addr2);
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	if (sta) {
		an = (struct ath_node *) sta->drv_priv;
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		if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
		   !rx_stats->rs_moreaggr)
			ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
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		last_rssi = an->last_rssi;
	}
	rcu_read_unlock();

	if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
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		rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
					      ATH_RSSI_EP_MULTIPLIER);
	if (rx_stats->rs_rssi < 0)
		rx_stats->rs_rssi = 0;
	else if (rx_stats->rs_rssi > 127)
		rx_stats->rs_rssi = 127;
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	/* Update Beacon RSSI, this is used by ANI. */
	if (ieee80211_is_beacon(fc))
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		ah->stats.avgbrssi = rx_stats->rs_rssi;
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}

/*
 * For Decrypt or Demic errors, we only mark packet status here and always push
 * up the frame up to let mac80211 handle the actual error case, be it no
 * decryption key or real decryption error. This let us keep statistics there.
 */
static int ath_rx_prepare(struct ath_common *common,
			  struct ieee80211_hw *hw,
			  struct sk_buff *skb, struct ath_rx_status *rx_stats,
			  struct ieee80211_rx_status *rx_status,
			  bool *decrypt_error)
{
	struct ath_hw *ah = common->ah;

	if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error))
		goto rx_next;

	ath9k_process_rssi(common, hw, skb, rx_stats);
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	rx_status->rate_idx = ath9k_process_rate(common, hw,
						 rx_stats, rx_status, skb);
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	rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp);
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	rx_status->band = hw->conf.channel->band;
	rx_status->freq = hw->conf.channel->center_freq;
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	rx_status->noise = common->ani.noise_floor;
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	rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
	rx_status->antenna = rx_stats->rs_antenna;
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	rx_status->qual = ath9k_compute_qual(hw, rx_stats);
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	rx_status->flag |= RX_FLAG_TSFT;

	return 1;
rx_next:
	return 0;
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}

static void ath_opmode_init(struct ath_softc *sc)
{
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	struct ath_hw *ah = sc->sc_ah;
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	struct ath_common *common = ath9k_hw_common(ah);

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	u32 rfilt, mfilt[2];

	/* configure rx filter */
	rfilt = ath_calcrxfilter(sc);
	ath9k_hw_setrxfilter(ah, rfilt);

	/* configure bssid mask */
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	if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
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		ath_hw_setbssidmask(common);
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	/* configure operational mode */
	ath9k_hw_setopmode(ah);

	/* Handle any link-level address change. */
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	ath9k_hw_setmac(ah, common->macaddr);
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	/* calculate and install multicast filter */
	mfilt[0] = mfilt[1] = ~0;
	ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
}

int ath_rx_init(struct ath_softc *sc, int nbufs)
{
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	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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	struct sk_buff *skb;
	struct ath_buf *bf;
	int error = 0;

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	spin_lock_init(&sc->rx.rxflushlock);
	sc->sc_flags &= ~SC_OP_RXFLUSH;
	spin_lock_init(&sc->rx.rxbuflock);
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	common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
				     min(common->cachelsz, (u16)64));
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	ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
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		  common->cachelsz, common->rx_bufsize);
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	/* Initialize rx descriptors */
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	error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
				  "rx", nbufs, 1);
	if (error != 0) {
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		ath_print(common, ATH_DBG_FATAL,
			  "failed to allocate rx descriptors: %d\n", error);
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		goto err;
	}
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	list_for_each_entry(bf, &sc->rx.rxbuf, list) {
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		skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
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		if (skb == NULL) {
			error = -ENOMEM;
			goto err;
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		}

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		bf->bf_mpdu = skb;
		bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
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						 common->rx_bufsize,
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						 DMA_FROM_DEVICE);
		if (unlikely(dma_mapping_error(sc->dev,
					       bf->bf_buf_addr))) {
			dev_kfree_skb_any(skb);
			bf->bf_mpdu = NULL;
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			ath_print(common, ATH_DBG_FATAL,
				  "dma_mapping_error() on RX init\n");
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			error = -ENOMEM;
			goto err;
		}
		bf->bf_dmacontext = bf->bf_buf_addr;
	}
	sc->rx.rxlink = NULL;
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err:
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	if (error)
		ath_rx_cleanup(sc);

	return error;
}

void ath_rx_cleanup(struct ath_softc *sc)
{
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	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
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	struct sk_buff *skb;
	struct ath_buf *bf;

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	list_for_each_entry(bf, &sc->rx.rxbuf, list) {
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		skb = bf->bf_mpdu;
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		if (skb) {
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			dma_unmap_single(sc->dev, bf->bf_buf_addr,
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					 common->rx_bufsize, DMA_FROM_DEVICE);
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			dev_kfree_skb(skb);
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		}
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	}

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	if (sc->rx.rxdma.dd_desc_len != 0)
		ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
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}

/*
 * Calculate the receive filter according to the
 * operating mode and state:
 *
 * o always accept unicast, broadcast, and multicast traffic
 * o maintain current state of phy error reception (the hal
 *   may enable phy error frames for noise immunity work)
 * o probe request frames are accepted only when operating in
 *   hostap, adhoc, or monitor modes
 * o enable promiscuous mode according to the interface state
 * o accept beacons:
 *   - when operating in adhoc mode so the 802.11 layer creates
 *     node table entries for peers,
 *   - when operating in station mode for collecting rssi data when
 *     the station is otherwise quiet, or
 *   - when operating as a repeater so we see repeater-sta beacons
 *   - when scanning
 */

u32 ath_calcrxfilter(struct ath_softc *sc)
{
#define	RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
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	u32 rfilt;

	rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
		| ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
		| ATH9K_RX_FILTER_MCAST;

	/* If not a STA, enable processing of Probe Requests */
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	if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
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		rfilt |= ATH9K_RX_FILTER_PROBEREQ;

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	/*
	 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
	 * mode interface or when in monitor mode. AP mode does not need this
	 * since it receives all in-BSS frames anyway.
	 */
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	if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
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	     (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
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	    (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
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		rfilt |= ATH9K_RX_FILTER_PROM;

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	if (sc->rx.rxfilter & FIF_CONTROL)
		rfilt |= ATH9K_RX_FILTER_CONTROL;

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	if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
	    !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
		rfilt |= ATH9K_RX_FILTER_MYBEACON;
	else
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		rfilt |= ATH9K_RX_FILTER_BEACON;

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	if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
	    AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
	    (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
	    (sc->rx.rxfilter & FIF_PSPOLL))
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		rfilt |= ATH9K_RX_FILTER_PSPOLL;
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	if (conf_is_ht(&sc->hw->conf))
		rfilt |= ATH9K_RX_FILTER_COMP_BAR;

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	if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
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		/* TODO: only needed if more than one BSSID is in use in
		 * station/adhoc mode */
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		/* The following may also be needed for other older chips */
		if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
			rfilt |= ATH9K_RX_FILTER_PROM;
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		rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
	}

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	return rfilt;
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#undef RX_FILTER_PRESERVE
}

int ath_startrecv(struct ath_softc *sc)
{
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	struct ath_hw *ah = sc->sc_ah;
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	struct ath_buf *bf, *tbf;

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	spin_lock_bh(&sc->rx.rxbuflock);
	if (list_empty(&sc->rx.rxbuf))
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		goto start_recv;

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	sc->rx.rxlink = NULL;
	list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
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		ath_rx_buf_link(sc, bf);
	}

	/* We could have deleted elements so the list may be empty now */
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	if (list_empty(&sc->rx.rxbuf))
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		goto start_recv;

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	bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
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	ath9k_hw_putrxbuf(ah, bf->bf_daddr);
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	ath9k_hw_rxena(ah);
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start_recv:
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	spin_unlock_bh(&sc->rx.rxbuflock);
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	ath_opmode_init(sc);
	ath9k_hw_startpcureceive(ah);

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	return 0;
}

bool ath_stoprecv(struct ath_softc *sc)
{
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	struct ath_hw *ah = sc->sc_ah;
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	bool stopped;

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	ath9k_hw_stoppcurecv(ah);
	ath9k_hw_setrxfilter(ah, 0);
	stopped = ath9k_hw_stopdmarecv(ah);
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	sc->rx.rxlink = NULL;
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	return stopped;
}

void ath_flushrecv(struct ath_softc *sc)
{
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	spin_lock_bh(&sc->rx.rxflushlock);
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	sc->sc_flags |= SC_OP_RXFLUSH;
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	ath_rx_tasklet(sc, 1);
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	sc->sc_flags &= ~SC_OP_RXFLUSH;
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	spin_unlock_bh(&sc->rx.rxflushlock);
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}

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static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
{
	/* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
	struct ieee80211_mgmt *mgmt;
	u8 *pos, *end, id, elen;
	struct ieee80211_tim_ie *tim;

	mgmt = (struct ieee80211_mgmt *)skb->data;
	pos = mgmt->u.beacon.variable;
	end = skb->data + skb->len;

	while (pos + 2 < end) {
		id = *pos++;
		elen = *pos++;
		if (pos + elen > end)
			break;

		if (id == WLAN_EID_TIM) {
			if (elen < sizeof(*tim))
				break;
			tim = (struct ieee80211_tim_ie *) pos;
			if (tim->dtim_count != 0)
				break;
			return tim->bitmap_ctrl & 0x01;
		}

		pos += elen;
	}

	return false;
}

static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
{
	struct ieee80211_mgmt *mgmt;
586
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
587 588 589 590 591

	if (skb->len < 24 + 8 + 2 + 2)
		return;

	mgmt = (struct ieee80211_mgmt *)skb->data;
592
	if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
593 594
		return; /* not from our current AP */

595 596
	sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;

597 598
	if (sc->sc_flags & SC_OP_BEACON_SYNC) {
		sc->sc_flags &= ~SC_OP_BEACON_SYNC;
599 600 601
		ath_print(common, ATH_DBG_PS,
			  "Reconfigure Beacon timers based on "
			  "timestamp from the AP\n");
602 603 604
		ath_beacon_config(sc, NULL);
	}

605 606 607
	if (ath_beacon_dtim_pending_cab(skb)) {
		/*
		 * Remain awake waiting for buffered broadcast/multicast
608 609 610 611
		 * frames. If the last broadcast/multicast frame is not
		 * received properly, the next beacon frame will work as
		 * a backup trigger for returning into NETWORK SLEEP state,
		 * so we are waiting for it as well.
612
		 */
613 614
		ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
			  "buffered broadcast/multicast frame(s)\n");
615
		sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
616 617 618 619 620 621 622 623 624
		return;
	}

	if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
		/*
		 * This can happen if a broadcast frame is dropped or the AP
		 * fails to send a frame indicating that all CAB frames have
		 * been delivered.
		 */
625
		sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
626 627
		ath_print(common, ATH_DBG_PS,
			  "PS wait for CAB frames timed out\n");
628 629 630 631 632 633
	}
}

static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
{
	struct ieee80211_hdr *hdr;
634
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
635 636 637 638

	hdr = (struct ieee80211_hdr *)skb->data;

	/* Process Beacon and CAB receive in PS state */
639 640
	if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
	    ieee80211_is_beacon(hdr->frame_control))
641 642 643 644 645 646 647 648 649 650
		ath_rx_ps_beacon(sc, skb);
	else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
		 (ieee80211_is_data(hdr->frame_control) ||
		  ieee80211_is_action(hdr->frame_control)) &&
		 is_multicast_ether_addr(hdr->addr1) &&
		 !ieee80211_has_moredata(hdr->frame_control)) {
		/*
		 * No more broadcast/multicast frames to be received at this
		 * point.
		 */
651
		sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
652 653
		ath_print(common, ATH_DBG_PS,
			  "All PS CAB frames received, back to sleep\n");
654 655 656 657
	} else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
		   !is_multicast_ether_addr(hdr->addr1) &&
		   !ieee80211_has_morefrags(hdr->frame_control)) {
		sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
658 659 660
		ath_print(common, ATH_DBG_PS,
			  "Going back to sleep after having received "
			  "PS-Poll data (0x%x)\n",
661 662 663 664
			sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
					SC_OP_WAIT_FOR_CAB |
					SC_OP_WAIT_FOR_PSPOLL_DATA |
					SC_OP_WAIT_FOR_TX_ACK));
665 666 667
	}
}

668 669
static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
				    struct ath_softc *sc, struct sk_buff *skb,
670
				    struct ieee80211_rx_status *rxs)
671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689
{
	struct ieee80211_hdr *hdr;

	hdr = (struct ieee80211_hdr *)skb->data;

	/* Send the frame to mac80211 */
	if (is_multicast_ether_addr(hdr->addr1)) {
		int i;
		/*
		 * Deliver broadcast/multicast frames to all suitable
		 * virtual wiphys.
		 */
		/* TODO: filter based on channel configuration */
		for (i = 0; i < sc->num_sec_wiphy; i++) {
			struct ath_wiphy *aphy = sc->sec_wiphy[i];
			struct sk_buff *nskb;
			if (aphy == NULL)
				continue;
			nskb = skb_copy(skb, GFP_ATOMIC);
690 691 692
			if (!nskb)
				continue;
			ieee80211_rx(aphy->hw, nskb);
693
		}
694
		ieee80211_rx(sc->hw, skb);
695
	} else
696
		/* Deliver unicast frames based on receiver address */
697
		ieee80211_rx(hw, skb);
698 699
}

700 701 702
int ath_rx_tasklet(struct ath_softc *sc, int flush)
{
#define PA2DESC(_sc, _pa)                                               \
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	((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc +		\
			     ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
705

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	struct ath_buf *bf;
707
	struct ath_desc *ds;
708
	struct ath_rx_status *rx_stats;
709
	struct sk_buff *skb = NULL, *requeue_skb;
710
	struct ieee80211_rx_status *rxs;
711
	struct ath_hw *ah = sc->sc_ah;
712
	struct ath_common *common = ath9k_hw_common(ah);
713 714 715 716 717 718
	/*
	 * The hw can techncically differ from common->hw when using ath9k
	 * virtual wiphy so to account for that we iterate over the active
	 * wiphys and find the appropriate wiphy and therefore hw.
	 */
	struct ieee80211_hw *hw = NULL;
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	struct ieee80211_hdr *hdr;
	int hdrlen, padsize, retval;
	bool decrypt_error = false;
	u8 keyix;
723
	__le16 fc;
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724

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	spin_lock_bh(&sc->rx.rxbuflock);
726 727 728

	do {
		/* If handling rx interrupt and flush is in progress => exit */
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		if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
730 731
			break;

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		if (list_empty(&sc->rx.rxbuf)) {
			sc->rx.rxlink = NULL;
734 735 736
			break;
		}

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		bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
738 739 740 741 742 743 744 745 746 747 748 749 750
		ds = bf->bf_desc;

		/*
		 * Must provide the virtual address of the current
		 * descriptor, the physical address, and the virtual
		 * address of the next descriptor in the h/w chain.
		 * This allows the HAL to look ahead to see if the
		 * hardware is done with a descriptor by checking the
		 * done bit in the following descriptor and the address
		 * of the current descriptor the DMA engine is working
		 * on.  All this is necessary because of our use of
		 * a self-linked list to avoid rx overruns.
		 */
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		retval = ath9k_hw_rxprocdesc(ah, ds,
752 753 754 755 756 757 758
					     bf->bf_daddr,
					     PA2DESC(sc, ds->ds_link),
					     0);
		if (retval == -EINPROGRESS) {
			struct ath_buf *tbf;
			struct ath_desc *tds;

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			if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
				sc->rx.rxlink = NULL;
761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777
				break;
			}

			tbf = list_entry(bf->list.next, struct ath_buf, list);

			/*
			 * On some hardware the descriptor status words could
			 * get corrupted, including the done bit. Because of
			 * this, check if the next descriptor's done bit is
			 * set or not.
			 *
			 * If the next descriptor's done bit is set, the current
			 * descriptor has been corrupted. Force s/w to discard
			 * this descriptor and continue...
			 */

			tds = tbf->bf_desc;
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			retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
					     PA2DESC(sc, tds->ds_link), 0);
780 781 782 783 784 785
			if (retval == -EINPROGRESS) {
				break;
			}
		}

		skb = bf->bf_mpdu;
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		if (!skb)
787 788
			continue;

789 790 791 792 793
		/*
		 * Synchronize the DMA transfer with CPU before
		 * 1. accessing the frame
		 * 2. requeueing the same buffer to h/w
		 */
794
		dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
795
				common->rx_bufsize,
796
				DMA_FROM_DEVICE);
797

798
		hdr = (struct ieee80211_hdr *) skb->data;
799 800
		rxs =  IEEE80211_SKB_RXCB(skb);

801
		hw = ath_get_virt_hw(sc, hdr);
802
		rx_stats = &ds->ds_rxstat;
803

804
		/*
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		 * If we're asked to flush receive queue, directly
		 * chain it back at the queue without processing it.
807
		 */
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		if (flush)
809
			goto requeue;
810

811
		if (!ath_rx_prepare(common, hw, skb, rx_stats,
812
				    rxs, &decrypt_error))
813 814 815 816
			goto requeue;

		/* Ensure we always have an skb to requeue once we are done
		 * processing the current buffer's skb */
817
		requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
818 819 820

		/* If there is no memory we ignore the current RX'd frame,
		 * tell hardware it can give us a new frame using the old
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		 * skb and put it at the tail of the sc->rx.rxbuf list for
822 823 824
		 * processing. */
		if (!requeue_skb)
			goto requeue;
825

826
		/* Unmap the frame */
827
		dma_unmap_single(sc->dev, bf->bf_buf_addr,
828
				 common->rx_bufsize,
829
				 DMA_FROM_DEVICE);
830

831
		skb_put(skb, rx_stats->rs_datalen);
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		/* see if any padding is done by the hw and remove it */
		hdrlen = ieee80211_get_hdrlen_from_skb(skb);
835
		fc = hdr->frame_control;
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837 838 839 840 841 842 843 844 845 846
		/* The MAC header is padded to have 32-bit boundary if the
		 * packet payload is non-zero. The general calculation for
		 * padsize would take into account odd header lengths:
		 * padsize = (4 - hdrlen % 4) % 4; However, since only
		 * even-length headers are used, padding can only be 0 or 2
		 * bytes and we can optimize this a bit. In addition, we must
		 * not try to remove padding from short control frames that do
		 * not have payload. */
		padsize = hdrlen & 3;
		if (padsize && hdrlen >= 24) {
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			memmove(skb->data + padsize, skb->data, hdrlen);
			skb_pull(skb, padsize);
849 850
		}

851
		keyix = rx_stats->rs_keyix;
852

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853
		if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
854
			rxs->flag |= RX_FLAG_DECRYPTED;
855
		} else if (ieee80211_has_protected(fc)
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856 857 858
			   && !decrypt_error && skb->len >= hdrlen + 4) {
			keyix = skb->data[hdrlen + 3] >> 6;

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859
			if (test_bit(keyix, sc->keymap))
860
				rxs->flag |= RX_FLAG_DECRYPTED;
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861
		}
862
		if (ah->sw_mgmt_crypto &&
863 864
		    (rxs->flag & RX_FLAG_DECRYPTED) &&
		    ieee80211_is_mgmt(fc))
865
			/* Use software decrypt for management frames. */
866
			rxs->flag &= ~RX_FLAG_DECRYPTED;
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868 869
		/* We will now give hardware our shiny new allocated skb */
		bf->bf_mpdu = requeue_skb;
870
		bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
871 872
						 common->rx_bufsize,
						 DMA_FROM_DEVICE);
873
		if (unlikely(dma_mapping_error(sc->dev,
874 875 876
			  bf->bf_buf_addr))) {
			dev_kfree_skb_any(requeue_skb);
			bf->bf_mpdu = NULL;
877 878
			ath_print(common, ATH_DBG_FATAL,
				  "dma_mapping_error() on RX\n");
879
			ath_rx_send_to_mac80211(hw, sc, skb, rxs);
880 881
			break;
		}
882
		bf->bf_dmacontext = bf->bf_buf_addr;
883 884 885 886 887

		/*
		 * change the default rx antenna if rx diversity chooses the
		 * other antenna 3 times in a row.
		 */
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888 889
		if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
			if (++sc->rx.rxotherant >= 3)
890
				ath_setdefantenna(sc, rx_stats->rs_antenna);
891
		} else {
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892
			sc->rx.rxotherant = 0;
893
		}
894

895
		if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
896
					     SC_OP_WAIT_FOR_CAB |
897
					     SC_OP_WAIT_FOR_PSPOLL_DATA)))
898 899
			ath_rx_ps(sc, skb);

900
		ath_rx_send_to_mac80211(hw, sc, skb, rxs);
901

902
requeue:
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903
		list_move_tail(&bf->list, &sc->rx.rxbuf);
904
		ath_rx_buf_link(sc, bf);
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905 906
	} while (1);

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907
	spin_unlock_bh(&sc->rx.rxbuflock);
908 909 910 911

	return 0;
#undef PA2DESC
}