It no longer uses CPUArchState.

Prepares for changing qemu_kvm_cpu_thread_fn() opaque to CPUState.
Reviewed-by: NRichard Henderson <rth@twiddle.net>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

It no longer needs CPUArchState.

Prepares for changing all_cpu_threads_idle() CPU loop to CPUState and
needed for changing qemu_kvm_wait_io_event() argument to CPUState.
Reviewed-by: NRichard Henderson <rth@twiddle.net>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

It no longer depends on CPUArchState, so move it to qom/cpu.c.

Prepares for changing GDBState::c_cpu to CPUState.
Signed-off-by: NAndreas Färber <afaerber@suse.de>

Change Monitor::mon_cpu to CPUState as well.
Reviewed-by: Nliguang <lig.fnst@cn.fujitsu.com>
Acked-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

It no longer relies on CPUArchState since 20d695a9.
Reviewed-by: Nliguang <lig.fnst@cn.fujitsu.com>
Acked-by: NPaolo Bonzini <pbonzini@redhat.com>
Reviewed-by: NRichard Henderson <rth@twiddle.net>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

Use qemu_get_cpu() and CPUState::env_ptr.
Reviewed-by: NRichard Henderson <rth@twiddle.net>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

A few targets already managed to implement cpu_save() and cpu_load()
without defining CPU_SAVE_VERSION that causes them to be registered.

Guard the prototypes with CPU_SAVE_VERSION to avoid this happening again
until all targets are converted to VMState (or QIDL).
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

Since commit e67db06e (target-or32: Add
target stubs and QOM cpu) a VMStateDescription existed, but
CPU_SAVE_VERSION was not set, so it was never registered.

Drop cpu_{save,load}() and register VMStateDescription via DeviceState.
Use a version_id of 1 and specify minimum versions as well.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

Commit b758aca1 (target-alpha: Enable
the alpha-softmmu target.) introduced cpu_{save,load}() functions but
didn't define CPU_SAVE_VERSION, so they were never registered.

Drop cpu_{save,load}() and register the VMStateDescription via DeviceClass.
This operates on the AlphaCPU object instead of CPUAlphaState.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Acked-by: NRichard Henderson <rth@twiddle.net>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

To be used to embed common CPU state into CPU subclasses.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

It's the equivalent to cpu_class_set_vmsd(), to assign
DeviceClass::vmsd. It wasn't needed before since only static,
unmigratable VMStateDescriptions were assigned so far.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

It's CPUClass::vmsd, not CPUState::vmsd.
Reviewed-by: Nliguang <lig.fnst@cn.fujitsu.com>
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

Fix compilation failures for linux-user targets following recent
migration related commits bd2fa51f and 43487c67.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Message-id: 1372362818-4740-1-git-send-email-peter.maydell@linaro.org
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

# By Michael R. Hines (9) and others
# Via Juan Quintela
* quintela/migration.next:
  rdma: introduce capability x-rdma-pin-all
  rdma: new QEMUFileOps hooks
  rdma: introduce qemu_ram_foreach_block()
  rdma: export qemu_fflush()
  rdma: introduce qemu_file_mode_is_not_valid()
  rdma: export throughput w/ MigrationStats QMP
  rdma: export yield_until_fd_readable()
  rdma: introduce qemu_update_position()
  rdma: add documentation
  migration: do not overwrite zero pages
  Revert "migration: do not sent zero pages in bulk stage"
  arch_init/ram_load: add error message for block length mismatch

Message-id: 1372329455-5995-1-git-send-email-quintela@redhat.com
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

This capability allows you to disable dynamic chunk registration
for better throughput on high-performance links.

For example, using an 8GB RAM virtual machine with all 8GB of memory in
active use and the VM itself is completely idle using a 40 gbps infiniband link:

1. x-rdma-pin-all disabled total time: approximately 7.5 seconds @ 9.5 Gbps
2. x-rdma-pin-all enabled total time: approximately 4 seconds @ 26 Gbps

These numbers would of course scale up to whatever size virtual machine
you have to migrate using RDMA.

Enabling this feature does *not* have any measurable affect on
migration *downtime*. This is because, without this feature, all of the
memory will have already been registered already in advance during
the bulk round and does not need to be re-registered during the successive
iteration rounds.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
Reviewed-by: NChegu Vinod <chegu_vinod@hp.com>
Reviewed-by: NEric Blake <eblake@redhat.com>
Tested-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

These are the prototypes and implementation of new hooks that
RDMA takes advantage of to perform dynamic page registration.

An optional hook is also introduced for a custom function
to be able to override the default save_page function.

Also included are the prototypes and accessor methods used by
arch_init.c which invoke funtions inside savevm.c to call out
to the hooks that may or may not have been overridden
inside of QEMUFileOps.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
Reviewed-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

This is used during RDMA initialization in order to
transmit a description of all the RAM blocks to the
peer for later dynamic chunk registration purposes.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
Reviewed-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

RDMA uses this to flush the control channel before sending its
own message to handle page registrations.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
Reviewed-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

QEMUFileRDMA also has read and write modes. This function is now
shared to reduce code duplication.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
Reviewed-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

This exposes throughput (in megabits/sec) through QMP.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
Reviewed-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

The RDMA event channel can be made non-blocking just like a TCP
socket. Exporting this function allows us to yield so that the
QEMU monitor remains available.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
Reviewed-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

RDMA writes happen asynchronously, and thus the performance accounting
also needs to be able to occur asynchronously. This allows anybody
to call into savevm.c to update both f->pos as well as into arch_init.c
to update the acct_info structure with up-to-date values when
the RDMA transfer actually completes.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Tested-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

docs/rdma.txt contains full documentation,
wiki links, github url and contact information.
Reviewed-by: NJuan Quintela <quintela@redhat.com>
Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
Reviewed-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NChegu Vinod <chegu_vinod@hp.com>
Tested-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NMichael R. Hines <mrhines@us.ibm.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

on incoming migration do not memset pages to zero if they already read as zero.
this will allocate a new zero page and consume memory unnecessarily. even
if we madvise a MADV_DONTNEED later this will only deallocate the memory
asynchronously.
Signed-off-by: NPeter Lieven <pl@kamp.de>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

Not sending zero pages breaks migration if a page is zero
at the source but not at the destination. This can e.g. happen
if different BIOS versions are used at source and destination.
It has also been reported that migration on pseries is completely
broken with this patch.

This effectively reverts commit f1c72795.

Conflicts:

	arch_init.c
Signed-off-by: NPeter Lieven <pl@kamp.de>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

Makes it easier to debug situations where the source and target have
different ram blocks in a device and migration fails due to that, for
instance a BAR size change on a PCI device.
Signed-off-by: NAlon Levy <alevy@redhat.com>
Signed-off-by: NJuan Quintela <quintela@redhat.com>

# By Peter Crosthwaite (3) and others
# Via Peter Maydell
* pmaydell/arm-devs.for-upstream:
  nand: Don't inherit from Sysbus
  block/nand: Convert Sysbus::init to Device::realize
  block/nand: QOM casting sweep
  i.MX31: Fix PRCS bit test
  arm/boot: Free dtb blob memory after use
  i.MX: Rework functions/types name and use new style initialization
  i.MX: Implement a more complete version of the GPT timer.
  ARM: Allow dumping of device tree

Message-id: 1372184516-32397-1-git-send-email-peter.maydell@linaro.org
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

# By Peter Maydell
# Via Peter Maydell
* pmaydell/target-arm.for-upstream:
  target-arm: Make LPAE feature imply V7MP
  target-arm: Use tuple list to sync cp regs with KVM
  target-arm: Reinitialize all KVM VCPU registers on reset
  target-arm: Initialize cpreg list from KVM when using KVM
  target-arm: Convert TCG to using (index,value) list for cp migration
  target-arm: mark up cpregs for no-migrate or raw access
  target-arm: Add raw_readfn and raw_writefn to ARMCPRegInfo
  target-arm: Allow special cpregs to have flags set

Message-id: 1372181592-32170-1-git-send-email-peter.maydell@linaro.org
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

# By Cornelia Huck (2) and Christian Borntraeger (1)
# Via Cornelia Huck
* cohuck/virtio-ccw-upstr:
  virtio-ccw: Wire up guest and host notifies.
  virtio-ccw: Wire up ioeventfd.
  s390/virtio-ccw: Fix virtio reset

Message-id: 1372177538-9812-1-git-send-email-cornelia.huck@de.ibm.com
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

# By Paul Durrant (2) and Stefano Stabellini (1)
# Via Stefano Stabellini
* sstabellini/xen-20130625:
  Move hardcoded initialization of xen-platform device.
  Allow use of pc machine type (accel=xen) for Xen HVM domains.
  Revert "xen: start PCI hole at 0xe0000000 (same as pc_init1 and qemu-xen-traditional)"

Message-id: alpine.DEB.2.02.1306251323220.4782@kaball.uk.xensource.com
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

Nand chips are not sysbus devices - they do not have any sense of MMIO,
nor interrupts. Re-parent to TYPE_DEVICE accordingly.

Cc: afaerber@suse.de
Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

The prescribed transition from Sysbus::init function to a
Device::realize.

Cc: afaerber@suse.de
Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Define and use standard QOM cast macro. Remove usages of DO_UPCAST and
direct -> style casting.

Cc: afaerber@suse.de
Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

cppcheck detected a condition which was always false.

According to the MCIMX31 Reference Manual, the PRCS bits have to be 01
to select the Frequency Pre-Multiplier (FPM). PRCS uses bits 1 and 2,
so we have to test for 2.
Signed-off-by: NStefan Weil <sw@weilnetz.de>
Signed-off-by: NPeter Chubb <peter.chubb@nicta.com.au>
Message-id: 1370810662-32320-1-git-send-email-sw@weilnetz.de
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

The dtb blob returned by load_device_tree() is in memory allocated
with g_malloc(). Free it accordingly once we have copied its
contents into the guest memory. To make this easy, we need also to
clean up the error handling in load_dtb() so that we consistently
handle errors in the same way (by printing a message and then
returning -1, rather than either plowing on or exiting immediately).
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Message-id: 1371209256-11408-1-git-send-email-peter.maydell@linaro.org

* use dynamic cast whenever possible
* Change function names to some more meaningful prefix
* Change type names to a more meaningful one
* use new style device initialization
Signed-off-by: NJean-Christophe DUBOIS <jcd@tribudubois.net>
Message-id: 1369898943-1993-3-git-send-email-jcd@tribudubois.net
Reviewed-by: NPeter Chubb <peter.chubb@nicta.com.au>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

* implement compare 1 2 and 3 registers
* simplify Debug printf
Signed-off-by: NJean-Christophe DUBOIS <jcd@tribudubois.net>
Message-id: 1369898943-1993-2-git-send-email-jcd@tribudubois.net
Reviewed-by: NPeter Chubb <peter.chubb@nicta.com.au>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

By calling qemu_devtree_dumpdtb near the end of load_dtb.
Signed-off-by: NJohn Rigby <john.rigby@linaro.org>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

The v7 ARM ARM specifies that the Large Physical Address
Extension requires implementation of the Multiprocessing
Extensions, so make our LPAE feature imply V7MP rather
than specifying both in the A15 CPU initfn.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Message-id: 1371127899-10364-1-git-send-email-peter.maydell@linaro.org

Use the tuple list of cp registers for syncing KVM state to QEMU,
rather than only syncing a very minimal set by hand.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>