- 25 9月, 2013 18 次提交
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Previously we'd only handle 16-bit offsets from memory operand without falling back to indexed, but it's easy to use ADDIS to handle full 32-bit offsets. This also lets us unify code that existed inline in tcg_out_op for handling addition of large constants. The new R2 temporary was marked reserved for the AIX calling convention, but the register really is call-clobbered and since tcg generated code has no use for a TOC, it's available for use. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Remove conditionalization from tcg_target_reg_alloc_order, relying on reserved_regs to prevent register allocation that shouldn't happen. So R11 is now present in reg_alloc_order for __APPLE__, but also now reserved. Sort reg_alloc_order into call-saved, call-clobbered, and parameters. This reduces the effect of values getting spilled and reloaded before function calls. Whether or not it is reserved, R2 (TOC) is always call-clobbered. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Especially in the user-only configurations, a direct branch into the executable may be in range. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Eliminates one insn per call: : lis r2,4165 -: ori r2,r2,59616 -: ld r0,0(r2) +: ld r0,-5920(r2) : mtctr r0 -: ld r2,8(r2) +: ld r2,-5912(r2) : bctrl Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
There are no helpers that require the static chain. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
While these are rare from code that's been through the optimizer, it's not uncommon within the tcg backend. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Instead of bare N, for clarity. The only (intentional) exception made is for insns that encode R|0, i.e. when R0 encoded into the insn is interpreted as zero not the contents of the register. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Finish conversion of all memory operations. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Whitespace and brace changes only. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
The fix is that sparc has so many mmu modes that the last one overflowed the 16-bit signed offset we assumed would fit. Handle this, and check the new assumption at compile time. Load the tlb addend earlier for the fast path. Remove the explicit address + addend and make use of index addressing. Adjust constraints for qemu_ld64 such that we don't clobber the address register or tlb addend before loading both values. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Saves one insn per slow path. Note that we can no longer use a tail call into the store helper. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Coding style fixes. Use TCGReg enumeration values instead of raw numbers. Don't needlessly pull the whole TCGLabelQemuLdst struct into local variables. Less conditional compilation. No functional changes. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
While these are rare from code that's been through the optimizer, it's not uncommon within the tcg backend. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Paolo Bonzini 提交于
These use a 32-bit load-of-immediate to save a mflr+addi+mtlr sequence. Tested with a Windows 98 guest (pretty much the most recent thing I could run on my PPC machine) and kvm-unit-tests's sieve.flat. The speed up for sieve.flat is as high as 10% for qemu-system-i386, 25% (no kidding) for qemu-system-x86_64 on my PowerBook G4. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Paolo Bonzini 提交于
For the AIX ABI, the function pointer and small area pointer need to be loaded in the trampoline. The trampoline instead is called with a normal BL instruction. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Similar to manually selecting i386 for an x86_64 host. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 24 9月, 2013 6 次提交
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由 Anthony Liguori 提交于
# By Alexey Kardashevskiy # Via Stefan Hajnoczi * stefanha/tracing: kvm: fix traces to use %x instead of %d Message-id: 1379699931-5837-1-git-send-email-stefanha@redhat.com
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由 Anthony Liguori 提交于
# By Aurelien Jarno (1) and Vincenzo Maffione (1) # Via Stefan Hajnoczi * stefanha/net: e1000: NetClientInfo.receive_iov implemented pcnet-pci: mark I/O and MMIO as LITTLE_ENDIAN Message-id: 1379699613-5338-1-git-send-email-stefanha@redhat.com
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由 Anthony Liguori 提交于
# By Stefan Hajnoczi (4) and others # Via Stefan Hajnoczi * stefanha/block: virtio-blk: do not relay a previous driver's WCE configuration to the current blockdev: do not default cache.no-flush to true block: don't lose data from last incomplete sector qcow2: Correct snapshots size for overlap check coroutine: fix /perf/nesting coroutine benchmark coroutine: add qemu_coroutine_yield benchmark qemu-timer: do not take the lock in timer_pending qemu-timer: make qemu_timer_mod_ns() and qemu_timer_del() thread-safe qemu-timer: drop outdated signal safety comments osdep: warn if open(O_DIRECT) on fails with EINVAL libcacard: link against qemu-error.o for error_report() Message-id: 1379698931-946-1-git-send-email-stefanha@redhat.com
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由 Anthony Liguori 提交于
# By Stefan Weil (8) and others # Via Michael Tokarev * mjt/trivial-patches: tests/.gitignore: ignore test-throttle exec: Fix broken build for MinGW (regression) kvm: Fix compiler warning (clang) tcg-sparc: Fix parenthesis warning Makefile: Remove some more files when cleaning target-i386: Fix segment cache dump iov: avoid "orig_len may be used unitialized" warning vscclient: remove unnecessary use of uninitialized variable trace-events: Clean up with scripts/cleanup-trace-events.pl again tci: Fix qemu-alpha on 32 bit hosts (wrong assertions) *-user: Improve documentation for lock_user function MAINTAINERS: Add missing entry to filelist for TCI target translate-all: Fix formatting of dump output *-user: Fix typo in comment (ulocking -> unlocking) docs: Fix IO port number for CPU present bitmap. q35: Fix typo in constant DEFUALT -> DEFAULT. configure: Undefine _FORTIFY_SOURCE prior using it Message-id: 1379696296-32105-1-git-send-email-mjt@msgid.tls.msk.ru
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由 Anthony Liguori 提交于
# By Alexey Kardashevskiy (3) and others # Via Paolo Bonzini * qemu-kvm/uq/master: target-i386: add feature kvm_pv_unhalt linux-headers: update to 3.12-rc1 target-i386: forward CPUID cache leaves when -cpu host is used linux-headers: update to 3.11 kvm: fix traces to use %x instead of %d kvmvapic: Clear also physical ROM address when entering INACTIVE state kvmvapic: Enter inactive state on hardware reset kvmvapic: Catch invalid ROM size kvm irqfd: support direct msimessage to irq translation fix steal time MSR vmsd callback to proper opaque type kvm: warn if num cpus is greater than num recommended cpu: Move cpu state syncs up into cpu_dump_state() exec: always use MADV_DONTFORK Message-id: 1379694292-1601-1-git-send-email-pbonzini@redhat.com
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由 Anthony Liguori 提交于
# By Hervé Poussineau (5) and Stefan Weil (1) # Via Paolo Bonzini * bonzini/scsi-next: block/iscsi: Drop iscsi_co_get_block_status for older versions of libiscsi lsi: add 53C810 variant lsi: remove todo lsi: ignore write accesses to CTEST0 registers lsi: check ssid versus sdid only if ssid is valid lsi: use constant name instead of its value
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- 21 9月, 2013 16 次提交
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由 Alexey Kardashevskiy 提交于
KVM request types are normally defined using hex constants but QEMU traces print decimal values instead, which is not very convenient. This changes the request type format from %d to %x. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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由 Vincenzo Maffione 提交于
This patch implements the NetClientInfo.receive_iov method for the e1000 device emulation. In this way a network backend that uses qemu_sendv_packet() can deliver the fragmented packet without requiring an additional copy in the frontend/backend network code (nc_sendv_compat() function). The existing method NetClientInfo.receive has been reimplemented using the new method. Signed-off-by: NVincenzo Maffione <v.maffione@gmail.com> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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由 Aurelien Jarno 提交于
Now that the memory subsystem is propagating the endianness correctly, the pcnet-pci device should have its I/O ports and MMIO memory marked as LITTLE_ENDIAN, as PCI devices are little endian. This makes the pcnet-pci NIC to work again on big endian MIPS Malta (default NIC). Cc: qemu-stable@nongnu.org Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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由 Paolo Bonzini 提交于
The following sequence happens: - the SeaBIOS virtio-blk driver does not support the WCE feature, which causes QEMU to disable writeback caching - the Linux virtio-blk driver resets the device, finds WCE is available but writeback caching is disabled; tells block layer to not send cache flush commands - the Linux virtio-blk driver sets the DRIVER_OK bit, which causes writeback caching to be re-enabled, but the Linux virtio-blk driver does not know of this side effect and cache flushes remain disabled The bug is at the third step. If the guest does know about CONFIG_WCE, QEMU should ignore the WCE feature's state. The guest will control the cache mode solely using configuration space. This change makes Linux do flushes correctly, but Linux will keep SeaBIOS's writethrough mode. Hence, whenever the guest is reset, the cache mode of the disk should be reset to whatever was specified in the "-drive" option. With this change, the Linux virtio-blk driver finds that writeback caching is enabled, and tells the block layer to send cache flush commands appropriately. Reported-by: Rusty Russell <rusty@au1.ibm.com Cc: qemu-stable@nongnu.org Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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由 Paolo Bonzini 提交于
That's why all my VMs were so fast lately. :) This changed in 1.6.0 by mistake in patch 29c4e2b5 (blockdev: Split up 'cache' option, 2013-07-18). Cc: qemu-stable@nongnu.org Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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由 Fam Zheng 提交于
To read the last sector that is not aligned to sector boundary, current code for growable backends, since commit 893a8f62 "block: Produce zeros when protocols reading beyond end of file", drops the data and directly returns zeroes. That is incorrect. Signed-off-by: NFam Zheng <famz@redhat.com> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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由 Fam Zheng 提交于
Signed-off-by: NFam Zheng <famz@redhat.com> Reviewed-by: NBenoit Canet <benoit@irqsave.net> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Stefan Weil 提交于
Commit 3435f395 reduced the ifdeffery with this result for MinGW: exec.c: In function ‘qemu_ram_free’: exec.c:1239:17: warning: implicit declaration of function ‘munmap’ [-Wimplicit-function-declaration] exec.c:1239:17: warning: nested extern declaration of ‘munmap’ [-Wnested-externs] exec.c:1239: undefined reference to `munmap' Add some ifdeffery again to fix this. Signed-off-by: NStefan Weil <sw@weilnetz.de> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Stefan Weil 提交于
Report from clang analyzer: clock.c:42:15: warning: Value stored to 'cpu' during its initialization is never read Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Richard Henderson 提交于
error: suggest parentheses around comparison in operand of ‘&’ [-Werror=parentheses] Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Stefan Weil 提交于
Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Tobias Markus 提交于
When in Long Mode, cpu_x86_seg_cache() logs "DS16" because the Default operation size bit (D/B bit) is not set for Long Mode Data Segments since there are only Data Segments in Long Mode and no explicit 16/32/64-bit Descriptors. This patch fixes this by checking the Long Mode Active bit of the hidden flags variable and logging "DS" if it is set. (I.e. in Long Mode all Data Segments are logged as "DS") Signed-off-by: NTobias Markus <tobias@markus-regensburg.de> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Michael Tokarev 提交于
Signed-off-by: NWenchao Xia <xiawenc@linux.vnet.ibm.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Michael Tokarev 提交于
Signed-off-by: NWenchao Xia <xiawenc@linux.vnet.ibm.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Markus Armbruster 提交于
Event qxl_render_blit_guest_primary_initialized is unused since commit c58c7b95, drop it. Commit 42e5b4c9 moved hw/ppc/xics.c to hw/intc/xics.c without updating the comment in trace-events. "scripts/cleanup-trace-events.pl trace-events | diff trace-events" is now clean again. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Stefan Weil 提交于
Debian busybox-static for alpha has a load address of 0x0000000120000000 which is mapped to 0x0000000020000000 for 32 bit hosts. qemu-alpha uses the TCG opcodes qemu_ld32, qemu_ld64, qemu_st32 and qemu_st64 which all raise the assertion (taddr == host_addr). Remove all assertions of this type because they are either wrong or unnecessary (when sizeof(tcg_target_ulong) >= sizeof(target_ulong)). Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: NStefan Weil <sw@weilnetz.de> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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