1. 26 12月, 2018 2 次提交
  2. 22 12月, 2018 32 次提交
  3. 21 12月, 2018 6 次提交
    • P
      Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.0-20181221' into staging · 891ff9f4
      Peter Maydell 提交于
      ppc patch queue 2018-12-21
      
      This pull request supersedes the one from 2018-12-13.
      
      This is a revised first ppc pull request for qemu-4.0.  Highlights
      are:
      
       * Most of the code for the POWER9 "XIVE" interrupt controller
         (not complete yet, but we're getting there)
       * A number of g_new vs. g_malloc cleanups
       * Some IRQ wiring cleanups
       * A fix for how we advertise NUMA nodes to the guest for pseries
      
      # gpg: Signature made Fri 21 Dec 2018 05:34:12 GMT
      # gpg:                using RSA key 6C38CACA20D9B392
      # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
      # gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
      # gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
      # gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
      # Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392
      
      * remotes/dgibson/tags/ppc-for-4.0-20181221: (40 commits)
        MAINTAINERS: PPC: add a XIVE section
        spapr: change default CPU type to POWER9
        spapr: introduce an 'ic-mode' machine option
        spapr: add an extra OV5 field to the sPAPR IRQ backend
        spapr: add a 'reset' method to the sPAPR IRQ backend
        spapr: extend the sPAPR IRQ backend for XICS migration
        spapr: allocate the interrupt thread context under the CPU core
        spapr: add device tree support for the XIVE exploitation mode
        spapr: add hcalls support for the XIVE exploitation interrupt mode
        spapr: introduce a new machine IRQ backend for XIVE
        spapr-iommu: Always advertise the maximum possible DMA window size
        spapr/xive: use the VCPU id as a NVT identifier
        spapr/xive: introduce a XIVE interrupt controller
        ppc/xive: notify the CPU when the interrupt priority is more privileged
        ppc/xive: introduce a simplified XIVE presenter
        ppc/xive: introduce the XIVE interrupt thread context
        ppc/xive: add support for the END Event State Buffers
        Changes requirement for "vsubsbs" instruction
        spapr: export and rename the xics_max_server_number() routine
        spapr: introduce a spapr_irq_init() routine
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      891ff9f4
    • P
      Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging · 15763776
      Peter Maydell 提交于
      pci, pc, virtio: fixes, features
      
      VTD fixes
      IR and split irqchip are now the default for Q35
      ACPI refactoring
      hotplug refactoring
      new names for virtio devices
      multiple pcie link width/speeds
      PCI fixes
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      
      # gpg: Signature made Thu 20 Dec 2018 18:26:03 GMT
      # gpg:                using RSA key 281F0DB8D28D5469
      # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
      # gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
      # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
      #      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469
      
      * remotes/mst/tags/for_upstream: (44 commits)
        x86-iommu: turn on IR by default if proper
        x86-iommu: switch intr_supported to OnOffAuto type
        q35: set split kernel irqchip as default
        pci: Adjust PCI config limit based on bus topology
        spapr_pci: perform unplug via the hotplug handler
        pci/shpc: perform unplug via the hotplug handler
        pci: Reuse pci-bridge hotplug handler handlers for pcie-pci-bridge
        pci/pcie: perform unplug via the hotplug handler
        pci/pcihp: perform unplug via the hotplug handler
        pci/pcihp: overwrite hotplug handler recursively from the start
        pci/pcihp: perform check for bus capability in pre_plug handler
        s390x/pci: rename hotplug handler callbacks
        pci/shpc: rename hotplug handler callbacks
        pci/pcie: rename hotplug handler callbacks
        hw/i386: Remove deprecated machines pc-0.10 and pc-0.11
        hw: acpi: Remove AcpiRsdpDescriptor and fix tests
        hw: acpi: Export and share the ARM RSDP build
        hw: arm: Support both legacy and current RSDP build
        hw: arm: Convert the RSDP build to the buid_append_foo() API
        hw: arm: Carry RSDP specific data through AcpiRsdpData
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      15763776
    • C
      MAINTAINERS: PPC: add a XIVE section · b62c6e12
      Cédric Le Goater 提交于
      Signed-off-by: NCédric Le Goater <clg@kaod.org>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      b62c6e12
    • C
      34a6b015
    • C
      spapr: introduce an 'ic-mode' machine option · 3ba3d0bc
      Cédric Le Goater 提交于
      This option is used to select the interrupt controller mode (XICS or
      XIVE) with which the machine will operate. XICS being the default
      mode for now.
      
      When running a machine with the XIVE interrupt mode backend, the guest
      OS is required to have support for the XIVE exploitation mode. In the
      case of legacy OS, the mode selected by CAS should be XICS and the OS
      should fail to boot. However, QEMU could possibly detect it, terminate
      the boot process and reset to stop in the SLOF firmware. This is not
      yet handled.
      Signed-off-by: NCédric Le Goater <clg@kaod.org>
      Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      3ba3d0bc
    • C
      spapr: add an extra OV5 field to the sPAPR IRQ backend · db592b5b
      Cédric Le Goater 提交于
      The interrupt modes supported by the hypervisor are advertised to the
      guest with new bits definitions of the option vector 5 of property
      "ibm,arch-vec-5-platform-support. The byte 23 bits 0-1 of the OV5 are
      defined as follow :
      
        0b00   PAPR 2.7 and earlier (Legacy systems)
        0b01   XIVE Exploitation mode only
        0b10   Either available
      
      If the client/guest selects the XIVE interrupt mode, it informs the
      hypervisor by returning the value 0b01 in byte 23 bits 0-1. A 0b00
      value indicates the use of the XICS interrupt mode (Legacy systems).
      
      The sPAPR IRQ backend is extended with these definitions and the
      values are directly used to populate the "ibm,arch-vec-5-platform-support"
      property. The interrupt mode is advertised under TCG and under KVM.
      Although a KVM XIVE device is not yet available, the machine can still
      operate with kernel_irqchip=off. However, we apply a restriction on
      the CPU which is required to be a POWER9 when a XIVE interrupt
      controller is in use.
      Signed-off-by: NCédric Le Goater <clg@kaod.org>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      db592b5b