This adds notifiers for phys memory changes: a set of callbacks that
vhost can register and update kernel accordingly.  Down the road, kvm
code can be switched to use these as well, instead of calling kvm code
directly from exec.c as is done now.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

The address register is overriden when it corresponds to v0 and the fast
path is taken, which leads to a crash. Fix that by using the a0 register
instead.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

On SH4, the ITLB and UTLB configurations are memory mapped, so loading
ITLB entries from UTLB has to be simulated correctly. For that the QEMU
TLB has to be handle the execute (ITLB) and read/write permissions
(UTLB) seperately.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

The store queues are located from 0xe0000000 to 0xe3ffffff.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Reduce the size of the TLB entry from 32 to 16 bytes, reorganising
members and using a bit field.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

With the current code, the QEMU TLB is setup to match the read/write
mode of the MMU fault. This means when read access is done, the page
is setup in read-only mode. When the page is later accessed in write
mode, an MMU fault happened, and the page is switch in write-only
mode. This flip-flop causes a lot of calls to the MMU code and slow
down the emulation.

This patch changes the MMU emulation, so that the QEMU TLB is setup
to match the UTLB protection key. This impressively increase the
speed of the emulation.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

There is an ITLB access violation if SR_MD=0 (user mode) while
the high bit of the protection key is 0 (priviledge mode).
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

tlb_set_page() doesn't need addresses with offset, but simply the
page aligned addresses.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

The mem_idx is wrongly computed. As written in target-sh4/cpu.h, mode 0
corresponds to kernel mode (SR_MD = 1), while mode 1 corresponds to user
mode (SR_MD = 0).
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

When the MMUCR TI bit is set, all the UTLB and ITLB entries should be
flushed.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

The static compilation for sdl is broken after
79427693.
Signed-off-by: NTeLeMan <geleman@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

This patch adds the documentation-related options "--enable-docs" and
"--disable-docs" to the help message of "configure".
Signed-off-by: NDirk Ullrich <dirk.ullrich@googlemail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

The write the the PA_POWOFF register is currently ignored. Fix that by
calling qemu_system_shutdown_request() when a poweroff is requested.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

setcond is not an optional op, move it to the non-optional section.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Signed-off-by: Nmalc <av1474@comtv.ru>

Similar to the qemu-img.c patch, but I also have to unescape remaining
% signs in qemu-options.hx.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Nmalc <av1474@comtv.ru>

Since qemu-options.h is only used in vl.c, we can avoid using
brittle interpolation from a generated file.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Nmalc <av1474@comtv.ru>

Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Nmalc <av1474@comtv.ru>

Other choices include using "(printf)", but this one is not bad in
terms of readability.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Nmalc <av1474@comtv.ru>

This reverts commit bc5b6004.

Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: Nmalc <av1474@comtv.ru>

Signed-off-by: Nmalc <av1474@comtv.ru>

Signed-off-by: Nmalc <av1474@comtv.ru>

Signed-off-by: Nmalc <av1474@comtv.ru>

dprintf is already claimed by POSIX[1], and on at least one system
is implemented as a macro

[1] http://www.opengroup.org/onlinepubs/9699919799/functions/dprintf.htmlSigned-off-by: Nmalc <av1474@comtv.ru>

Compilation for arm (native or cross) results in this
warning:

fpu/softfloat-native.c: In function ‘float64_round_to_int’:
fpu/softfloat-native.c:387: error: control reaches end of non-void function

float64_round_to_int uses special assembler code for arm
and has no explicit return value.

As there is no obvious reason why arm should need special
code, all fpu related conditionals were removed.
The remaining code is standard (C99) and compiles for arm,
too.
Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Acked-by: NLaurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>