- 24 6月, 2012 40 次提交
-
-
由 Alexander Graf 提交于
Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Now that we're moving all of the device tree generation from an external pre-execution generated blob to runtime generation using libfdt, we absolutely must have libfdt around. This requirement was there before already, as the only way to not require libfdt with e500 was to not use -kernel, which was the only way to boot the mpc8544ds machine. This patch only manifests said requirement in the build system. Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Some times in the device tree, we find an array of 2 u32 cells that really are a single u64 value. This patch adds a helper to make the creation of these easy. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@petalogix.com>
-
由 Alexander Graf 提交于
Phandle references work by having 2 pieces: - a "phandle" 1-cell property in the device tree node - a reference to the same value in a property we want to point to the other node To generate the 1-cell property, we need an allocation mechanism that gives us a unique number space. This patch adds an allocator for these properties. Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
We want to get rid of the concept of loading an external device tree and instead generate our own. However, to do this we need to also create a device tree template programatically. This patch adds a helper to create an empty device tree in memory. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@petalogix.com>
-
由 Alexander Graf 提交于
This patch adds a helper to search for a node's phandle by its path. This is especially useful when the phandle is part of an array, not just a single cell in which case qemu_devtree_setprop_phandle would be the easy choice. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@petalogix.com>
-
由 Alexander Graf 提交于
Usually we want to know when creating a subtree fails. However, while introducing this patch set we have to modify the device tree and some times have the code to create a subtree in both the binary tree and the dynamically created tree. So ignore failures about this for now and enable them once we got rid of the binary device tree. Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
Phandles are the fancy device tree name for "pointer to another node". To create a phandle property, we most likely want to reference to the node we're pointing to by its path. So create a helper that allows us to do so. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@petalogix.com>
-
由 Alexander Graf 提交于
We have device tree helpers that allow us to create single cell (u32) wide properties. However, when creating properties that contain an array of cells, we need to jump through hoops, manually passing in an array with converted endianness. To ease the pain of this, create a generic macro helper that allows us to pass the cells as arguments. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@petalogix.com>
-
由 Alexander Graf 提交于
Our subnode creation helper can't handle creation of root subnodes, like "/memory". Fix this by allowing the parent node to be an empty string, indicating the root node. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@petalogix.com>
-
由 Kevin Wolf 提交于
Move the declaration of s into the #ifdef sections that actually make use of it. Signed-off-by: NKevin Wolf <kwolf@redhat.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Benjamin Herrenschmidt 提交于
This adds a qemu-specific hypervisor call to the pseries machine which allows to do what amounts to memmove, memcpy and xor over regions of physical memory such as the framebuffer. This is the simplest way to get usable framebuffer speed from SLOF since the framebuffer isn't mapped in the VRMA and so would otherwise require an hcall per 8 bytes access. The performance is still not great but usable, and can be improved with a more complex implementation of the hcall itself if needed. This also adds some documentation for the qemu-specific hypercalls that we add to PAPR along with a new qemu,hypertas-functions property that mirrors ibm,hypertas-functions and provides some discoverability for the new calls. Note: I chose note to advertise H_RTAS to the guest via that mechanism. This is done on purpose, the guest uses the normal RTAS interfaces provided by qemu (including SLOF) which internally calls H_RTAS. We might in the future implement part (or even all) of RTAS inside the guest like IBM's firmware does and replace H_RTAS with some finer grained set of private hypercalls. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Benjamin Herrenschmidt 提交于
We were incorrectly g_free'ing an object that isn't allocated in one error path and failed to release it completely in another This fixes qemu crashes with some cases of IO errors. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Benjamin Herrenschmidt 提交于
The core tcg/kvm code for ppc64 now has at least the outline capability to support pagesizes beyond the standard 4k and 16MB. The CPUState is initialized with information advertising the available pagesizes and their correct encodings, and under the right KVM setup this will be populated with page sizes beyond the standard. Obviously guests can't use the extra page sizes unless they know they're present. For the pseries machine, at least, there is a defined method for conveying exactly this information, the "ibm-segment-page-sizes" property in the guest device tree. This patch generates this property using the supported page size information that's already in the CPUState. Signed-off-by: NNishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Benjamin Herrenschmidt 提交于
More recent Power server chips (i.e. based on the 64 bit hash MMU) support more than just the traditional 4k and 16M page sizes. This can get quite complicated, because which page sizes are supported, which combinations are supported within an MMU segment and how these page sizes are encoded both in the SLB entry and the hash PTE can vary depending on the CPU model (they are not specified by the architecture). In addition the firmware or hypervisor may not permit use of certain page sizes, for various reasons. Whether various page sizes are supported on KVM, for example, depends on whether the PR or HV variant of KVM is in use, and on the page size of the memory backing the guest's RAM. This patch adds information to the CPUState and cpu defs to describe the supported page sizes and encodings. Since TCG does not yet support any extended page sizes, we just set this to NULL in the static CPU definitions, expanding this to the default 4k and 16M page sizes when we initialize the cpu state. When using KVM, however, we instead determine available page sizes using the new KVM_PPC_GET_SMMU_INFO call. For old kernels without that call, we use some defaults, with some guesswork which should do the right thing for existing HV and PR implementations. The fallback might not be correct for future versions, but that's ok, because they'll have KVM_PPC_GET_SMMU_INFO. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Fabien Chouteau 提交于
The size of EPN field in MAS2 depends on page size. This patch adds a mask to discard invalid bits in EPN field. Definition of EPN field from e500v2 RM: EPN Effective page number: Depending on page size, only the bits associated with a page boundary are valid. Bits that represent offsets within a page are ignored and should be cleared. There is a similar (but more complicated) definition in PowerISA V2.06. Signed-off-by: NFabien Chouteau <chouteau@adacore.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Fabien Chouteau 提交于
Do not call cpu_dump_state if logfile is NULL. Signed-off-by: NFabien Chouteau <chouteau@adacore.com> [agraf: adjust to inline functions] Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
The initial TLB entry is supposed to help us run the guest -kernel payload. This means the guest needs to be able to access its own memory, the initrd memory and the device tree. So far we only statically reserved a TLB entry from [0;256M[. This patch fixes it to span from [0;dt_end[, allowing the guest payload to access everything initially. Reported-by: NStuart Yoder <stuart.yoder@freescale.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Lookup table 'hbrev' is never written to, so add a 'const' qualifier. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Add obviously missing 'break' statement. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Add an explicit CPUPPCState parameter instead of relying on AREG0 and rename op_helper.c (which only contains load and store helpers) to mem_helper.c. Remove AREG0 swapping in tlb_fill(). Switch to AREG0 free mode. Use cpu_ld{l,uw}_code in translation and interrupt handling, cpu_{ld,st}{l,uw}_data in loads and stores. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Move more misc helpers from helper.c to misc_helper.c. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Move misc helpers from op_helper.c to misc_helpers.c. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Move decrementer and timebase helpers to a dedicated file. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Remove useless wrappers. In some cases 'int' parameters are changed to uint32_t. Make internal functions static. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> [agraf: fix kvm compilation] Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Move more MMU helpers from helper.c to mmu_helper.c. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> [update to current helper.c state] Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
When the code is moved together by the next patch, compiler detects a possible uninitialized variable use. Avoid the warning by initializing the variables. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Move MMU, TLB, SLB and BAT ops to mmu_helper.c. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Blue Swirl 提交于
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> [fix unwanted whitespace line in Makefile.target] Signed-off-by: NAlexander Graf <agraf@suse.de>
-