1. 05 2月, 2014 3 次提交
  2. 03 2月, 2014 6 次提交
  3. 02 2月, 2014 4 次提交
    • P
      Merge remote-tracking branch 'qmp-unstable/queue/qmp' into staging · 2f61120c
      Peter Maydell 提交于
      * qmp-unstable/queue/qmp:
        monitor: Cleanup mon->outbuf on write error
        virtio_rng: replace custom backend API with UserCreatable.complete() callback
        add optional 2nd stage initialization to -object/object-add commands
        vl.c: -object: don't ignore duplicate 'id'
        object_add: consolidate error handling
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      2f61120c
    • P
      Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140131' into staging · b4a8c9ae
      Peter Maydell 提交于
      target-arm queue:
       * implementation of first part of the A64 Neon instruction set
       * v8 AArch32 rounding and 16<->64 fp conversion instructions
       * fix MIDR value on Zynq boards
       * some minor bugfixes/code cleanups
      
      # gpg: Signature made Fri 31 Jan 2014 15:06:34 GMT using RSA key ID 14360CDE
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
      
      * pmaydell/tags/pull-target-arm-20140131: (34 commits)
        arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes
        arm_gic: Introduce define for GIC_NR_SGIS
        target-arm: A64: Add SIMD shift by immediate
        target-arm: A64: Add simple SIMD 3-same floating point ops
        target-arm: A64: Add integer ops from SIMD 3-same group
        target-arm: A64: Add logic ops from SIMD 3 same group
        target-arm: A64: Add top level decode for SIMD 3-same group
        target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops
        target-arm: A64: Add SIMD three-different ABDL instructions
        target-arm: A64: Add SIMD three-different multiply accumulate insns
        target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTM
        target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTM
        target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ
        target-arm: Add set_neon_rmode helper
        target-arm: Add support for AArch32 SIMD VRINTX
        target-arm: Add support for AArch32 FP VRINTX
        target-arm: Add support for AArch32 FP VRINTZ
        target-arm: Add support for AArch32 FP VRINTR
        target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM
        target-arm: Move arm_rmode_to_sf to a shared location.
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      b4a8c9ae
    • P
      Merge remote-tracking branch 'remotes/awilliam/tags/vfio-pci-for-qemu-20140128.0' into staging · 850bbe1b
      Peter Maydell 提交于
      vfio-pci updates include:
       - Destroy MemoryRegions on device teardown
       - Print warnings around PCI option ROM failures
       - Skip bogus mappings from 64bit BAR sizing
       - Act on DMA mapping failures
       - Fix alignment to avoid MSI-X table mapping
       - Fix debug macro typo
      
      # gpg: Signature made Tue 28 Jan 2014 15:27:47 GMT using RSA key ID 3BB08B22
      # gpg: Can't check signature: public key not found
      
      * remotes/awilliam/tags/vfio-pci-for-qemu-20140128.0:
        vfio: correct debug macro typo
        vfio: fix mapping of MSIX bar
        kvm: initialize qemu_host_page_size
        vfio-pci: Fail initfn on DMA mapping errors
        vfio: Filter out bogus mappings
        vfio: Do not reattempt a failed rom read
        vfio: warn if host device rom can't be read
        vfio: Destroy memory regions
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      850bbe1b
    • P
      Merge remote-tracking branch 'remotes/sstabellini/xen-140130' into staging · bd88091c
      Peter Maydell 提交于
      * remotes/sstabellini/xen-140130:
        address_space_translate: do not cross page boundaries
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      bd88091c
  4. 31 1月, 2014 27 次提交