Signed-off-by: NRichard Henderson <rth@twiddle.net>

Elides two insns from the sequence.  The resulting tlb compare
sequence is satisfyingly minimal:

	risbg  %r2,%r8,51,186,56
	risbg  %r3,%r8,61,178,0
	cg     %r3,904(%r10,%r2)
	lg     %r2,920(%r10,%r2)
	jlh    tlb_miss
Signed-off-by: NRichard Henderson <rth@twiddle.net>

That is, the old LDST_OPTIMIZATION.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

Signed-off-by: NRichard Henderson <rth@twiddle.net>

Signed-off-by: NRichard Henderson <rth@twiddle.net>

Signed-off-by: NRichard Henderson <rth@twiddle.net>

Signed-off-by: NRichard Henderson <rth@twiddle.net>

Commit af3cbfbe hoisted some "common"
loads of the temporary type, forgetting that the types could differ
during truncating moves.  This affects the correctness of the memory
offset on big-endian hosts.
Tested-by: NTom Musta <tommusta@gmail.com>
Signed-off-by: NRichard Henderson <rth@twiddle.net>

* remotes/rth/fix-i386:
  exec-all.h: Use stl_le_p instead of stl_p patching x86
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

We got the wrong version of stl_p, the one that bswaps as appropriate
for the target.  Since x86 is always little-endian, the "_le_" routine
will resolve to what we want.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

tcg updates for 20140512

# gpg: Signature made Tue 13 May 2014 00:19:56 BST using RSA key ID 4DD0279B
# gpg: Can't check signature: public key not found

* remotes/rth/tags/pull-tcg-20140512: (26 commits)
  tcg: Remove unreachable code in tcg_out_op and op_defs
  tcg: Use tcg_target_available_regs in tcg_reg_alloc_mov
  tcg: Make call address a constant parameter
  tci: Create tcg_out_call
  tcg-mips: Split out tcg_out_call
  tcg-sparc: Create tcg_out_call
  tcg-ppc64: Rename tcg_out_calli to tcg_out_call
  tcg-ppc: Split out tcg_out_call
  tcg-s390: Rename tgen_calli to tcg_out_call
  tcg-i386: Rename tcg_out_calli to tcg_out_call
  tcg: Require TCG_TARGET_INSN_UNIT_SIZE
  tci: Define TCG_TARGET_INSN_UNIT_SIZE
  tcg-mips: Define TCG_TARGET_INSN_UNIT_SIZE
  tcg-ia64: Define TCG_TARGET_INSN_UNIT_SIZE
  tcg-s390: Define TCG_TARGET_INSN_UNIT_SIZE
  tcg-aarch64: Define TCG_TARGET_INSN_UNIT_SIZE
  tcg-arm: Define TCG_TARGET_INSN_UNIT_SIZE
  tcg-sparc: Define TCG_TARGET_INSN_UNIT_SIZE
  tcg-ppc: Define TCG_TARGET_INSN_UNIT_SIZE
  tcg-ppc64: Define TCG_TARGET_INSN_UNIT_SIZE
  ...
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Commit e586822a broke the bsd-user build when it removed the
CONFIG_UNAME_RELEASE define but forgot to remove the use of it
in bsd-user. Fix this in the simplest possible way (bsd-user
doesn't make any use at all of the qemu_uname_release variable
except to allow it to be pointlessly set by the user, so this
is all we need to do.)
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Message-id: 1399648001-20980-1-git-send-email-peter.maydell@linaro.org

* remotes/bonzini/configure:
  libcacard: remove libcacard-specific CFLAGS and LIBS from global vars
  build: simplify and fix fix-obj-vars
  build: convert some obj-specific CFLAGS to use new foo.o-cflags syntax
  build: add support for per-object -cflags and -libs to all rules
  Makefile: use $(INSTALL_LIB) for modules not $(INSTALL_PROG)
  Makefile.target: use $(INSTALL_PROG) for installing, not $(INSTALL)
  Makefile: strip tools and modules too
  build: simplify Makefile.target around unnest-vars invocations
  build: simplify Makefile.target a bit, use just one rule for softmmu
  build: Fix per-object variables for Makefile.target
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Block pull request

# gpg: Signature made Fri 09 May 2014 19:57:53 BST using RSA key ID 81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>"

* remotes/stefanha/tags/block-pull-request:
  glib: fix g_poll early timeout on windows
  block: qemu-iotests - test for live migration
  block: qemu-iotests - update 085 to use common.qemu
  block: qemu-iotests - add common.qemu, for bash-controlled qemu tests
  block/raw-posix: Try both FIEMAP and SEEK_HOLE
  gluster: Correctly propagate errors when volume isn't accessible
  vl.c: remove init_clocks call from main
  block: Fix open flags with BDRV_O_SNAPSHOT
  qemu-iotests: Test converting to streamOptimized from small cluster size
  vmdk: Implement .bdrv_get_info()
  vmdk: Implement .bdrv_write_compressed
  qemu-img: Convert by cluster size if target is compressed
  block/iscsi: bump year in copyright notice
  block/nfs: Check for NULL server part
  qemu-img: sort block formats in help message
  iotests: Use configured python
  qcow2: Fix alloc_clusters_noref() overflow detection
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

There was some modulo logic to ensure that Microblaze always booted into
physical RAM regardless of the elf entry. Removed it, as QEMU should fail
gracefully when given a bad elf, rather than attempt to run it.
Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>

The TCSR register has only 11 valid bits. This is now used by the
linux kernel to auto-detect endianness, and causes Linux 3.15-rc1
and later to hang when run under qemu-microblaze. Mask valid bits
before writing the register to solve the problem.
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>

The MER register only has two valid bits. This is now used by
the linux kernel to auto-detect endianness, and causes Linux 3.15-rc1
and later to hang when run under qemu-microblaze. Mask valid bits before
writing the register to solve the problem.
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
[Edgar: Untabified]
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>

Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>

Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>

The INDEX_op_call case has just been obsoleted; the mov and movi
cases have not been reachable for years.  Attempt to document this
both in each tcg_out_op switch, and via TCG_OPF_NOT_PRESENT.

Because of the TCG_OPF_NOT_PRESENT change, this must be done for
all targets in a single commit.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

The move opcodes are special in that their constraints must cover
all available registers.  So instead of checking the constraints,
just use the available registers.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

Avoid allocating a tcg temporary to hold the constant address,
and instead place it directly into the op_call arguments.

At the same time, convert to the newly introduced tcg_out_call
backend function, rather than invoking tcg_out_op for the call.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

Signed-off-by: NRichard Henderson <rth@twiddle.net>

Signed-off-by: NRichard Henderson <rth@twiddle.net>

Rename the existing tcg_out_calli to tcg_out_call_nodelay.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

Merge the existing tcg_out_call into tcg_out_op.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

Signed-off-by: NRichard Henderson <rth@twiddle.net>

Signed-off-by: NRichard Henderson <rth@twiddle.net>

Signed-off-by: NRichard Henderson <rth@twiddle.net>

Now that all backends do define TCG_TARGET_INSN_UNIT_SIZE,
remove the fallback definition.
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: NRichard Henderson <rth@twiddle.net>

And use tcg pointer differencing functions as appropriate.
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRichard Henderson <rth@twiddle.net>

And use tcg pointer differencing functions as appropriate.
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRichard Henderson <rth@twiddle.net>

Using a 16-byte aligned structure achieves best results, both for code
cleanliness and compiled code size.  However, this means that we can't
use the trick of encoding the slot number into the low 2 bits.

Thankfully, we only ever use slot2, so make that explicit in the names
of the relocation functions, and drop the code for other slots.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

And use tcg pointer differencing functions as appropriate.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

And use tcg pointer differencing functions as appropriate.
Acked-by: NClaudio Fontana <claudio.fontana@huawei.com>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRichard Henderson <rth@twiddle.net>

And use tcg pointer differencing functions as appropriate.
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRichard Henderson <rth@twiddle.net>

And use tcg pointer differencing functions as appropriate.
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRichard Henderson <rth@twiddle.net>

And use tcg pointer differencing functions as appropriate.
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRichard Henderson <rth@twiddle.net>

And use tcg pointer differencing functions as appropriate.
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: NRichard Henderson <rth@twiddle.net>

And use tcg pointer differencing functions as appropriate.
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRichard Henderson <rth@twiddle.net>