- 09 6月, 2014 1 次提交
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由 Peter Crosthwaite 提交于
SysBusDevice::init is depracated. Convert to Object::init as prescribed by QOM conventions. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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- 20 5月, 2014 3 次提交
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由 Cornelia Huck 提交于
Make use of the new s390 adapter irq routing support to enable real in-kernel irqfds for virtio-ccw with adapter interrupts. Note that s390 doesn't provide the common KVM_CAP_IRQCHIP capability, but rather needs KVM_CAP_S390_IRQCHIP to be enabled. This is to ensure backward compatibility. Reviewed-by: NThomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: NChristian Borntraeger <borntraeger@de.ibm.com> Acked-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Cornelia Huck 提交于
Register an I/O adapter interrupt source for when virtio-ccw devices start using adapter interrupts. Reviewed-by: NThomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Cornelia Huck 提交于
Introduce a common parent class for both cases, where kvm and non-kvm can hook up callbacks. This will be used by follow-on patches for adapter registration and mapping. We now always have a flic, regardless of whether we use kvm; the non-kvm implementation just doesn't do anything. Reviewed-by: NJens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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- 14 5月, 2014 1 次提交
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由 Juan Quintela 提交于
After previous Peter patch, they are redundant. This way we don't assign them except when needed. Once there, there were lots of case where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (appart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: NJuan Quintela <quintela@redhat.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
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- 13 5月, 2014 4 次提交
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由 Peter Maydell 提交于
Add missing 'break' after handling of AW_A10_PIC_BASE_ADDR write. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Juan Quintela 提交于
After commit 767adce2, they are redundant. This way we don't assign them except when needed. Once there, there were lots of cases where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (apart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: NJuan Quintela <quintela@redhat.com> [PMM: fixed minor conflict, corrected commit message typos] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Paolo Bonzini 提交于
SIPI interrupts are ignored on the bootstrap. Never accept one. Cc: Andreas Faerber <afaerber@suse.de> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Guenter Roeck 提交于
The MER register only has two valid bits. This is now used by the linux kernel to auto-detect endianness, and causes Linux 3.15-rc1 and later to hang when run under qemu-microblaze. Mask valid bits before writing the register to solve the problem. Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com> [Edgar: Untabified] Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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- 07 5月, 2014 2 次提交
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由 Gabriel L. Somlo 提交于
Add "version" property to local apic, and have it default to 0x14 for pc machines starting at 2.1. For compatibility with previous releases, pc machines up to 2.0 will have their local apic version set to 0x11. Signed-off-by: NGabriel L. Somlo <somlo@cmu.edu> Acked-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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由 Hervé Poussineau 提交于
This is a guest-triggerable error, as seen when using Xenix 2.3.4. Replace hw_error by LOG_UNIMPL, so that guests can continue. With this patch, I can install and use Xenix 2.3.4a without any problem. I can also start installation of Xenix 2.3.4q, but it fails due to not finding an hard disk. Signed-off-by: NHervé Poussineau <hpoussin@reactos.org> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 06 5月, 2014 3 次提交
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由 Michael Roth 提交于
CVE-2013-4534 opp->nb_cpus is read from the wire and used to determine how many IRQDest elements to read into opp->dst[]. If the value exceeds the length of opp->dst[], MAX_CPU, opp->dst[] can be overrun with arbitrary data from the wire. Fix this by failing migration if the value read from the wire exceeds MAX_CPU. Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Markus Armbruster 提交于
Using error_is_set(ERRP) to find out whether a function failed is either wrong, fragile, or unnecessarily opaque. It's wrong when ERRP may be null, because errors go undetected when it is. It's fragile when proving ERRP non-null involves a non-local argument. Else, it's unnecessarily opaque (see commit 84d18f06). I guess the error_is_set(errp) in the DeviceClass realize() methods are merely fragile right now, because I can't find a call chain that passes a null errp argument. Make the code more robust and more obviously correct: receive the error in a local variable, then propagate it through the parameter. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Acked-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Markus Armbruster 提交于
Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 01 5月, 2014 1 次提交
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由 Rabin Vincent 提交于
cp15.c0_cpuid is never initialized for ARMv7-M; take the value directly from cpu->midr instead. Signed-off-by: NRabin Vincent <rabin@rab.in> Message-id: 1398036308-32166-1-git-send-email-rabin@rab.in Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 30 4月, 2014 1 次提交
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由 Cornelia Huck 提交于
Convert existing users of KVM_ENABLE_CAP to new helper. Reviewed-by: NThomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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- 27 4月, 2014 1 次提交
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由 Stefan Weil 提交于
These functions don't need type casts (as does cpu_physical_memory_rw) and also make the code better readable. Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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- 18 4月, 2014 2 次提交
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由 Beniamino Galvani 提交于
The pending register is read-only and the value returned upon a read reflects the state of irq input pins (interrupts are level triggered). This patch implements such behaviour. Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Reviewed-by: NLi Guang <lig.fnst@cn.fujitsu.com> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1395771730-16882-3-git-send-email-b.galvani@gmail.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Beniamino Galvani 提交于
This patch implements proper updating of the vector register which should hold, according to the A10 user manual, the vector address for the interrupt currently active on the CPU IRQ input. Interrupt priority is not implemented at the moment and thus the first pending interrupt is returned. Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NLi Guang <lig.fnst@cn.fujitsu.com> Message-id: 1395771730-16882-2-git-send-email-b.galvani@gmail.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 03 4月, 2014 1 次提交
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由 Alexander Graf 提交于
Commit 6f1834a2 exposed a bug in openpic_kvm where we don't filter for memory events that only happen to the region we want to know events about. Add proper filtering, fixing the e500plat target with KVM. Signed-off-by: NAlexander Graf <agraf@suse.de> Message-id: 1396431718-14908-1-git-send-email-agraf@suse.de Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 02 4月, 2014 1 次提交
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由 Frank Ch. Eigler 提交于
SystemTap sdt.h sometimes results in compiled probes without sufficient information to extract arguments. This can be solved in a slightly hacky way by encouraging the compiler to place arguments into registers. This patch fixes the apic_reset_irq_delivered() trace event on Fedora 20 with gcc-4.8.2-7.fc20 and systemtap-sdt-devel-2.4-2.fc20 on x86_64. Signed-off-by: NFrank Ch. Eigler <fche@redhat.com> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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- 27 3月, 2014 5 次提交
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由 Peter Maydell 提交于
Avoid undefined behaviour shifting left into the sign bit. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Maydell 提交于
Add 'U' suffix to avoid undefined behaviour. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Maydell 提交于
Add U suffix to avoid undefined behaviour. This is only strictly necessary for the 1 << 31 cases; for consistency we extend it to other constants in the same group. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Maydell 提交于
Use unsigned arithmetic for operations on the mask word in the foreach_apic() macro, to avoid relying on undefined behaviour when shifting into the sign bit. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NStefan Weil <sw@weilnetz.de> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Prasad Joshi 提交于
Fixes d85937e6. Signed-off-by: NPrasad Joshi <prasadjoshi.linux@gmail.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 15 3月, 2014 1 次提交
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由 Stefan Weil 提交于
Codespell found and fixed these new typos: * doesnt -> doesn't * funtion -> function * perfomance -> performance * remaing -> remaining A coding style issue (line too long) was fixed manually. Signed-off-by: NStefan Weil <sw@weilnetz.de> Reviewed-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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- 13 3月, 2014 1 次提交
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由 Alexey Kardashevskiy 提交于
Currently interrupt priorities are set to 0 (highest) at the very beginning of the guest execution which is not correct and makes the guest produce random interrupt error messages such as: "Interrupt 0x1001 (real) is invalid, disabling it". This also prevents interrupt states from correct migration. This initializes priority to 0xFF as the emulated XICS does. Suggested-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 10 3月, 2014 1 次提交
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由 Gabriel L. Somlo 提交于
Both QEMU and KVM have already accumulated a significant number of optimizations based on the hard-coded assumption that ioapic polarity will always use the ActiveHigh convention, where the logical and physical states of level-triggered irq lines always match (i.e., active(asserted) == high == 1, inactive == low == 0). QEMU guests are expected to follow directions given via ACPI and configure the ioapic with polarity 0 (ActiveHigh). However, even when misbehaving guests (e.g. OS X <= 10.9) set the ioapic polarity to 1 (ActiveLow), QEMU will still use the ActiveHigh signaling convention when interfacing with the emulated ioapic. This patch modifies the emulated ioapic to completely ignore polarity as set by the guest OS, enabling misbehaving guests to work alongside those which comply with the ActiveHigh polarity specified by QEMU's ACPI tables. Signed-off-by: NGabriel L. Somlo <somlo@cmu.edu> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 05 3月, 2014 1 次提交
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由 Alexey Kardashevskiy 提交于
This makes use of @cpu_dt_id and related API in: 1. emulated XICS hypercall handlers as they receive fixed CPU indexes; 2. XICS-KVM to enable in-kernel XICS on right CPU; 3. device-tree renderer. This removes @cpu_index fixup as @cpu_dt_id is used instead so QEMU monitor can accept command-line CPU indexes again. This changes kvm_arch_vcpu_id() to use ppc_get_vcpu_dt_id() as at the moment KVM CPU id and device tree ID are calculated using the same algorithm. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Acked-by: NMike Day <ncmike@ncultra.org> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 27 2月, 2014 6 次提交
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由 Dominik Dingel 提交于
S390 can also use async page faults, to enhance guest scheduling. In case of live migration we want to disable the feature and let all pending request finish. Signed-off-by: NDominik Dingel <dingel@linux.vnet.ibm.com> Signed-off-by: NJens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
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由 Jens Freimann 提交于
This patch implements a floating-interrupt controller device (flic) which interacts with the s390 flic kvm_device. Signed-off-by: NJens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: NCornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
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由 Christoffer Dall 提交于
Save and restore the ARM KVM VGIC state from the kernel. We rely on QEMU to marshal the GICState data structure and therefore simply synchronize the kernel state with the QEMU emulated state in both directions. We take some care on the restore path to check the VGIC has been configured with enough IRQs and CPU interfaces that we can properly restore the state, and for separate set/clear registers we first fully clear the registers and then set the required bits. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687921-26921-1-git-send-email-christoffer.dall@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Christoffer Dall 提交于
Support creating the ARM vgic device through the device control API and setting the base address for the distributor and cpu interfaces in KVM VMs using this API. Because the older KVM_CREATE_IRQCHIP interface needs the irq chip to be created prior to creating the VCPUs, we first test if we can use the device control API in kvm_arch_irqchip_create (using the test flag from the device control API). If we cannot, it means we have to fall back to KVM_CREATE_IRQCHIP and use the older ioctl at this point in time. If however, we can use the device control API, we don't do anything and wait until the arm_gic_kvm driver initializes and let that use the device control API. Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687720-26806-5-git-send-email-christoffer.dall@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Christoffer Dall 提交于
The GIC_SET_LEVEL macro unfortunately overwrote the entire level bitmask instead of just or'ing on the necessary bits, causing active level PPIs on a core to clear PPIs on other cores. Cc: qemu-stable@nongnu.org Reported-by: NRob Herring <rob.herring@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org> Message-id: 1393031030-8692-1-git-send-email-christoffer.dall@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
The Exynos4210 combiner has IIC_NIRQ inputs and IIC_NGRP outputs; use the correct constant in the loop initializing our output sysbus IRQs so that we don't overrun the output_irq[] array. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1392659611-8439-1-git-send-email-peter.maydell@linaro.org Reviewed-by: NAndreas Färber <afaerber@suse.de> Cc: qemu-stable@nongnu.org
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- 20 2月, 2014 1 次提交
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由 Peter Maydell 提交于
Commit 40d22500 accidentally changed the behaviour of gic_acknowledge_irq() for the NVIC. The NVIC doesn't have SGIs, so this meant we hit an assertion: gic_acknowledge_irq: Assertion `s->sgi_pending[irq][cpu] != 0' failed. Return NVIC acknowledge-irq to its previous behaviour, like 11MPCore. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org>
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- 15 2月, 2014 1 次提交
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由 Paolo Bonzini 提交于
Replace them with uint8/32/64. Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 11 2月, 2014 1 次提交
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由 Edgar E. Iglesias 提交于
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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- 08 2月, 2014 1 次提交
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由 Christoffer Dall 提交于
The GICC_APRn registers are not currently supported by the ARM GIC v2.0 emulation. This patch adds the missing state. Note that we also change the number of APRs to use a define GIC_NR_APRS based on the maximum number of preemption levels. This patch also adds RAZ/WI accessors for the four registers on the emulated CPU interface. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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