1. 03 3月, 2017 2 次提交
    • S
      spapr: Small cleanup of PPC MMU enums · ec975e83
      Sam Bobroff 提交于
      The PPC MMU types are sometimes treated as if they were a bit field
      and sometime as if they were an enum which causes maintenance
      problems: flipping bits in the MMU type (which is done on both the 1TB
      segment and 64K segment bits) currently produces new MMU type
      values that are not handled in every "switch" on it, sometimes causing
      an abort().
      
      This patch provides some macros that can be used to filter out the
      "bit field-like" bits so that the remainder of the value can be
      switched on, like an enum. This allows removal of all of the
      "degraded" types from the list and should ease maintenance.
      Signed-off-by: NSam Bobroff <sam.bobroff@au1.ibm.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      ec975e83
    • A
      exec, kvm, target-ppc: Move getrampagesize() to common code · 9c607668
      Alexey Kardashevskiy 提交于
      getrampagesize() returns the largest supported page size and mainly
      used to know if huge pages are enabled.
      
      However is implemented in target-ppc/kvm.c and not available
      in TCG or other architectures.
      
      This renames and moves gethugepagesize() to mmap-alloc.c where
      fd-based analog of it is already implemented. This renames and moves
      getrampagesize() to exec.c as it seems to be the common place for
      helpers like this.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      9c607668
  2. 01 3月, 2017 2 次提交
    • D
      target/ppc: Manage external HPT via virtual hypervisor · e57ca75c
      David Gibson 提交于
      The pseries machine type implements the behaviour of a PAPR compliant
      hypervisor, without actually executing such a hypervisor on the virtual
      CPU.  To do this we need some hooks in the CPU code to make hypervisor
      facilities get redirected to the machine instead of emulated internally.
      
      For hypercalls this is managed through the cpu->vhyp field, which points
      to a QOM interface with a method implementing the hypercall.
      
      For the hashed page table (HPT) - also a hypervisor resource - we use an
      older hack.  CPUPPCState has an 'external_htab' field which when non-NULL
      indicates that the HPT is stored in qemu memory, rather than within the
      guest's address space.
      
      For consistency - and to make some future extensions easier - this merges
      the external HPT mechanism into the vhyp mechanism.  Methods are added
      to vhyp for the basic operations the core hash MMU code needs: map_hptes()
      and unmap_hptes() for reading the HPT, store_hpte() for updating it and
      hpt_mask() to retrieve its size.
      
      To match this, the pseries machine now sets these vhyp fields in its
      existing vhyp class, rather than reaching into the cpu object to set the
      external_htab field.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NSuraj Jitindar Singh <sjitindarsingh@gmail.com>
      e57ca75c
    • D
      target/ppc: Fix KVM-HV HPTE accessors · 1ad9f0a4
      David Gibson 提交于
      When a 'pseries' guest is running with KVM-HV, the guest's hashed page
      table (HPT) is stored within the host kernel, so it is not directly
      accessible to qemu.  Most of the time, qemu doesn't need to access it:
      we're using the hardware MMU, and KVM itself implements the guest
      hypercalls for manipulating the HPT.
      
      However, qemu does need access to the in-KVM HPT to implement
      get_phys_page_debug() for the benefit of the gdbstub, and maybe for
      other debug operations.
      
      To allow this, 7c43bca0 "target-ppc: Fix page table lookup with kvm
      enabled" added kvmppc_hash64_read_pteg() to target/ppc/kvm.c to read
      in a batch of HPTEs from the KVM table.  Unfortunately, there are a
      couple of problems with this:
      
      First, the name of the function implies it always reads a whole PTEG
      from the HPT, but in fact in some cases it's used to grab individual
      HPTEs (which ends up pulling 8 HPTEs, not aligned to a PTEG from the
      kernel).
      
      Second, and more importantly, the code to read the HPTEs from KVM is
      simply wrong, in general.  The data from the fd that KVM provides is
      designed mostly for compact migration rather than this sort of one-off
      access, and so needs some decoding for this purpose.  The current code
      will work in some cases, but if there are invalid HPTEs then it will
      not get sane results.
      
      This patch rewrite the HPTE reading function to have a simpler
      interface (just read n HPTEs into a caller provided buffer), and to
      correctly decode the stream from the kernel.
      
      For consistency we also clean up the similar function for altering
      HPTEs within KVM (introduced in c1385933 "target-ppc: Update
      ppc_hash64_store_hpte to support updating in-kernel htab").
      
      Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      1ad9f0a4
  3. 22 2月, 2017 1 次提交
    • T
      hw/ppc/spapr: Check for valid page size when hot plugging memory · df587133
      Thomas Huth 提交于
      On POWER, the valid page sizes that the guest can use are bound
      to the CPU and not to the memory region. QEMU already has some
      fancy logic to find out the right maximum memory size to tell
      it to the guest during boot (see getrampagesize() in the file
      target/ppc/kvm.c for more information).
      However, once we're booted and the guest is using huge pages
      already, it is currently still possible to hot-plug memory regions
      that does not support huge pages - which of course does not work
      on POWER, since the guest thinks that it is possible to use huge
      pages everywhere. The KVM_RUN ioctl will then abort with -EFAULT,
      QEMU spills out a not very helpful error message together with
      a register dump and the user is annoyed that the VM unexpectedly
      died.
      To avoid this situation, we should check the page size of hot-plugged
      DIMMs to see whether it is possible to use it in the current VM.
      If it does not fit, we can print out a better error message and
      refuse to add it, so that the VM does not die unexpectely and the
      user has a second chance to plug a DIMM with a matching memory
      backend instead.
      
      Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1419466Signed-off-by: NThomas Huth <thuth@redhat.com>
      [dwg: Fix a build error on 32-bit builds with KVM]
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      df587133
  4. 02 2月, 2017 1 次提交
    • T
      ppc/kvm: Handle the "family" CPU via alias instead of registering new types · 715d4b96
      Thomas Huth 提交于
      When running with KVM on POWER, we are registering a "family" CPU
      type for the host CPU that we are running on. For example, on all
      POWER8-compatible hosts, we register a "POWER8" CPU type, so that
      you can always start QEMU with "-cpu POWER8" there, without the
      need to know whether you are running on a POWER8, POWER8E or POWER8NVL
      host machine.
      However, we also have a "POWER8" CPU alias in the ppc_cpu_aliases list
      (that is mainly useful for TCG). This leads to two cosmetical drawbacks:
      If the user runs QEMU with "-cpu ?", we always claim that POWER8 is an
      "alias for POWER8_v2.0" - which is simply not true when running with
      KVM on POWER. And when using the 'query-cpu-definitions' QMP call,
      there are currently two entries for "POWER8", one for the alias, and
      one for the additional registered type.
      To solve the two problems, we should rather update the "family" alias
      instead of registering a new types. We then only have one "POWER8"
      CPU definition around, an alias, which also points to the right
      destination.
      
      Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1396536Signed-off-by: NThomas Huth <thuth@redhat.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      715d4b96
  5. 31 1月, 2017 1 次提交
    • D
      ppc: Rename cpu_version to compat_pvr · d6e166c0
      David Gibson 提交于
      The 'cpu_version' field in PowerPCCPU is badly named.  It's named after the
      'cpu-version' device tree property where it is advertised, but that meaning
      may not be obvious in most places it appears.
      
      Worse, it doesn't even really correspond to that device tree property.  The
      property contains either the processor's PVR, or, if the CPU is running in
      a compatibility mode, a special "logical PVR" representing which mode.
      
      Rename the cpu_version field, and a number of related variables to
      compat_pvr to make this clearer.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Reviewed-by: NThomas Huth <thuth@redhat.com>
      d6e166c0
  6. 20 1月, 2017 1 次提交
  7. 17 1月, 2017 1 次提交
  8. 21 12月, 2016 1 次提交
    • T
      Move target-* CPU file into a target/ folder · fcf5ef2a
      Thomas Huth 提交于
      We've currently got 18 architectures in QEMU, and thus 18 target-xxx
      folders in the root folder of the QEMU source tree. More architectures
      (e.g. RISC-V, AVR) are likely to be included soon, too, so the main
      folder of the QEMU sources slowly gets quite overcrowded with the
      target-xxx folders.
      To disburden the main folder a little bit, let's move the target-xxx
      folders into a dedicated target/ folder, so that target-xxx/ simply
      becomes target/xxx/ instead.
      
      Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part]
      Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part]
      Acked-by: Michael Walle <michael@walle.cc> [lm32 part]
      Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part]
      Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part]
      Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part]
      Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part]
      Acked-by: Richard Henderson <rth@twiddle.net> [alpha part]
      Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part]
      Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part]
      Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part]
      Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part]
      Signed-off-by: NThomas Huth <thuth@redhat.com>
      fcf5ef2a
  9. 13 10月, 2016 1 次提交
  10. 05 10月, 2016 3 次提交
  11. 23 9月, 2016 3 次提交
  12. 10 8月, 2016 2 次提交
  13. 25 7月, 2016 1 次提交
  14. 22 7月, 2016 1 次提交
    • P
      kvm-irqchip: i386: add hook for add/remove virq · 38d87493
      Peter Xu 提交于
      Adding two hooks to be notified when adding/removing msi routes. There
      are two kinds of MSI routes:
      
      - in kvm_irqchip_add_irq_route(): before assigning IRQFD. Used by
        vhost, vfio, etc.
      
      - in kvm_irqchip_send_msi(): when sending direct MSI message, if
        direct MSI not allowed, we will first create one MSI route entry
        in the kernel, then trigger it.
      
      This patch only hooks the first one (irqfd case). We do not need to
      take care for the 2nd one, since it's only used by QEMU userspace
      (kvm-apic) and the messages will always do in-time translation when
      triggered. While we need to note them down for the 1st one, so that we
      can notify the kernel when cache invalidation happens.
      
      Also, we do not hook IOAPIC msi routes (we have explicit notifier for
      IOAPIC to keep its cache updated). We only need to care about irqfd
      users.
      Signed-off-by: NPeter Xu <peterx@redhat.com>
      Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
      Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      38d87493
  15. 18 7月, 2016 1 次提交
    • T
      ppc: Yet another fix for the huge page support detection mechanism · 159d2e39
      Thomas Huth 提交于
      Commit 86b50f2e ("Disable huge page support if it is not available
      for main RAM") already made sure that huge page support is not announced
      to the guest if the normal RAM of non-NUMA configurations is not backed
      by a huge page filesystem. However, there is one more case that can go
      wrong: NUMA is enabled, but the RAM of the NUMA nodes are not configured
      with huge page support (and only the memory of a DIMM is configured with
      it). When QEMU is started with the following command line for example,
      the Linux guest currently crashes because it is trying to use huge pages
      on a memory region that does not support huge pages:
      
       qemu-system-ppc64 -enable-kvm ... -m 1G,slots=4,maxmem=32G -object \
         memory-backend-file,policy=default,mem-path=/hugepages,size=1G,id=mem-mem1 \
         -device pc-dimm,id=dimm-mem1,memdev=mem-mem1 -smp 2 \
         -numa node,nodeid=0 -numa node,nodeid=1
      
      To fix this issue, we've got to make sure to disable huge page support,
      too, when there is a NUMA node that is not using a memory backend with
      huge page support.
      
      Fixes: 86b50f2eSigned-off-by: NThomas Huth <thuth@redhat.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      159d2e39
  16. 23 6月, 2016 1 次提交
    • T
      ppc: Disable huge page support if it is not available for main RAM · 86b50f2e
      Thomas Huth 提交于
      On powerpc, we must only signal huge page support to the guest if
      all memory areas are capable of supporting huge pages. The commit
      2d103aae ("fix hugepage support when using memory-backend-file")
      already fixed the case when the user specified the mem-path property
      for NUMA memory nodes instead of using the global "-mem-path" option.
      However, there is one more case where it currently can go wrong.
      When specifying additional memory DIMMs without using NUMA, e.g.
      
       qemu-system-ppc64 -enable-kvm ... -m 1G,slots=2,maxmem=2G \
          -device pc-dimm,id=dimm-mem1,memdev=mem1 -object \
          memory-backend-file,policy=default,mem-path=/...,size=1G,id=mem1
      
      the code in getrampagesize() currently assumes that huge pages
      are possible since they are enabled for the mem1 object. But
      since the main RAM is not backed by a huge page filesystem,
      the guest Linux kernel then crashes very quickly after being
      started. So in case the we've got "normal" memory without NUMA
      and without the global "-mem-path" option, we must not announce
      huge pages to the guest. Since this is likely a mis-configuration
      by the user, also spill out a message in this case.
      Signed-off-by: NThomas Huth <thuth@redhat.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      86b50f2e
  17. 17 6月, 2016 2 次提交
  18. 14 6月, 2016 1 次提交
  19. 19 5月, 2016 1 次提交
  20. 24 3月, 2016 1 次提交
    • A
      spapr/target-ppc/kvm: Only add hcall-instructions if KVM supports it · 0ddbd053
      Alexey Kardashevskiy 提交于
      ePAPR defines "hcall-instructions" device-tree property which contains
      code to call hypercalls in ePAPR paravirtualized guests.  In general
      pseries guests won't use this property, instead using the PAPR defined
      hypercall interface.
      
      However, this property has been re-used to implement a hack to allow
      PR KVM to run (slightly modified) guests in some situations where it
      otherwise wouldn't be able to (because the system's L0 hypervisor
      doesn't forward the PAPR hypercalls to the PR KVM kernel).
      
      Hence, this property is always present in the device tree for pseries
      guests. All KVM guests use it at least to read features via the
      KVM_HC_FEATURES hypercall.
      
      The property is populated by the code returned from the KVM's
      KVM_PPC_GET_PVINFO ioctl; if not implemented in the KVM, QEMU supplies
      code which will fail all hypercall attempts. If QEMU does not create
      the property, and the guest kernel is compiled with
      CONFIG_EPAPR_PARAVIRT (which is normally the case), there is exactly
      the same stub at @epapr_hypercall_start already.
      
      Rather than maintaining this fairly useless stub implementation, it
      makes more sense not to create the property in the device tree in the
      first place if the host kernel does not implement it.
      
      This changes kvmppc_get_hypercall() to return 1 if the host kernel
      does not implement KVM_CAP_PPC_GET_PVINFO. The caller can use it to decide
      on whether to create the property or not.
      
      This changes the pseries machine to not create the property if KVM does
      not implement KVM_PPC_GET_PVINFO. In practice this means that from now
      on the property will not be created if either HV KVM or TCG is used.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      [reworded commit message for clarity --dwg]
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      0ddbd053
  21. 23 3月, 2016 2 次提交
  22. 19 3月, 2016 1 次提交
  23. 16 3月, 2016 2 次提交
    • D
      target-ppc: Add helpers for updating a CPU's SDR1 and external HPT · e5c0d3ce
      David Gibson 提交于
      When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
      pointer updated by a write to the SDR1 register we need to update some
      derived variables.  Likewise, when the cpu is configured for an external
      HPT (one not in the guest memory space) some derived variables need to be
      updated.
      
      Currently the logic for this is (partially) duplicated in ppc_store_sdr1()
      and in spapr_cpu_reset().  In future we're going to need it in some other
      places, so make some common helpers for this update.
      
      In addition the new ppc_hash64_set_external_hpt() helper also updates
      SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU
      synchronization.  In a sense this belongs logically in the
      ppc_hash64_set_sdr1() helper, but that is called from
      kvm_arch_get_registers() so can't itself call cpu_synchronize_state()
      without infinite recursion.  In practice this doesn't matter because
      the only other caller is TCG specific.
      
      Currently there aren't situations where updating SDR1 at runtime in KVM
      matters, but there are going to be in future.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NGreg Kurz <gkurz@linux.vnet.ibm.com>
      Reviewed-by: NThomas Huth <thuth@redhat.com>
      e5c0d3ce
    • D
      target-ppc: Split out SREGS get/put functions · a7a00a72
      David Gibson 提交于
      Currently the getting and setting of Power MMU registers (sregs) take up
      large inline chunks of the kvm_arch_get_registers() and
      kvm_arch_put_registers() functions.  Especially since there are two
      variants (for Book-E and Book-S CPUs), only one of which will be used in
      practice, this is pretty hard to read.
      
      This patch splits these out into helper functions for clarity.  No
      functional change is expected.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NThomas Huth <thuth@redhat.com>
      Reviewed-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Reviewed-by: NGreg Kurz <gkurz@linux.vnet.ibm.com>
      a7a00a72
  24. 25 2月, 2016 2 次提交
    • T
      ppc/kvm: Tell the user what might be wrong when using bad CPU types with kvm-hv · 388e47c7
      Thomas Huth 提交于
      Using a CPU type that does not match the host is not possible when using
      the kvm-hv kernel module - the PVR is checked in the kernel function
      kvm_arch_vcpu_ioctl_set_sregs_hv() and rejected with -EINVAL if it
      does not match the host.
      However, when the user tries to specify a non-matching CPU type, QEMU
      currently only reports "kvm_init_vcpu failed: Invalid argument", and
      this is of course not very helpful for the user to solve the problem.
      So this patch adds a more descriptive error message that tells the
      user to specify "-cpu host" instead.
      Signed-off-by: NThomas Huth <thuth@redhat.com>
      [Removed melodramatic '!' :)]
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      388e47c7
    • T
      ppc/kvm: Use error_report() instead of cpu_abort() for user-triggerable errors · 072ed5f2
      Thomas Huth 提交于
      Setting the KVM_CAP_PPC_PAPR capability can fail if either the KVM
      kernel module does not support it, or if the specified vCPU type
      is not a 64-bit Book3-S CPU type. For example, the user can trigger
      it easily with "-M pseries -cpu G2leLS" when using the kvm-pr kernel
      module. So the error should not be reported with cpu_abort() since
      this function is rather meant for reporting programming errors than
      reporting user-triggerable errors (it prints out all CPU registers
      and then calls abort() to kills the program - two things that the
      normal user does not expect here) . So let's use error_report() with
      exit(1) here instead.
      A similar problem exists in the code that sets the KVM_CAP_PPC_EPR
      capability, so while we're at it, fix that, too.
      Signed-off-by: NThomas Huth <thuth@redhat.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      072ed5f2
  25. 30 1月, 2016 3 次提交
    • D
      target-ppc: Rework ppc_store_slb · bcd81230
      David Gibson 提交于
      ppc_store_slb updates the SLB for PPC cpus with 64-bit hash MMUs.
      Currently it takes two parameters, which contain values encoded as the
      register arguments to the slbmte instruction, one register contains the
      ESID portion of the SLBE and also the slot number, the other contains the
      VSID portion of the SLBE.
      
      We're shortly going to want to do some SLB updates from other code where
      it is more convenient to supply the slot number and ESID separately, so
      rework this function and its callers to work this way.
      
      As a bonus, this slightly simplifies the emulation of segment registers for
      when running a 32-bit OS on a 64-bit CPU.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NLaurent Vivier <lvivier@redhat.com>
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Reviewed-by: NAlexander Graf <agraf@suse.de>
      bcd81230
    • D
      target-ppc: Convert mmu-hash{32,64}.[ch] from CPUPPCState to PowerPCCPU · 7ef23068
      David Gibson 提交于
      Like a lot of places these files include a mixture of functions taking
      both the older CPUPPCState *env and newer PowerPCCPU *cpu.  Move a step
      closer to cleaning this up by standardizing on PowerPCCPU, except for the
      helper_* functions which are called with the CPUPPCState * from tcg.
      
      Callers and some related functions are updated as well, the boundaries of
      what's changed here are a bit arbitrary.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NLaurent Vivier <lvivier@redhat.com>
      Reviewed-by: NAlexander Graf <agraf@suse.de>
      7ef23068
    • G
      target-ppc: kvm: fix floating point registers sync on little-endian hosts · 3a4b791b
      Greg Kurz 提交于
      On VSX capable CPUs, the 32 FP registers are mapped to the high-bits
      of the 32 first VSX registers. So if you have:
      
      VSR31 = (uint128) 0x0102030405060708090a0b0c0d0e0f00
      
      then
      
      FPR31 = (uint64) 0x0102030405060708
      
      The kernel stores the VSX registers in the fp_state struct following the
      host endian element ordering.
      
      On big-endian:
      
      fp_state.fpr[31][0] = 0x0102030405060708
      fp_state.fpr[31][1] = 0x090a0b0c0d0e0f00
      
      On little-endian:
      
      fp_state.fpr[31][0] = 0x090a0b0c0d0e0f00
      fp_state.fpr[31][1] = 0x0102030405060708
      
      The KVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls preserve this ordering, but
      QEMU considers it as big-endian and always copies element [0] to the
      fpr[] array and element [1] to the vsr[] array. This does not work with
      little-endian hosts, and you will get:
      
      (qemu) p $f31
      0x90a0b0c0d0e0f00
      
      instead of:
      
      (qemu) p $f31
      0x102030405060708
      
      This patch fixes the element ordering for little-endian hosts.
      Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      3a4b791b
  26. 29 1月, 2016 1 次提交
    • P
      ppc: Clean up includes · 0d75590d
      Peter Maydell 提交于
      Clean up includes so that osdep.h is included first and headers
      which it implies are not included manually.
      
      This commit was created with scripts/clean-includes.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Message-id: 1453832250-766-6-git-send-email-peter.maydell@linaro.org
      0d75590d
  27. 11 1月, 2016 1 次提交