- 23 2月, 2016 2 次提交
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由 Peter Xu 提交于
It might be a little bit confusing and error prone to do dump_cleanup() in these two functions. A better way is to do dump_cleanup() before dump finish, no matter whether dump has succeeded or not. Signed-off-by: NPeter Xu <peterx@redhat.com> Reviewed-by: NFam Zheng <famz@redhat.com> Message-Id: <1455772616-8668-2-git-send-email-peterx@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Fam Zheng 提交于
They seem to have snuck in when applying Janosch Frank <frankja@linux.vnet.ibm.com>'s previous patch. Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <1455848416-13177-1-git-send-email-famz@redhat.com> Reviewed-by: NJanosch Frank <frankja@linux.vnet.ibm.com> Tested-by: NJanosch Frank <frankja@linux.vnet.ibm.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 20 2月, 2016 1 次提交
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由 Peter Maydell 提交于
The current documentation of chardev mux=on is rather brief and opaque; expand it to hopefully be a bit more helpful. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-Id: <1455643738-6068-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 18 2月, 2016 37 次提交
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由 Peter Maydell 提交于
target-arm queue: * implement or fix various EL3 trap behaviour for system registers * clean up the trap/undef handling of the SRS instruction * add some missing AArch64 performance monitor system registers * implement reset for the PL061 GPIO device * QOMify sd.c and the pxa2xx_mmci device * SD card emulation fixes for booting Tianocore UEFI on RPi2 * QOMify various ARM timer devices # gpg: Signature made Thu 18 Feb 2016 15:19:31 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" * remotes/pmaydell/tags/pull-target-arm-20160218-1: (36 commits) hw/timer: QOM'ify pxa2xx_timer hw/timer: QOM'ify pl031 hw/timer: QOM'ify exynos4210_rtc hw/timer: QOM'ify exynos4210_pwm hw/timer: QOM'ify exynos4210_mct hw/timer: QOM'ify arm_timer (pass 2) hw/timer: QOM'ify arm_timer (pass 1) hw/sd: use guest error logging rather than fprintf to stderr hw/sd: model a power-up delay, as a workaround for an EDK2 bug hw/sd: implement CMD23 (SET_BLOCK_COUNT) for MMC compatibility hw/sd/pxa2xx_mmci: Add reset function hw/sd/pxa2xx_mmci: Convert to VMStateDescription hw/sd/pxa2xx_mmci: Update to use new SDBus APIs hw/sd/pxa2xx_mmci: convert to SysBusDevice object sdhci_sysbus: Create SD card device in users, not the device itself hw/sd/sdhci.c: Update to use SDBus APIs hw/sd: Add QOM bus which SD cards plug in to hw/sd/sd.c: Convert sd_reset() function into Device reset method hw/sd/sd.c: QOMify hw/sd/sdhci.c: Remove x-drive property ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang.zhao 提交于
* split the old SysBus init function into an instance_init and a Device realize function * use DeviceClass::realize instead of SysBusDeviceClass::init Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang.zhao 提交于
assign pl031_init to pl031_info.instance_init and drop the SysBusDeviceClass::init Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang.zhao 提交于
assign exynos4210_rtc_init to exynos4210_rtc_info.instance_init and drop the SysBusDeviceClass::init Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang.zhao 提交于
assign exynos4210_pwm_init to exynos4210_pwm_info.instance_init and drop the SysBusDeviceClass::init Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang.zhao 提交于
assign exynos4210_mct_init to exynos4210_mct_info.instance_init and drop the SysBusDeviceClass::init Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang.zhao 提交于
assign DeviceClass::vmsd instead of using vmstate_register function Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang.zhao 提交于
* assign icp_pit_init to icp_pit_info.instance_init * split the old SysBus init function into an instance_init and a Device realize function * use DeviceClass::realize instead of SysBusDeviceClass::init Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Andrew Baumann 提交于
Some of these errors may be harmless (e.g. probing unimplemented commands, or issuing CMD12 in the wrong state), and may also be quite frequent. Spamming the standard error output isn't desirable in such cases. Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: NAndrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1454902521-21164-4-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Andrew Baumann 提交于
The SD spec for ACMD41 says that a zero argument is an "inquiry" ACMD41, which does not start initialisation and is used only for retrieving the OCR. However, Tianocore EDK2 (UEFI) has a bug [1]: it first sends an inquiry (zero) ACMD41. If that first request returns an OCR value with the power up bit (0x80000000) set, it assumes the card is ready and continues, leaving the card in the wrong state. (My assumption is that this works on hardware, because no real card is immediately powered up upon reset.) This change models a delay of 0.5ms from the first ACMD41 to the power being up. However, it also immediately sets the power on upon seeing a non-zero (non-enquiry) ACMD41. This speeds up UEFI boot, it should also account for guests that simply delay after card reset and then issue an ACMD41 that they expect will succeed. [1] https://github.com/tianocore/edk2/blob/master/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c#L279 (This is the loop starting with "We need to wait for the MMC or SD card is ready") Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAndrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1454902521-21164-3-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Andrew Baumann 提交于
CMD23 is optional for SD but required for MMC, and the UEFI bootloader used for Windows on Raspberry Pi 2 issues it. Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: NAndrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1454902521-21164-2-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Add a reset function to the pxa2xx_mmci device; previously it had no handling for system reset at all. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-11-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Convert the pxa2xx_mmci device from manual save/load functions to a VMStateDescription structure. This is a migration compatibility break. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-10-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Now the PXA2xx MMCI device is QOMified itself, we can update it to use the SDBus APIs to talk to the SD card. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1455646193-13238-9-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Convert the pxa2xx_mmci device to be a sysbus device. In this commit we only change the device itself, and leave the interface to the SD card using the old non-SDBus APIs. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-8-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Move the creation of the SD card device from the sdhci_sysbus device itself into the boards that create these devices. This allows us to remove the cannot_instantiate_with_device_add notation because we no longer call drive_get_next in the device model. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Message-id: 1455646193-13238-7-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Update the SDHCI code to use the new SDBus APIs. This commit introduces the new command line options required to connect a disk to sdhci-pci: -device sdhci-pci -drive id=mydrive,[...] -device sd,drive=mydrive Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Message-id: 1455646193-13238-6-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Add a QOM bus for SD cards to plug in to. Note that since sd_enable() is used only by one board and there only as part of a broken implementation, we do not provide it in the SDBus API (but instead add a warning comment about the old function). Whoever converts OMAP and the nseries boards to QOM will need to either implement the card switch properly or move the enable hack into the OMAP MMC controller model. In the SDBus API, the old-style use of sd_set_cb to register some qemu_irqs for notification of card insertion and write-protect toggling is replaced with methods in the SDBusClass which the card calls on status changes and methods in the SDClass which the controller can call to find out the current status. The query methods will allow us to remove the abuse of the 'register irqs' API by controllers in their reset methods to trigger the card to tell them about the current status again. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Message-id: 1455646193-13238-5-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Convert the sd_reset() function into a proper Device reset method. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-4-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Turn the SD card into a QOM device. This conversion only changes the device itself; the various functions which are effectively methods on the device are not touched at this point. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Message-id: 1455646193-13238-3-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The following commits will remove support for the old sdhci-pci command line syntax using the x-drive property: -device sdhci-pci,x-drive=mydrive -drive id=mydrive,[...] and replace it with an explicit sd device: -device sdhci-pci -drive id=mydrive,[...] -device sd,drive=mydrive (This is OK because x-drive is experimental.) This commit removes the x-drive property so that old style command lines will fail with a reasonable error message: -device sdhci-pci,x-drive=mydrive: Property '.x-drive' not found Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-2-git-send-email-peter.maydell@linaro.org
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由 Wei Huang 提交于
This patch removes the float_high field of PL061State, which doesn't seem to be used anywhere. Because this changes the device state, the version ID is also bumped up for the reason of compatiblity. Signed-off-by: NWei Huang <wei@redhat.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1455729552-28026-3-git-send-email-wei@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Wei Huang 提交于
Current QEMU doesn't clear PL061 state after reset. This causes a weird issue with guest reboot via GPIO. Here is the device state with two reboot requests: (PL061State fields) data old_in_data istate VM boot 0 0 0 After 1st ACPI reboot request 8 8 8 After VM PL061 driver ACK 8 8 0 After VM reboot 8 8 0 ------------------------------------------------------------ 2nd ACPI reboot request 8 In the second reboot request above, because the old_in_data field is 8, QEMU decides that there is a pending edge IRQ already (see pl061_update()) in input; so it doesn't raise up IRQ again. As a result the second reboot request is lost. The correct way is to clear PL061 device state after reset. The default reset state is found from the documents listed below. Per Peter's suggestion that QEMU automatically calls reset function after device initialization, this patch removes calling pl061_reset() from pl061_initfn(). Reference: [1] PL061 Technical Reference Manual [2] Stellaris LM3S8962 Microcontroller Data Sheet [3] Stellaris LM3S5P31 Microcontroller Data Sheet Signed-off-by: NWei Huang <wei@redhat.com> Message-id: 1455729552-28026-2-git-send-email-wei@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alistair Francis 提交于
The Linux kernel accesses this register early in its setup. Signed-off-by: NChristopher Covington <christopher.covington@linaro.org> Signed-off-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: b30d536cb16ec57b4412172bb6dbc3f00d293e7d.1455060548.git.alistair.francis@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alistair Francis 提交于
Signed-off-by: NAaron Lindsay <alindsay@codeaurora.org> Signed-off-by: NAlistair Francis <alistair.francis@xilinx.com> Tested-by: NNathan Rossi <nathan@nathanrossi.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 50deeafb24958a5b6d7f594b5dda399a022c0e5b.1455060548.git.alistair.francis@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alistair Francis 提交于
Signed-off-by: NAaron Lindsay <alindsay@codeaurora.org> Signed-off-by: NAlistair Francis <alistair.francis@xilinx.com> Tested-by: NNathan Rossi <nathan@nathanrossi.com> Message-id: da0563119a9f56fd5fbdc26e7ed19a8a8457c5b9.1455060548.git.alistair.francis@xilinx.com [PMM: Use 0 for PMCEID0 values for A15 and A57 since our PMU does not currently implement any events.] Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Make get_r13_banked() raise an exception at runtime for the corner case of SRS from System mode, so that we can UNDEF it; this brings us in to line with the ARM ARM's set of permitted CONSTRAINED UNPREDICTABLE choices. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Maydell 提交于
The user-mode versions of get/set_r13_banked() exist just to assert if they're ever called -- the translate time code should never emit calls to them because SRS from user mode always UNDEF. There's no code in the softmmu versions that can't compile in CONFIG_USER_ONLY, and the assertion is not particularly useful, so combine the two functions rather than having completely split versions under ifdefs. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com>
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由 Peter Maydell 提交于
Move bank_number()'s implementation into internals.h, so it's available in the user-mode-only compile as well. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com>
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由 Peter Maydell 提交于
Move get/set_r13_banked() from helper.c to op_helper.c. This will let us add exception-raising code to them, and also puts them in the same file as get/set_user_reg(), which makes some conceptual sense. (The original reason for the helper.c/op_helper.c split was that only op_helper.c had access to the CPU env pointer; this distinction has not been true for a long time, though, and so the split is now rather arbitrary.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Maydell 提交于
The SRS instruction is: * UNDEFINED in Hyp mode * UNPREDICTABLE in User or System mode * UNPREDICTABLE if the specified mode isn't accessible * trapped to EL3 if EL3 is AArch64 and we are at Secure EL1 Clean up the code to handle all these cases cleanly, including picking UNDEF as our choice of UNPREDICTABLE behaviour rather blindly trusting the mode field passed in the instruction. As part of this, move the check for IS_USER into gen_srs() itself rather than having it done by the caller. The exception is that we don't UNDEF for calls from System mode, which need a runtime check. This will be dealt with in the following commits. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Maydell 提交于
If access to FPEXC32_EL2 is trapped by CPTR_EL2.TFP or CPTR_EL3.TFP, this should be reported with a syndrome register indicating an FP access trap, not one indicating a system register access trap. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com>
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由 Peter Maydell 提交于
Implement the debug register traps controlled by MDCR_EL2.TDA and MDCR_EL3.TDA. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com>
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由 Peter Maydell 提交于
Implement trapping of the "debug ROM" registers, which are controlled by MDCR_EL2.TDRA for EL2 but by the more general MDCR_EL3.TDA for EL3. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com>
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由 Peter Maydell 提交于
Implement the traps to EL2 and EL3 controlled by the bits MDCR_EL2.TDOSA MDCR_EL3.TDOSA. These can configurably trap accesses to the "powerdown debug" registers. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com>
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由 Peter Maydell 提交于
We weren't quite implementing the handling of SCR.SMD correctly. The condition governing whether the SMD bit should apply only for NS state is "is EL3 is AArch32", not "is the current EL AArch32". Fix the condition, and clarify the comment both to reflect this and to expand slightly on what's going on for the v7-no-Virtualization case. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Maydell 提交于
Correct some corner cases we were getting wrong for CNTFRQ access rights: * should UNDEF from 32-bit Secure EL1 * only writable from the highest implemented exception level, which might not be EL1 now To clarify the code, provide a new utility function arm_highest_el() which returns the highest implemented exception level. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NSergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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