1. 17 12月, 2018 3 次提交
  2. 19 10月, 2018 1 次提交
  3. 02 6月, 2018 1 次提交
  4. 11 5月, 2018 2 次提交
  5. 16 3月, 2018 1 次提交
  6. 08 2月, 2018 1 次提交
  7. 30 12月, 2017 1 次提交
  8. 25 10月, 2017 7 次提交
  9. 10 10月, 2017 1 次提交
  10. 06 9月, 2017 1 次提交
    • P
      tcg: Implement implicit ordering semantics · b32dc337
      Pranith Kumar 提交于
      Currently, we cannot use mttcg for running strong memory model guests
      on weak memory model hosts due to missing ordering semantics.
      
      We implicitly generate fence instructions for stronger guests if an
      ordering mismatch is detected. We generate fences only for the orders
      for which fence instructions are necessary, for example a fence is not
      necessary between a store and a subsequent load on x86 since its
      absence in the guest binary tells that ordering need not be
      ensured. Also note that if we find multiple subsequent fence
      instructions in the generated IR, we combine them in the TCG
      optimization pass.
      
      This patch allows us to boot an x86 guest on ARM64 hosts using mttcg.
      Signed-off-by: NPranith Kumar <bobby.prani@gmail.com>
      Message-Id: <20170829063313.10237-4-bobby.prani@gmail.com>
      Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
      b32dc337
  11. 06 6月, 2017 1 次提交
    • E
      tcg: Introduce goto_ptr opcode and tcg_gen_lookup_and_goto_ptr · cedbcb01
      Emilio G. Cota 提交于
      Instead of exporting goto_ptr directly to TCG frontends, export
      tcg_gen_lookup_and_goto_ptr(), which calls goto_ptr with the pointer
      returned by the lookup_tb_ptr() helper. This is the only use case
      we have for goto_ptr and lookup_tb_ptr, so having this function is
      very convenient. Furthermore, it trivially allows us to avoid calling
      the lookup helper if goto_ptr is not implemented by the backend.
      Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
      Signed-off-by: NEmilio G. Cota <cota@braap.org>
      Message-Id: <1493263764-18657-2-git-send-email-cota@braap.org>
      Message-Id: <1493263764-18657-3-git-send-email-cota@braap.org>
      Message-Id: <1493263764-18657-4-git-send-email-cota@braap.org>
      Message-Id: <1493263764-18657-5-git-send-email-cota@braap.org>
      [rth: Squashed 4 related commits.]
      Signed-off-by: NRichard Henderson <rth@twiddle.net>
      cedbcb01
  12. 27 4月, 2017 1 次提交
  13. 11 1月, 2017 4 次提交
  14. 10 1月, 2017 3 次提交
  15. 02 11月, 2016 2 次提交
  16. 26 10月, 2016 3 次提交
  17. 16 9月, 2016 1 次提交
  18. 06 8月, 2016 1 次提交
  19. 06 7月, 2016 1 次提交
    • S
      tcg: Improve the alignment check infrastructure · 1f00b27f
      Sergey Sorokin 提交于
      Some architectures (e.g. ARMv8) need the address which is aligned
      to a size more than the size of the memory access.
      To support such check it's enough the current costless alignment
      check implementation in QEMU, but we need to support
      an alignment size specifying.
      Signed-off-by: NSergey Sorokin <afarallax@yandex.ru>
      Message-Id: <1466705806-679898-1-git-send-email-afarallax@yandex.ru>
      Signed-off-by: NRichard Henderson <rth@twiddle.net>
      [rth: Assert in tcg_canonicalize_memop.  Leave get_alignment_bits
      available for, though unused by, user-mode.  Retain logging difference
      based on ALIGNED_ONLY.]
      1f00b27f
  20. 21 6月, 2016 1 次提交
  21. 19 5月, 2016 2 次提交
  22. 29 1月, 2016 1 次提交
    • P
      tcg: Clean up includes · 757e725b
      Peter Maydell 提交于
      Clean up includes so that osdep.h is included first and headers
      which it implies are not included manually.
      
      This commit was created with scripts/clean-includes.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Message-id: 1453832250-766-16-git-send-email-peter.maydell@linaro.org
      757e725b
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