1. 24 2月, 2010 12 次提交
  2. 23 2月, 2010 14 次提交
    • P
      ARM CP15 tls fix · c5883be2
      Paul Brook 提交于
      Fix temporary handling in cp15 tls register load/store.
      Signed-off-by: NPaul Brook <paul@codesourcery.com>
      c5883be2
    • A
      724c6893
    • J
      Add cpu model configuration support.. · b5ec5ce0
      john cooper 提交于
      This is a reimplementation of prior versions which adds
      the ability to define cpu models for contemporary processors.
      The added models are likewise selected via -cpu <name>,
      and are intended to displace the existing convention
      of "-cpu qemu64" augmented with a series of feature flags.
      
      A primary motivation was determination of a least common
      denominator within a given processor class to simplify guest
      migration.  It is still possible to modify an arbitrary model
      via additional feature flags however the goal here was to
      make doing so unnecessary in typical usage.  The other
      consideration was providing models names reflective of
      current processors.  Both AMD and Intel have reviewed the
      models in terms of balancing generality of migration vs.
      excessive feature downgrade relative to released silicon.
      
      This version of the patch replaces the prior hard wired
      definitions with a configuration file approach for new
      models.  Existing models are thus far left as-is but may
      easily be transitioned to (or may be overridden by) the
      configuration file representation.
      
      Proposed new model definitions are provided here for current
      AMD and Intel processors.  Each model consists of a name
      used to select it on the command line (-cpu <name>), and a
      model_id which corresponds to a least common denominator
      commercial instance of the processor class.
      
      A table of names/model_ids may be queried via "-cpu ?model":
      
              :
          x86       Opteron_G3  AMD Opteron 23xx (Gen 3 Class Opteron)
          x86       Opteron_G2  AMD Opteron 22xx (Gen 2 Class Opteron)
          x86       Opteron_G1  AMD Opteron 240 (Gen 1 Class Opteron)
          x86          Nehalem  Intel Core i7 9xx (Nehalem Class Core i7)
          x86           Penryn  Intel Core 2 Duo P9xxx (Penryn Class Core 2)
          x86           Conroe  Intel Celeron_4x0 (Conroe/Merom Class Core 2)
              :
      
      Also added is "-cpu ?dump" which exhaustively outputs all config
      data for all defined models, and "-cpu ?cpuid" which enumerates
      all qemu recognized CPUID feature flags.
      
      The pseudo cpuid flag 'check' when added to the feature flag list
      will warn when feature flags (either implicit in a cpu model or
      explicit on the command line) would have otherwise been quietly
      unavailable to a guest:
      
          # qemu-system-x86_64 ... -cpu Nehalem,check
          warning: host cpuid 0000_0001 lacks requested flag 'sse4.2|sse4_2' [0x00100000]
          warning: host cpuid 0000_0001 lacks requested flag 'popcnt' [0x00800000]
      
      A similar 'enforce' pseudo flag exists which in addition
      to the above causes qemu to error exit if requested flags are
      unavailable.
      
      Configuration data for a cpu model resides in the target config
      file which by default will be installed as:
      
          /usr/local/etc/qemu/target-<arch>.conf
      
      The format of this file should be self explanatory given the
      definitions for the above six models and essentially mimics
      the structure of the static x86_def_t x86_defs.
      
      Encoding of cpuid flags names now allows aliases for both the
      configuration file and the command line which reconciles some
      Intel/AMD/Linux/Qemu naming differences.
      
      This patch was tested relative to qemu.git.
      Signed-off-by: Njohn cooper <john.cooper@redhat.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      b5ec5ce0
    • D
      add close callback for tty-based char device · 4266a134
      David Ahern 提交于
      v1 -> v2  coding style changes
      
      Add a tty close callback. Right now if a guest device that is connected
      to a tty-based chardev in the host is removed, the tty is not closed.
      With this patch it is closed.
      
      Example use case is connecting an emulated USB serial cable in the guest
      to ttyS0 of the host using the monitor command:
      
      usb_add serial::/dev/ttyS0
      
      and then removing the device with:
      
      usb_del serial::/dev/ttyS0
      Signed-off-by: NDavid Ahern <daahern@cisco.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      4266a134
    • J
      Fix lost serial TX interrupts. Report receive overruns. · 71e605f8
      Justin T. Gibbs 提交于
      o Implement receive overrun status.  The FreeBSD uart driver
         relies on this status in it's probe routine to determine the size
         of the FIFO supported.
       o As per the 16550 spec, do not overwrite the RX FIFO on an RX overrun.
       o Do not allow TX or RX FIFO overruns to increment the data valid count
         beyond the size of the FIFO.
       o For reads of the IIR register, only clear the "TX holding register
         emtpy interrupt" if the read reports this interrupt.  This is required
         by the specification and avoids losing TX interrupts when other,
         higher priority interrupts (usually RX) are reported first.
      Signed-off-by: NJustin T. Gibbs <gibbs@FreeBSD.org>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      71e605f8
    • M
      tcg/ppc: Fix typo · 98b8d951
      malc 提交于
      Signed-off-by: Nmalc <av1474@comtv.ru>
      98b8d951
    • M
      apc_pci: simplify using rwhandler · 63e6f31d
      Michael S. Tsirkin 提交于
      Use rwhandler to simplify apb_pci.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      63e6f31d
    • M
      apb_pci: minor cleanup · 8414f45c
      Michael S. Tsirkin 提交于
      pci_data_write ignores high 8 bit in address,
      so there seems to be no need to set them
      in apb_pci.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      8414f45c
    • B
      Update OpenBIOS images to r683 · 23ef988c
      Blue Swirl 提交于
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      23ef988c
    • B
      Fix arm-softmmu compile · f21126df
      Blue Swirl 提交于
      cc1: warnings being treated as errors
      /src/qemu/hw/pl181.c: In function 'pl181_fifo_run':
      /src/qemu/hw/pl181.c:185: error: 'value' may be used uninitialized in this function
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      f21126df
    • M
      tcg/ppc64: Use C90 style comments · d34f4baf
      malc 提交于
      Signed-off-by: Nmalc <av1474@comtv.ru>
      d34f4baf
    • M
      tcg/ppc: Implement some of the optional ops · 65fe043e
      malc 提交于
      Signed-off-by: Nmalc <av1474@comtv.ru>
      65fe043e
    • M
    • J
      tcg: fix build on 32-bit hppa, ppc and sparc hosts · 30c0c76c
      Jay Foad 提交于
      The qemu_ld32s op is only defined if TCG_TARGET_REG_BITS == 64.
      Signed-off-by: NJay Foad <jay.foad@gmail.com>
      Signed-off-by: Nmalc <av1474@comtv.ru>
      30c0c76c
  3. 22 2月, 2010 6 次提交
  4. 21 2月, 2010 4 次提交
  5. 20 2月, 2010 4 次提交