1. 30 10月, 2011 4 次提交
  2. 28 10月, 2011 1 次提交
    • B
      Merge branch 'rth/vis2' of git://repo.or.cz/qemu/rth · b5a12aa2
      Blue Swirl 提交于
      * 'rth/vis2' of git://repo.or.cz/qemu/rth:
        target-sparc: Implement FALIGNDATA inline.
        target-sparc: Implement BMASK/BSHUFFLE.
        target-sparc: Implement ALIGNADDR* inline.
        target-sparc: Implement EDGE* instructions.
        target-sparc: Implement fpack{16,32,fix}.
        target-sparc: Implement PDIST.
        target-sparc: Do exceptions management fully inside the helpers.
        target-sparc: Change fpr representation to doubles.
        target-sparc: Undo cpu_fpr rename.
        target-sparc: Extract float128 move to a function.
        target-sparc: Extract common code for floating-point operations.
        target-sparc: Make FPU/VIS helpers const when possible.
        target-sparc: Pass float64 parameters instead of dt0/1 temporaries.
        target-sparc: Add accessors for double-precision fpr access.
        target-sparc: Mark fprs dirty in store accessor.
        target-sparc: Add accessors for single-precision fpr access.
      b5a12aa2
  3. 27 10月, 2011 26 次提交
  4. 26 10月, 2011 4 次提交
  5. 25 10月, 2011 2 次提交
  6. 24 10月, 2011 1 次提交
  7. 23 10月, 2011 2 次提交