1. 20 5月, 2011 1 次提交
  2. 19 4月, 2011 1 次提交
  3. 02 4月, 2010 1 次提交
  4. 17 3月, 2010 1 次提交
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      Large page TLB flush · d4c430a8
      Paul Brook 提交于
      QEMU uses a fixed page size for the CPU TLB.  If the guest uses large
      pages then we effectively split these into multiple smaller pages, and
      populate the corresponding TLB entries on demand.
      
      When the guest invalidates the TLB by virtual address we must invalidate
      all entries covered by the large page.  However the address used to
      invalidate the entry may not be present in the QEMU TLB, so we do not
      know which regions to clear.
      
      Implementing a full vaiable size TLB is hard and slow, so just keep a
      simple address/mask pair to record which addresses may have been mapped by
      large pages.  If the guest invalidates this region then flush the
      whole TLB.
      Signed-off-by: NPaul Brook <paul@codesourcery.com>
      d4c430a8
  5. 13 3月, 2010 1 次提交
  6. 07 3月, 2010 1 次提交
  7. 06 12月, 2009 2 次提交