1. 22 10月, 2012 1 次提交
    • A
      memory: manage coalesced mmio via a MemoryListener · 95d2994a
      Avi Kivity 提交于
      Instead of calling a global function on coalesced mmio changes, which
      routes the call to kvm if enabled, add coalesced mmio hooks to
      MemoryListener and make kvm use that instead.
      
      The motivation is support for multiple address spaces (which means we
      we need to filter the call on the right address space) but the result
      is cleaner as well.
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      95d2994a
  2. 10 9月, 2012 2 次提交
  3. 09 9月, 2012 1 次提交
  4. 09 8月, 2012 7 次提交
  5. 12 7月, 2012 1 次提交
  6. 11 7月, 2012 1 次提交
  7. 22 5月, 2012 5 次提交
  8. 17 5月, 2012 1 次提交
    • J
      kvm: Introduce basic MSI support for in-kernel irqchips · 04fa27f5
      Jan Kiszka 提交于
      This patch basically adds kvm_irqchip_send_msi, a service for sending
      arbitrary MSI messages to KVM's in-kernel irqchip models.
      
      As the original KVM API requires us to establish a static route from a
      pseudo GSI to the target MSI message and inject the MSI via toggling
      that virtual IRQ, we need to play some tricks to make this interface
      transparent. We create those routes on demand and keep them in a hash
      table. Succeeding messages can then search for an existing route in the
      table first and reuse it whenever possible. If we should run out of
      limited GSIs, we simply flush the table and rebuild it as messages are
      sent.
      
      This approach is rather simple and could be optimized further. However,
      latest kernels contains a more efficient MSI injection interface that
      will obsolete the GSI-based dynamic injection.
      Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
      Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
      04fa27f5
  9. 13 4月, 2012 2 次提交
  10. 15 3月, 2012 1 次提交
  11. 07 3月, 2012 1 次提交
  12. 09 2月, 2012 1 次提交
  13. 19 1月, 2012 3 次提交
    • J
      kvm: x86: Add user space part for in-kernel APIC · 680c1c6f
      Jan Kiszka 提交于
      This introduces the alternative APIC device which makes use of KVM's
      in-kernel device model. External NMI injection via LINT1 is emulated by
      checking the current state of the in-kernel APIC, only injecting a NMI
      into the VCPU if LINT1 is unmasked and configured to DM_NMI.
      
      MSI is not yet supported, so we disable this when the in-kernel model is
      in use.
      
      CC: Lai Jiangshan <laijs@cn.fujitsu.com>
      Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
      680c1c6f
    • J
      kvm: x86: Establish IRQ0 override control · 9b5b76d4
      Jan Kiszka 提交于
      KVM is forced to disable the IRQ0 override when we run with in-kernel
      irqchip but without IRQ routing support of the kernel. Set the fwcfg
      value correspondingly. This aligns us with qemu-kvm.
      Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
      9b5b76d4
    • J
      kvm: Introduce core services for in-kernel irqchip support · 84b058d7
      Jan Kiszka 提交于
      Add the basic infrastructure to active in-kernel irqchip support, inject
      interrupts into these models, and maintain IRQ routes.
      
      Routing is optional and depends on the host arch supporting
      KVM_CAP_IRQ_ROUTING. When it's not available on x86, we looe the HPET as
      we can't route GSI0 to IOAPIC pin 2.
      
      In-kernel irqchip support will once be controlled by the machine
      property 'kernel_irqchip', but this is not yet wired up.
      Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
      84b058d7
  14. 20 12月, 2011 1 次提交
  15. 21 6月, 2011 1 次提交
  16. 17 3月, 2011 1 次提交
  17. 15 3月, 2011 1 次提交
  18. 14 2月, 2011 4 次提交
  19. 23 1月, 2011 2 次提交
  20. 10 1月, 2011 1 次提交
  21. 21 10月, 2010 2 次提交
    • M
      MCE: Relay UCR MCE to guest · c0532a76
      Marcelo Tosatti 提交于
      Port qemu-kvm's
      
      commit 4b62fff1101a7ad77553147717a8bd3bf79df7ef
      Author: Huang Ying <ying.huang@intel.com>
      Date:   Mon Sep 21 10:43:25 2009 +0800
      
          MCE: Relay UCR MCE to guest
      
          UCR (uncorrected recovery) MCE is supported in recent Intel CPUs,
          where some hardware error such as some memory error can be reported
          without PCC (processor context corrupted). To recover from such MCE,
          the corresponding memory will be unmapped, and all processes accessing
          the memory will be killed via SIGBUS.
      
          For KVM, if QEMU/KVM is killed, all guest processes will be killed
          too. So we relay SIGBUS from host OS to guest system via a UCR MCE
          injection. Then guest OS can isolate corresponding memory and kill
          necessary guest processes only. SIGBUS sent to main thread (not VCPU
          threads) will be broadcast to all VCPU threads as UCR MCE.
      
      aliguori: fix build
      Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      c0532a76
    • H
      Add RAM -> physical addr mapping in MCE simulation · 983dfc3b
      Huang Ying 提交于
      In QEMU-KVM, physical address != RAM address. While MCE simulation
      needs physical address instead of RAM address. So
      kvm_physical_memory_addr_from_ram() is implemented to do the
      conversion, and it is invoked before being filled in the IA32_MCi_ADDR
      MSR.
      Reported-by: NDean Nelson <dnelson@redhat.com>
      Signed-off-by: NHuang Ying <ying.huang@intel.com>
      Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      983dfc3b