- 07 10月, 2007 4 次提交
-
-
由 j_mayer 提交于
As a side effect, single step and branch step are available again. Remove irrelevant MSR bits definitions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3341 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
(mostly CPU registration and UIC, for now). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3340 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3339 c046a42c-6fe2-441c-8c8c-71466251a162
-
- 06 10月, 2007 5 次提交
-
-
由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3338 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3337 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3336 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
memory segments. Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead. Make SLB area size implementation dependant. Improve TLB & SLB search debug traces. Temporary hack to make PowerPC 970 boot from ROM instead of RAM. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3335 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3334 c046a42c-6fe2-441c-8c8c-71466251a162
-
- 05 10月, 2007 10 次提交
-
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3333 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
Use it at CPU initialisation time. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3332 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3331 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 balrog 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3330 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 balrog 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3329 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 balrog 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3328 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 balrog 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3327 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 balrog 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3326 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 balrog 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3325 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 balrog 提交于
Don't abort on illegal GPSR reads, instead only warn. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3324 c046a42c-6fe2-441c-8c8c-71466251a162
-
- 04 10月, 2007 6 次提交
-
-
由 j_mayer 提交于
effect is implementation dependant. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3323 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
* fix the tunable cache line size probe for PowerPC 970. * initialize HID5 so cache line is 32 bytes long when running in user-mode only git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3322 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
Implement dcbz tunable cache line size for PowerPC 970. Make hardware reset vector implementation dependant. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3321 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3320 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
Cleanups in MMU exceptions generation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3319 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3318 c046a42c-6fe2-441c-8c8c-71466251a162
-
- 03 10月, 2007 4 次提交
-
-
由 j_mayer 提交于
reset must occur after we defined the CPU features. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3317 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
Protect PowerPC 64 only features with #ifdef (TARGET_PPC64) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3316 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3315 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3314 c046a42c-6fe2-441c-8c8c-71466251a162
-
- 02 10月, 2007 4 次提交
-
-
由 j_mayer 提交于
Add comments in load & store tables to ease code reading. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3313 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
on 32 bits hosts. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3312 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3311 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3310 c046a42c-6fe2-441c-8c8c-71466251a162
-
- 01 10月, 2007 7 次提交
-
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3309 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
exceptions from op helpers. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3308 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
of supporting code. Implement 74xx software TLB model. Keep 74xx with software TLB disabled, as Linux is not able to handle TLB miss on those processors. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3307 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
Tag unused functions with unused attribute instead of using #ifdef (TODO) to ease tests: just have to enable the implementation in the cpu_defs table. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3306 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3305 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3304 c046a42c-6fe2-441c-8c8c-71466251a162
-
由 j_mayer 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3303 c046a42c-6fe2-441c-8c8c-71466251a162
-