- 24 8月, 2018 40 次提交
-
-
由 Matthew Fortune 提交于
Add basic nanoMIPS boot code for Malta. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Aleksandar Markovic 提交于
nanoMIPS is always NaN2008 compliant, and rules for checking FCR31's NAN2008 bit are obsoleted. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Aleksandar Rikalo 提交于
Modify load_elf32()/load_elf64() to treat EM_NANOMIPS as legal as EM_MIPS is. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Aleksandar Markovic 提交于
Starting from nanoMIPS introduction, machine variant can be EM_MIPS or EM_NANOMIPS. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Aleksandar Rikalo 提交于
Value 249 is registered as valid for usage for nanoMIPS executables. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Fix ERET/ERETNC so that ADEL exception can be raised. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Update BadInstr and BadInstrX registers for nanoMIPS. The same support for pre-nanoMIPS remains unimplemented. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Dimitrije Nikolic 提交于
A set of nanoMIPS instructions is not available if Config5 bit NMS is set. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of DSP ASE instructions for nanoMIPS - part 6. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of DSP ASE instructions for nanoMIPS - part 5. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of DSP ASE instructions for nanoMIPS - part 4. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of DSP ASE instructions for nanoMIPS - part 3. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of DSP ASE instructions for nanoMIPS - part 2. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of DSP ASE instructions for nanoMIPS - part 1. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of MT ASE instructions for nanoMIPS. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Aleksandar Rikalo 提交于
Use bits from configuration registers for availability control of MT ASE instructions, rather than only ISA_MT bit in insn_flags. This is done by adding a field in hflags for MT bit, and adding functions check_mt() and check_cp0_mt(). Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of various flavors of nanoMIPS 32-bit branch instructions. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Aleksandar Rikalo 提交于
Implement support for nanoMIPS LLWP/SCWP instructions. Beside adding core functionality of these instructions, this patch adds support for availability control via configuration bit XNP. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NDimitrije Nikolic <dnikolic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Dimitrije Nikolic 提交于
Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is needed for implementing availability control of various instructions. Reviewed-by: "Aleksandar Markovic <amarkovic@wavecomp.com>" Signed-off-by: "Aleksandar Markovic <amarkovic@wavecomp.com>"
-
由 Yongbok Kim 提交于
Add emulation of various nanoMIPS load and store instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 James Hogan 提交于
Implement emulation of nanoMIPS EXTW instruction. EXTW instruction is similar to the MIPS r6 ALIGN instruction, except that it counts the other way and in bits instead of bytes. We therefore generalise gen_align() function into a new gen_align_bits() function (which counts in bits instead of bytes and optimises when bits = size of the word), and implement gen_align() and a new gen_ext() based on that. Since we need to know the word size to check for when the number of bits == the word size, the opc argument is replaced with a wordsz argument (either 32 or 64). Signed-off-by: NJames Hogan <james.hogan@mips.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
-
由 Matthew Fortune 提交于
Added a helper for ROTX based on the pseudocode from the architecture spec. This instraction was not present in previous MIPS instruction sets. Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
-
由 Yongbok Kim 提交于
Add emulation of nanoMIPS instructions situated in pool p_lsx, and emulation of LSA instruction as well. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of misc nanoMIPS instructions situated in pool32axf. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of nanoMIPS instructions that are situated in pool32a0. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of basic floating point arithmetic for nanoMIPS. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of LI48, ADDIU48, ADDIUGP48, ADDIUPC48, LWPC48, and SWPC48 instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of SIGRIE, SYSCALL, BREAK, SDBBP, ADDIU, ADDIUPC, ADDIUGP.W, LWGP, SWGP, ORI, XORI, ANDI, and other instructions. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of SAVE16 and RESTORE.JRC16 instructions. Routines gen_save(), gen_restore(), and gen_adjust_sp() are provided to support this feature. This patch at the same time provides function gen_op_addr_addi(). This function will be used in emulation of some other nanoMIPS instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of NOT16, AND16, XOR16, OR16 instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of LWXS16, LB16, SB16, LBU16, LH16, SH16, LHU16, LW16, LWSP16, LW4X4, SW4X4, LWGP16, SWSP16, SW16, and SWGP16 instructions. Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of misc nanoMIPS 16-bit instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of nanoMIPS 16-bit shift instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add emulation of nanoMIPS 16-bit branch instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Yongbok Kim 提交于
Add emulation of nanoMIPS 16-bit arithmetic instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Aleksandar Markovic 提交于
Add some basic utility functions and macros for nanoMIPS decoding engine. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Aleksandar Markovic 提交于
Add empty body and invocation of decode_nanomips_opc() if the bit ISA_NANOMIPS32 is set in ctx->insn_flags. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Only if Config3.ISA is 3 (microMIPS), the mode should be switched in cpu_state_reset(). Config3.ISA is 1 for nanoMIPS processors, and no mode change should happen. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
-
由 Stefan Markovic 提交于
Add nanoMIPS opcodes for DSP ASE instruction pools and instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
-