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  1. 23 2月, 2012 9 次提交
    • E
      add Westmere as a qemu cpu model (v2) · c58a6694
      由 Eduardo Habkost 提交于 
      Version 1 of this patch was:

Message-Id: <1307041990-26194-11-git-send-email-ehabkost@redhat.com
http://marc.info/?l=qemu-devel&m=130704415919346

This version doesn't have the duplicate feature bits on extfeature_edx, though,
as they are being removed from the Intel models (as they are reserved bits on
Intel CPUs).

Version 1 patch description:

    This patch adds Westmere as a qemu cpu model.  The only
    additional guest visible feature of a Westmere relative
    to Nehalem is the inclusion of AES instructions.  However
    as other non-ABI visible modifications exist along with
    fabrication changes, the CPUID data of the corresponding
    deployed silicon was altered slightly to reflect this.

    We've seen isolated cases where apparently unrelated yet
    slightly incoherent CPUID data has caused problems, most
    notably during guest boot.  Providing Westmere as a
    model separate fro Nehalem allows us to more easily address
    such quirks.

    [ehabkost: edited commit message to have a better Subject line]
Signed-off-by: Njohn cooper <john.cooper@redhat.com>
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>

Changes version 1 -> version 2:
 - Remove the duplicate feature bits on extfeature_edx, that are
   reserved on Intel CPUs
 - Reorder feature flags
 - Remove x2apic from the definition because x2apic requires some fixes
   that have to be resubmitted
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      c58a6694
    • E
      cpu defs: remove replicated flags from Intel (v2) · df07ec56
      由 Eduardo Habkost 提交于 
      This patch removes the replicated feature flags from cpuid 8000_0001:edx
(extfeature_edx) from Intel models, as the duplicated feature flags are present
only on AMD CPUs. On Intel models, only the i64, syscall, and xd flags are kept
on extfeature_edx.

This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.

Original John's patch description was:

    cpu model bug fixes and definition corrections

    This patch was intended to address the replicated feature
    flags in cpuid 8000_0001:edx from cpuid 0000_0001:edx.
    This is due to AMD's definition where these flags are
    mostly cloned in the 8000_0001:edx cpuid function.
    qemu64 attempted to glue together the respective Intel
    and AMD nearly disjoint features and this propagated to
    the new Intel models as doing so was believed conservative
    at the time.  However after further soak and test lugging
    around this cruft doesn't provide any value, could
    conceivably confuse a guest, and has confused users trying
    to maintain/add cpu definitions.  This also caused issues
    for libvirt attempting to track this mis-encoding.

    So we've here tossed out the AMD replicated definitions
    from the Intel models, added a few replications into AMD
    definitions which were missing according to AMD's latest
    CPUID document, and reordered the config file flags to
    follow intuitive sequential bit ordering.  Also two flag
    name aliases were added for clarity to Intel models.  The
    end result being the models definitions now conform to
    their respective cpuid specifications sans x2apic which is
    emulated by kvm.

    This was tested with the following combinations:

        [Conroe, Penryn, Nehalem] x [F12-64, win64, win32] -- Intel host
        [Opteron_G1, Opteron_G2, Opteron_G3] x [F12-64, win64, win32] -- AMD host

    Yielding successful boots in all cases.
Signed-off-by: Njohn cooper <john.cooper@redhat.com>

Changes v1 -> v2:
 - Rebase against latest Qemu git tree
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      df07ec56
    • E
      cpu defs: add pse36, mca, mtrr to AMD CPU definitions (v2) · 0ce01375
      由 Eduardo Habkost 提交于 
      This patch adds some missing flags to extfeature_edx, that were missing
according to AMD's latest CPUID document.

This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.

Original John's patch description was:

    cpu model bug fixes and definition corrections

    This patch was intended to address the replicated feature
    flags in cpuid 8000_0001:edx from cpuid 0000_0001:edx.
    This is due to AMD's definition where these flags are
    mostly cloned in the 8000_0001:edx cpuid function.
    qemu64 attempted to glue together the respective Intel
    and AMD nearly disjoint features and this propagated to
    the new Intel models as doing so was believed conservative
    at the time.  However after further soak and test lugging
    around this cruft doesn't provide any value, could
    conceivably confuse a guest, and has confused users trying
    to maintain/add cpu definitions.  This also caused issues
    for libvirt attempting to track this mis-encoding.

    So we've here tossed out the AMD replicated definitions
    from the Intel models, added a few replications into AMD
    definitions which were missing according to AMD's latest
    CPUID document, and reordered the config file flags to
    follow intuitive sequential bit ordering.  Also two flag
    name aliases were added for clarity to Intel models.  The
    end result being the models definitions now conform to
    their respective cpuid specifications sans x2apic which is
    emulated by kvm.

    This was tested with the following combinations:

        [Conroe, Penryn, Nehalem] x [F12-64, win64, win32] -- Intel host
        [Opteron_G1, Opteron_G2, Opteron_G3] x [F12-64, win64, win32] -- AMD host

    Yielding successful boots in all cases.
Signed-off-by: Njohn cooper <john.cooper@redhat.com>

Changes v1 -> v2:
 - Rebase against latest Qemu git tree
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      0ce01375
    • E
      cpu defs: use Intel flag names for Intel models (v2) · 3ac8ebfe
      由 Eduardo Habkost 提交于 
      Use 'i64' instead of 'lm' and 'xd' instead of 'nx' on Intel models.

The flags have different names on Intel docs, so use those names for clarity.

This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.

Changes v1 -> v2:
 - Rebase patch against latest Qemu git tree
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      3ac8ebfe
    • E
      cpu flags: aliases: pclmuldq|pclmulqdq and ffxsr|fxsr_opt · f370be3c
      由 Eduardo Habkost 提交于 
      pclmulqdq: /proc/cpuinfo on Linux and all documentation I have seen uses
pclmulqdq as the flag name. As the only document using pclmuldq seems to
be the Intel CPUID documentation (Application Note 485), it looks like a
typo and not the correct name for the flag.

ffxsr: AMD docs refer to fxsr_opt as ffxsr, so allow this named to be
used too.
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      f370be3c
    • E
      cpu models: reorder flag list to match bit order · f5244e93
      由 Eduardo Habkost 提交于 
      This will make it easier to review and change the flag list in the future.

No behaviour change should be introduced by this, as it is just changing
the flag order on the config file.

To make sure the flag sets are really not changed by this patch, I have
used the following stupid script to compare the flag values in the
config files:
https://gist.github.com/1004885Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      f5244e93
    • P
      split SCSI and LSI, add myself as SCSI maintainer · de7724f7
      由 Paolo Bonzini 提交于 
      This has been the de facto situation for a while now.
Add a tree, too.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      de7724f7
    • A
      qom: add test tools · 235fe3bf
      由 Anthony Liguori 提交于 
      Tested-by: NAndreas F=E4rber <afaerber@suse.de>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      235fe3bf
    • A
      qmp: make qmp.py easier to use · 9f68f7fb
      由 Anthony Liguori 提交于 
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      9f68f7fb
  3. 22 2月, 2012 24 次提交
  5. 21 2月, 2012 7 次提交