- 20 1月, 2017 4 次提交
-
-
由 Peter Maydell 提交于
Enable the ARM_FEATURE_EL2 bit on Cortex-A52 and Cortex-A57, since this is all now sufficiently implemented to work with the GICv3. We provide the usual CPU property to disable it for backwards compatibility with the older virt boards. In this commit, we disable the EL2 feature on the virt and ZynpMP boards, so there is no overall effect. Another commit will expose a board-level property to allow the user to enable EL2. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Message-id: 1483977924-14522-18-git-send-email-peter.maydell@linaro.org
-
由 Peter Maydell 提交于
If we are giving the guest a CPU with EL2, it is likely to want to use the HVC instruction itself, for instance for providing PSCI to inner guest VMs. This makes using HVC as the PSCI conduit for the outer QEMU a bad idea. We will want to use SMC instead is this case: this makes sense because QEMU's PSCI implementation is effectively an emulation of functionality provided by EL3 firmware. Add code to support selecting the PSCI conduit to use, rather than hardcoding use of HVC. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: NAndrew Jones <drjones@redhat.com> Message-id: 1483977924-14522-15-git-send-email-peter.maydell@linaro.org
-
由 Peter Maydell 提交于
Wire the new VIRQ, VFIQ and maintenance interrupt lines from the GIC to each CPU. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1483977924-14522-5-git-send-email-peter.maydell@linaro.org
-
由 Shannon Zhao 提交于
Using -cpu cortex-a9 (or any other unsupported CPU) with the virt board will cause QEMU to segmentation fault. This bug was introduced in commit 9ac4ef77, which incorrectly added a NULL terminator when converting the VirtBoardInfo array into a simple array of strings defining the valid CPUs. The cpuname_valid() loop already has a termination condition based on ARRAY_SIZE, so the NULL is spurious and causes the strcmp() to segfault if we reach it. Delete the NULL. Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Message-id: 1484619334-10488-1-git-send-email-zhaoshenglong@huawei.com [PMM: expanded commit message] Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 09 1月, 2017 11 次提交
-
-
由 Andrew Jones 提交于
by moving VirtGuestInfo.fw_cfg to VirtMachineState. This is the mach-virt equivalent of "pc: Move PcGuestInfo.fw_cfg to PCMachineState" and "pc: Eliminate PcGuestInfo struct" combined. Signed-off-by: NAndrew Jones <drjones@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-14-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
Now that we pass VirtMachineState, and guest-info is just part of that state, we can remove all the redundant members and access the VirtMachineState directly. Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-12-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
Only two functions take VirtGuestInfo parameters. Now that guest-info is part of VirtMachineState, and VirtMachineState is defined in the virt header, pass that instead. Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-11-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
In preparation to share more Virt machine state than just guest-info with other mach-virt source files, move the State and Class structures to virt.h Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-10-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
include/hw/arm/virt-acpi-build.h is only used for VirtGuestInfo, which doesn't even necessarily have to be ACPI specific. Move VirtGuestInfo to include/hw/arm/virt.h, allowing us to remove include/hw/arm/virt-acpi-build.h, and to prepare for even more code motion. Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-9-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
Instead of allocating a new struct just for VirtGuestInfo and the machine_done Notifier, place them inside VirtMachineState. This is the mach-virt equivalent of "pc: Eliminate struct PcGuestInfoState" Suggested-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-8-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
machvirt_init may need to probe for the gic version. If so, then make sure the result is written to VirtMachineState. With the state up to date, use it instead of a local variable. This is a cleanup that prepares for VirtMachineState to be passed to functions even outside hw/arm/virt.c Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-7-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
Some simple cleanups made possible by "hw/arm/virt: Merge VirtBoardInfo and VirtMachineState" Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-6-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Peter Maydell 提交于
The architectural timers in ARM CPUs all have level triggered interrupts (unless you're using KVM on a host kernel before 4.4, which misimplemented them as edge-triggered). We were incorrectly describing them in the device tree as edge triggered. This can cause problems for guest kernels in 4.8 before rc6: * pre-4.8 kernels ignore the values in the DT * 4.8 before rc6 write the DT values to the GIC config registers * newer than rc6 ignore the DT and insist that the timer interrupts are level triggered regardless Fix the DT so we're describing reality. For backwards-compatibility purposes, only do this for the virt-2.9 machine onward. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com>
-
由 Peter Maydell 提交于
Rename all the variables which used to be VirtBoardInfo* and are now VirtMachineState* so their names are in line with the type being used. Apart from the removal of the line 'VirtMachineState *vbi = vms;' this commit is purely a search-and-replace of 'vbi' with 'vms'. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com>
-
由 Peter Maydell 提交于
One of the purposes of VirtBoardInfo was to hold various bits of state about the board. Now we have MachineState and the subclass VirtMachineState to do this. Fold the VirtBoardInfo into VirtMachineState rather than having some flags in one struct and some in another with no useful way to get between them. In the process we drop the code for looking up the memory map and irq map from the CPU model, because in practice we always use the same maps in all cases. For easier code review, this change removes the VirtBoardInfo type but leaves all the variables which used to be VirtBoardInfo* and are now VirtMachineState* with their now-confusing 'vbi' names. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com>
-
- 27 12月, 2016 1 次提交
-
-
由 Peter Maydell 提交于
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com>
-
- 16 11月, 2016 1 次提交
-
-
由 Igor Mammedov 提交于
PC will use this field in other way, so move it outside the common code so PC could set a different value, i.e. all CPUs regardless of where they are coming from (-smp X | -device cpu...). It's quick and dirty hack as it could be implemented in more generic way in MashineClass. But do it in simple way since only PC is affected so far. Later we can generalize it when another affected target gets support for -device cpu. Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Message-Id: <1479212236-183810-3-git-send-email-imammedo@redhat.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
-
- 28 10月, 2016 2 次提交
-
-
由 Wei Huang 提交于
CPU vPMU is now turned ON by default, but this feature wasn't introduced until virt-2.7 machine type. To solve this problem, this patch adds a PMU option in machine state, which is used to control CPU's vPMU status. This PMU option is not exposed to command line and is turned off in virt-2.6 machine type. Reviewed-by: NAndrew Jones <drjones@redhat.com> Signed-off-by: NWei Huang <wei@redhat.com> Message-id: 1477463301-17175-3-git-send-email-wei@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Wei Huang 提交于
This patch adds a pmu=[on/off] option to enable/disable vPMU support in guest vCPU. It allows virt tools, such as libvirt, to determine the exsitence of vPMU and configure it. Note this option is only available for cortex-a57/cortex-53/ host CPUs, but unavailable on ARMv7 and other processors. Also even though "pmu=" option is available for TCG mode, setting it doesn't turn PMU on. Signed-off-by: NWei Huang <wei@redhat.com> Reviewed-by: NAndrew Jones <drjones@redhat.com> Message-id: 1477463301-17175-2-git-send-email-wei@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 25 10月, 2016 1 次提交
-
-
由 Igor Mammedov 提交于
so that it would be possible to increase maxcpus limit for x86 target. Keep spapr/virt_arm at limit they used to have 255. Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Reviewed-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
-
- 24 10月, 2016 1 次提交
-
-
由 Peter Maydell 提交于
Since the virt board model will never create a CPU which is pre-ARMv7, we know that our minimum page size is 4K and can set minimum_page_bits accordingly, for improved performance. Note that this is a migration compatibility break, so we introduce it only for the virt-2.8 machine and onward; virt-2.7 continues using the old 1K pages. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
-
- 18 10月, 2016 1 次提交
-
-
由 Andrew Jones 提交于
We should avoid exposing new hardware (through DT and ACPI) on older machine types. This patch keeps 2.7 and older from changing, despite the introduction of ITS support for 2.8. Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NEric Auger <eric.auger@redhat.com> Message-id: 1476117341-32690-3-git-send-email-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 10 10月, 2016 1 次提交
-
-
由 Igor Mammedov 提交于
Replace repeated pattern for (i = 0; i < nb_numa_nodes; i++) { if (test_bit(idx, numa_info[i].node_cpu)) { ... break; with a helper function to lookup numa node index for cpu. Suggested-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
-
- 04 10月, 2016 2 次提交
-
-
由 Pavel Fedin 提交于
If supported by the configuration, ITS will be added automatically. This patch also renames v2m_phandle to msi_phandle because it's now used by both MSI implementations. Signed-off-by: NPavel Fedin <p.fedin@samsung.com> Signed-off-by: NEric Auger <eric.auger@redhat.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1474616617-366-7-git-send-email-eric.auger@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
Signed-off-by: NAndrew Jones <drjones@redhat.com> Message-id: 1474641676-25017-1-git-send-email-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 14 7月, 2016 1 次提交
-
-
由 Andrew Jones 提交于
KVM adjusts the MPIDR of guest vcpus based on the architecture of the host, 32-bit vs. 64-bit, and, for 64-bit, also on the type of GIC the guest is using. To be consistent and improve SGI efficiency we make the same adjustments for TCG as 64-bit KVM hosts. We neglect to add consistency with 32-bit KVM hosts, as that would reduce SGI efficiency and KVM is expected to change. As MPIDR is a system register, and thus guest visible, we only make adjustments for current and later versioned machines. Signed-off-by: NAndrew Jones <drjones@redhat.com> Message-id: 1467378129-23302-3-git-send-email-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 08 7月, 2016 2 次提交
-
-
由 Igor Mammedov 提交于
Considering that features are converted to global properties and global properties are automatically applied to every new instance of created CPU (at object_new() time), there is no point in parsing cpu_model string every time a CPU created. So move parsing outside CPU creation loop and do it only once. Parsing also should be done before any CPU is created so that features would affect the first CPU a well. Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
-
由 Igor Mammedov 提交于
Currently CPUClass->parse_features() is used to parse -cpu features string and set properties on created CPU instances. But considering that features specified by -cpu apply to every created CPU instance, it doesn't make sense to parse the same features string for every CPU created. It also makes every target that cares about parsing features string explicitly call CPUClass->parse_features() parser, which gets in a way if we consider using generic device_add for CPU hotplug as device_add has not a clue about CPU specific hooks. Turns out we can use global properties mechanism to set properties on every created CPU instance for a given type. That way it's possible to convert CPU features into a set of global properties for CPU type specified by -cpu cpu_model and common Device.device_post_init() will apply them to CPU of given type automatically regardless whether it's manually created CPU or CPU created with help of device_add. Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
-
- 04 7月, 2016 1 次提交
-
-
由 Ard Biesheuvel 提交于
Since QEMU performs cacheable accesses to guest memory when doing DMA as part of the implementation of emulated PCI devices, guest drivers should use cacheable accesses as well when running under KVM. Since this essentially means that emulated PCI devices are DMA coherent, set the 'dma-coherent' DT property on the PCIe host controller DT node. This brings the DT description into line with the ACPI description, which already marks the PCI bridge as cache coherent (see commit bc64b96c). Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 1467134090-5099-1-git-send-email-ard.biesheuvel@linaro.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 14 6月, 2016 5 次提交
-
-
由 Andrew Jones 提交于
Signed-off-by: NAndrew Jones <drjones@redhat.com> Message-id: 1465746713-30414-5-git-send-email-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
Create two variants of DEFINE_VIRT_MACHINE. One, just called DEFINE_VIRT_MACHINE, that does not set properties that only the latest machine type should have, and another that does. This will hopefully reduce potential for errors when adding new versions. Signed-off-by: NAndrew Jones <drjones@redhat.com> Message-id: 1465746713-30414-4-git-send-email-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
Use DEFINE_VIRT_MACHINE to generate versioned machine type info. Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1465746713-30414-3-git-send-email-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Andrew Jones 提交于
Rename machvirt_info (which is specifically for 2.6 TypeInfo) to machvirt_2_6_info, and separate the type registration of the abstract machine type from the versioned type. Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1465746713-30414-2-git-send-email-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Shannon Zhao 提交于
Add a virtual PMU device for virt machine while use PPI 7 for PMU overflow interrupt number. Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com> Message-id: 1465267577-1808-3-git-send-email-zhaoshenglong@huawei.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 09 6月, 2016 1 次提交
-
-
由 xiaoqiang zhao 提交于
commit f0d1d2c1 ("hw/char: QOM'ify pl011 model") break qemu-system-arm virt machine if option '-machine secure=on' is provided. The function create_uart is called twice. So make CharDriverState pointer a parameter to create_uart instead of hardcoded. Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Tested-by: NJerome Forissier <jerome.forissier@linaro.org> Message-id: 1465353045-26323-1-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 06 6月, 2016 2 次提交
-
-
由 xiaoqiang zhao 提交于
* drop qemu_char_get_next_serial and use chardev prop * add pl011_create wrapper function to create pl011 uart device * change affected board code to use the new way Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465028065-5855-2-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cole Robinson 提交于
If you try to gic-version=host with TCG on a KVM aarch64 host, qemu segfaults, since host requires KVM APIs. Explicitly reject gic-version=host if KVM is not enabled https://bugzilla.redhat.com/show_bug.cgi?id=1339977Signed-off-by: NCole Robinson <crobinso@redhat.com> Message-id: b1b3b0dd143b7995a7f4062966b80a2cf3e3c71e.1464273085.git.crobinso@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 21 5月, 2016 1 次提交
-
-
由 Igor Mammedov 提交于
Switch to adding compat properties incrementaly instead of completly overwriting compat_props per machine type. That removes data duplication which we have due to nested [PC|SPAPR]_COMPAT_* macros. It also allows to set default device properties from default foo_machine_options() hook, which will be used in following patch for putting VMGENID device as a function if ISA bridge on pc/q35 machines. Suggested-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NCornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> [ehabkost: Fixed CCW_COMPAT_* and PC_COMPAT_0_* defines] Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
-
- 12 5月, 2016 1 次提交
-
-
由 Shannon Zhao 提交于
Generate memory nodes according to NUMA topology. Set numa-node-id property for cpu and memory nodes. Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com> Message-id: 1461667229-9216-2-git-send-email-zhaoshenglong@huawei.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 31 3月, 2016 1 次提交
-
-
由 Shannon Zhao 提交于
There is a problem for power button that it will not work if an early system_powerdown request happens before guest gpio driver loads. Fix this problem by using gpio_key. Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Message-id: 1458221140-15232-3-git-send-email-zhaoshenglong@huawei.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-