- 10 6月, 2014 26 次提交
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由 Peter Maydell 提交于
The IRQ_testbit() function is never used; remove it. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Maydell 提交于
The stream_halted() function is never used; remove it. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Maydell 提交于
The 'on' variable is never used, and 'off' is only used if IPV6_V6ONLY is defined; delete 'on' and move 'off' to the point where it is used. This avoids warnings from clang 3.4. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Maydell 提交于
Drop the sd_acmd_type[] array: it is never used. (The equivalent sd_cmd_type[] array for normal commands is used to identify those commands whose argument includes the card address in the top 16 bits; but for app commands the card address is passed with the APP_CMD prefix, not with the argument to the app command itself.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Maydell 提交于
The variables parallel_io and parallel_irq are unused; delete them. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Maydell 提交于
The zero_ethaddr[] array is never used; delete it. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Sergey Fedorov 提交于
Signed-off-by: NSergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Crosthwaite 提交于
Just use desc instead. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Crosthwaite 提交于
Fix some typos in comments. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Crosthwaite 提交于
Add a debug printf for TX descriptor fetching. This is helpful to anyone needing to debug TX ring buffer traversal. It is also now consistent with the RX code which has a similar printf. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Crosthwaite 提交于
The local variable "desc" was being used to read-modify-write the first descriptor (of a multi-desc packet) upon packet completion. desc however continues to be used by the code as the current descriptor. Give this first desc RMW it's own local variable to avoid trampling. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Maydell 提交于
console: two little bugfixes. # gpg: Signature made Tue 10 Jun 2014 12:01:07 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-console-20140610-1: console: fix -vga none -sdl crash console: kill MAX_CONSOLES, alloc consoles dynamically Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Gerd Hoffmann 提交于
Call get_alloc_displaystate() for proper initialization instead of allocating with g_new(). Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Gerd Hoffmann 提交于
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Peter Maydell 提交于
Several patches for s390: - bugfixes: A fix for a long-standing bug in the css code as well as a fixup for the recent I/O adapter support. - Exploitation of the userspace cmma enablement/reset interface, if it is present. - Some debuggability improvements by logging unmanageable conditions. - virtio-ccw finally gets migration support for its structures. - Some cleanup as to how floating interrupts are injected. # gpg: Signature made Tue 10 Jun 2014 08:57:56 BST using RSA key ID C6F02FAF # gpg: Can't check signature: public key not found * remotes/cohuck/tags/s390x-20140610: s390x/kvm: inject via flic s390x: cleanup interrupt injection s390x/kvm: add alternative injection interface s390x: consolidate floating interrupts s390/virtio-ccw: migration support s390x/kvm: Log unmanageable program interruptions s390x/kvm: Log unmanageable external interruptions s390x/kvm: enable/reset cmma via vm attributes s390x/kvm: make flic play well with old kernels s390x/css: handle emw correctly for tsch Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Cornelia Huck 提交于
Try to inject floating interrupts via the flic if it is available. This allows us to inject the full range of floating interrupts. Reviewed-by: NJens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Cornelia Huck 提交于
Remove the need for a cpu to inject a floating interrupt on kvm. Acked-by: NThomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Cornelia Huck 提交于
Add kvm_s390_{vcpu,floating}_interrupt, which offer the possibility to inject interrupts with larger payloads (when a kvm backend becomes available). Moreover, kvm_s390_floating_interrupt() does no longer have the bogus requirement for a vcpu. Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Cornelia Huck 提交于
Move the injection code for all floating interrupts to interrupt.c and add a comment. Also get rid of the #ifdef CONFIG_KVM for the service interrupt. Reviewed-by: NThomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Jens Freimann 提交于
This patch adds live migration support for virtio-ccw devices. It's not done with vmstate because virtio itself is not yet ported to vmstate either. Signed-off-by: NJens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Thomas Huth 提交于
The kernel only drops to userspace if an endless program interrupt loop has been detected. Let's print an error message in this case to inform the user about the crash and stop the affected CPU with a panic event, just like it is already done for the external interruption loop detection. Signed-off-by: NThomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: NJens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: NCornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Thomas Huth 提交于
Interception code 0x14 only drops to userspace when an unmanageable external interruption interception occured (e.g. if the External New PSW does not disable external interruptions). Instead of bailing out via the default handler, it is better to inform the user with a proper error message that also includes the bad PSW, and to stop the affected CPU with a panic event instead. Signed-off-by: NThomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: NJens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: NDavid Hildenbrand <dahi@linux.vnet.ibm.com> Acked-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Dominik Dingel 提交于
Exploit the new api for userspace-controlled cmma. If supported, enable cmma during kvm initialization and register a reset handler for cmma, which is also called directly from the load IPL code. The reset functionality is needed to reset the cmma state of the guest pages, e.g. if a system reset is triggered via qemu monitor; otherwise this could result in data corruption. A guest triggered reboot may now lead to multiple cmma resets; this is OK, however, as this is slowpath anyway and the simplest way to achieve the intended effects. Signed-off-by: NDominik Dingel <dingel@linux.vnet.ibm.com> Acked-by: NChristian Borntraeger <borntraeger@de.ibm.com> Acked-by: NCornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Cornelia Huck 提交于
If we run with an old kernel that does not support KVM_CAP_IRQ_ROUTING, we don't have to do anything in the ->register_io_adapter and ->io_adapter_map callbacks and therefore should return 0 instead of -ENOSYS (just as the non-kvm flic does). This fixes using adapter interrupts when running under an older kernel, which broke with "s390x: add I/O adapter registration". Reported-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Cornelia Huck 提交于
We should not try to store the emw portion of the irb if extended measurements are not applicable. In particular, we should not surprise the guest by storing a larger irb if it did not enable extended measurements. Cc: qemu-stable@nongnu.org Reviewed-by: NDavid Hildenbrand <dahi@linux.vnet.ibm.com> Tested-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Peter Maydell 提交于
```------------------------------------------------------------- target-arm queue: * support -bios option in vexpress boards * register the Cortex-A57 impdef system registers * fix handling of UXN bit in ARMv8 page tables * complete support of crypto insns in A32/T32 * implement CRC and crypto insns in A64 * fix bugs in generic timer control register ``` ------------------------------------------------------------- # gpg: Signature made Mon 09 Jun 2014 16:08:26 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140609-1: target-arm: Delete unused iwmmxt_msadb helper target-arm: Fix errors in writes to generic timer control registers target-arm: A64: Implement two-register SHA instructions target-arm: A64: Implement 3-register SHA instructions target-arm: A64: Implement AES instructions target-arm: A32/T32: Mask CRC value in calling code, not helper target-arm: A64: Implement CRC instructions target-arm: VFPv4 implies half-precision extension target-arm: Clean up handling of ARMv8 optional feature bits target-arm: Remove unnecessary setting of feature bits target-arm: arm_any_initfn() should never set ARM_FEATURE_AARCH64 target-arm: A64: Use PMULL feature bit for PMULL target-arm: add support for v8 VMULL.P64 instruction target-arm: Allow 3reg_wide undefreq to encode more bad size options target-arm: add support for v8 SHA1 and SHA256 instructions target-arm: Correct handling of UXN bit in ARMv8 LPAE page tables target-arm: Prepare cpreg writefns/readfns for EL3/SecExt target-arm/cpu64.c: Actually register Cortex-A57 impdef registers vexpress: Add support for the -bios flag to provide firmware Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 09 6月, 2014 14 次提交
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由 Peter Maydell 提交于
Tracing pull request # gpg: Signature made Mon 09 Jun 2014 14:44:18 BST using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" * remotes/stefanha/tags/tracing-pull-request: trace: Replace fprintf with error_report and print location trace: Multi-backend tracing trace: Replace error with warning if event is not defined simpletrace: add support for trace record pid field trace: add pid field to simpletrace record Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
The iwmmxt_msadb helper and its corresponding gen function are unused; delete them. (This function appears to have never been used right back to the initial implementation of iwMMXt; it is identical to iwmmxt_madduq, and is presumably an accidental remnant from the initial development.) Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401822125-1822-1-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The code for handling writes to the generic timer control registers had several bugs: * ISTATUS (bit 2) is read-only but we forced it to zero on any write * the check for "was IMASK (bit 1) toggled?" incorrectly used '&' where it should be '^' * the handling of IMASK was inverted: we should set the IRQ if ISTATUS is set and IMASK is clear, not if both are set The combination of these bugs meant that when running a Linux guest that uses the generic timers we would fairly quickly end up either forgetting that the timer output should be asserted, or failing to set the IRQ when the timer was unmasked. The result is that the guest never gets any more timer interrupts. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401803208-1281-1-git-send-email-peter.maydell@linaro.org Cc: qemu-stable@nongnu.org
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由 Peter Maydell 提交于
Implement the two-register SHA instruction group from the optional Crypto Extensions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-10-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the 3-register SHA instruction group from the optional Crypto Extensions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-9-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the AES instructions from the optional Crypto Extensions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-8-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Bring the 32-bit CRC helper functions into line with the A64 ones, by masking the high bytes of the value in the calling code rather than the helper. This is more efficient since we can determine the mask at translation time. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-7-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the optional A64 CRC instructions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-6-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
VFPv4 implies the presence of the half-precision floating point extension (which is optional in VFPv3). Add this implied rule to arm_cpu_realizefn() and remove some no-longer-needed explicit setting of the bit in initfns. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-5-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
CRC and crypto are both optional v8 extensions, so FEATURE_V8 should not imply them. Instead we should set these bits in the initfns for the 32-bit and 64-bit "cpu any" and for the Cortex-A57. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-4-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
FEATURE_V8 implies both FEATURE_V7MP and FEATURE_ARM_DIV, so we don't need to set them explicitly in initfns which set the V8 feature bit. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-3-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The arm_any_initfn() is used only for the 32-bit linux-user "cpu any", so it only gets called in builds where TARGET_AARCH64 is not defined. Remove the unreachable line which sets ARM_FEATURE_AARCH64. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-2-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Now that we have a separate ARM_FEATURE_V8_PMULL bit, use it for the A64 PMULL, not the AES feature bit. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Add support for the VMULL.P64 polynomial 64x64 to 128 bit multiplication instruction in the A32/T32 instruction sets; this is part of the v8 Crypto Extensions. To do this we have to move the neon_pmull_64_{lo,hi} helpers from helper-a64.c into neon_helper.c so they can be used by the AArch32 translator. Inspired-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401386724-26529-4-git-send-email-peter.maydell@linaro.org
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