1. 07 6月, 2017 7 次提交
    • X
      qtest: add rtc periodic timer test · bd618eab
      Xiao Guangrong 提交于
      It tests the accuracy of rtc periodic timer which is recently
      improved & fixed by commit 7ffcb539a3 ("mc146818rtc: precisely count
      the clock for periodic timer", 2017-05-19).
      Signed-off-by: NXiao Guangrong <xiaoguangrong@tencent.com>
      Message-Id: <20170527025301.23499-1-xiaoguangrong@tencent.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      bd618eab
    • X
      mc146818rtc: embrace all x86 specific code · e0c8b950
      Xiao Guangrong 提交于
      Introduce a function, rtc_policy_slew_deliver_irq(), which delivers
      irq if LOST_TICK_POLICY_SLEW is used, as which is only supported on
      x86, other platforms call it will trigger a assert
      
      After that, we can move the x86 specific code to the common place
      Signed-off-by: NXiao Guangrong <xiaoguangrong@tencent.com>
      Message-Id: <20170510083259.3900-6-xiaoguangrong@tencent.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      e0c8b950
    • X
      mc146818rtc: drop unnecessary '#ifdef TARGET_I386' · 388ad5d2
      Xiao Guangrong 提交于
      If the code purely depends on LOST_TICK_POLICY_SLEW, we can simply
      drop '#ifdef TARGET_I386' as only x86 can enable this tick policy
      Signed-off-by: NXiao Guangrong <xiaoguangrong@tencent.com>
      Message-Id: <20170510083259.3900-5-xiaoguangrong@tencent.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      388ad5d2
    • X
      mc146818rtc: ensure LOST_TICK_POLICY_SLEW is only enabled on TARGET_I386 · 4aa70a0e
      Xiao Guangrong 提交于
      Any tick policy specified on other platforms rather on TARGET_I386
      will fall back to LOST_TICK_POLICY_DISCARD silently, this patch makes
      sure only TARGET_I386 can enable LOST_TICK_POLICY_SLEW
      
      After that, we can enable LOST_TICK_POLICY_SLEW in the common code
      which need not use '#ifdef TARGET_I386' to make these code be x86
      specific anymore
      Signed-off-by: NXiao Guangrong <xiaoguangrong@tencent.com>
      Message-Id: <20170510083259.3900-4-xiaoguangrong@tencent.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      4aa70a0e
    • T
      mc146818rtc: precisely count the clock for periodic timer · 369b4135
      Tai Yunfang 提交于
      There are two issues in current code:
      1) If the period is changed by re-configuring RegA, the coalesced
         irq will be scaled to reflect the new period, however, it
         calculates the new interrupt number like this:
          s->irq_coalesced = (s->irq_coalesced * s->period) / period;
      
         There are some clocks will be lost if they are not enough to
         be squeezed to a single new period that will cause the VM clock
         slower
      
         In order to fix the issue, we calculate the interrupt window
         based on the precise clock rather than period, then the clocks
         lost during period is scaled can be compensated properly
      
      2) If periodic_timer_update() is called due to RegA reconfiguration,
         i.e, the period is updated, current time is not the start point
         for the next periodic timer, instead, which should start from the
         last interrupt, otherwise, the clock in VM will become slow
      
         This patch takes the clocks from last interrupt to current clock
         into account and compensates the clocks for the next interrupt,
         especially if a complete interrupt was lost in this window, the
         time can be caught up by LOST_TICK_POLICY_SLEW
      Signed-off-by: NTai Yunfang <yunfangtai@tencent.com>
      Signed-off-by: NXiao Guangrong <xiaoguangrong@tencent.com>
      Message-Id: <20170510083259.3900-3-xiaoguangrong@tencent.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      369b4135
    • X
      mc146818rtc: update periodic timer only if it is needed · 9a6e2dcf
      Xiao Guangrong 提交于
      Currently, the timer is updated whenever RegA or RegB is written
      even if the periodic timer related configuration is not changed
      
      This patch optimizes it slightly to make the update happen only
      if its period or enable-status is changed, also later patches are
      depend on this optimization
      Signed-off-by: NXiao Guangrong <xiaoguangrong@tencent.com>
      Message-Id: <20170510083259.3900-2-xiaoguangrong@tencent.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      9a6e2dcf
    • P
      Merge remote-tracking branch 'remotes/xtensa/tags/20170606-xtensa' into staging · 65dfad62
      Peter Maydell 提交于
      target/xtensa fixes:
      
      - fix read/write simcall mapping flags and return value;
      - use -serial option to direct console output of sim machine to QEMU chardev;
      - fix handling of unknown registers in the gdbstub.
      
      # gpg: Signature made Tue 06 Jun 2017 11:46:05 BST
      # gpg:                using RSA key 0x51F9CC91F83FA044
      # gpg: Good signature from "Max Filippov <filippov@cadence.com>"
      # gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>"
      # gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>"
      # Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044
      
      * remotes/xtensa/tags/20170606-xtensa:
        target/xtensa: handle unknown registers in gdbstub
        target/xtensa: support output to chardev console
        target/xtensa: fix return value of read/write simcalls
        target/xtensa: fix mapping direction in read/write simcalls
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      65dfad62
  2. 06 6月, 2017 33 次提交