- 18 3月, 2014 25 次提交
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由 Alex Bennée 提交于
Implement URECPE and FRECPE instructions in both scalar and vector forms. The actual reciprocal estimate function is shared with the A32/T32 Neon code. However in A64 we aren't using the Neon "standard FPSCR value" so extra checks are necessary to handle non-squashed denormal inputs which can never happen for A32/T32. Calling conventions for the helpers are thus modified to pass the fpst directly; we mark the helpers as TCG_CALL_NO_RWG since we're changing the declarations anyway. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-21-git-send-email-peter.maydell@linaro.org
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由 Alex Bennée 提交于
I need these available outside of softfloat for some of the reciprocal processing in aarch64 helper functions. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-20-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement FCVTZS and FCVTZU in the shift-imm and scalar-shift-imm categories; this completes the implementation of those two groups. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-19-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the saturating left shift instructions SQSHL, SQSHLU and UQSHL for the scalar-shift-imm and shift-imm categories. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-18-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The ARM A64 decoder's worst case number of TCG ops per instruction is 266 (for insn 0x4c800000, a post-indexed ST4 multiple-structures store). Raise the MAX_OP_PER_INSTR define accordingly. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-17-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the FRINT* round-to-integral operations from the 2-reg-misc category. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-16-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement SRI (shift right and insert). Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-15-git-send-email-peter.maydell@linaro.org
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由 Alex Bennée 提交于
These are fairly simple exponent only estimation functions using helpers. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-14-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Add the remaining unsupported opcodes to the decode switches for the shift-imm and scalar shift-imm categories so we can see what is still to be implemented. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-13-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement FCVTL, the only instruction in the 2-reg-misc group which widens from size to 2*size elements. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-12-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement FCVTN (narrowing fp-to-fp conversions) from the SIMD 2-reg-misc category. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-11-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the floating-point-to-integer conversion instructions FCVT[NMAPZ][SU] in the 2-reg-misc and scalar-2-reg-misc categories. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-10-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the SHLL and SHLL2 instructions from the 2-reg-misc category. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-9-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the SADDLP, UADDLP, SADALP and UADALP instructions in the SIMD 2-reg misc category. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-8-git-send-email-peter.maydell@linaro.org
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由 Alex Bennée 提交于
This implements the remaining [US][Q][R]SHR[U][N][2] opcodes, which are saturating and narrowing shift right operations. These are used in things like libav. Note signed shifts can have an "unsigned" saturating narrow operation which will floor negative values. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1394822294-14837-7-git-send-email-peter.maydell@linaro.org [PMM: Added the scalar encodings, style tweaks] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alex Bennée 提交于
Implement the CLS, CLZ operations in the 2-reg-misc category. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-6-git-send-email-peter.maydell@linaro.org
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由 Alex Bennée 提交于
Implement FSQRT in the two-reg-misc category. GCC uses this instruction form. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-5-git-send-email-peter.maydell@linaro.org
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由 Alex Bennée 提交于
This adds the remaining [US]CVTF operations to the SIMD shift-immediate, scalar-shift-immediate, two-reg-misc and scalar-two-reg-misc groups of opcodes. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1394822294-14837-4-git-send-email-peter.maydell@linaro.org [PMM: added scalar 2-misc and scalar-shift-imm encodings] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alex Bennée 提交于
rn == 31 always means SP (not XZR) whether an add_sub_ext instruction is setting the flags or not; only rd has behaviour dependent on whether we are setting flags. Reported-by: NLaurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-3-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the PMULL instruction; this is the last unimplemented insn in the three-reg-diff group. Note that PMULL with size 3 is considered part of the AES part of the crypto extensions (see the ID_AA64ISAR0_EL1 register definition in the v8 ARM ARM), so it isn't necessary to burn an extra feature bit on it, even though we're using more feature bits than a single "crypto extension present/not present" toggle. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-2-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Now that the PMCR writefn makes timer accesses, its reginfo needs the ARM_CP_IO flag, so that icount mode works correctly. (Fixes the bug accidentally introduced in commit 7c2cb42b). Reported-by: NLaurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1394908291-16546-1-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Set the reset-cbar property on CPUs used by the virt board, if they have it. This isn't necessary for correct functioning under Linux (since the A9 isn't a valid CPU for the virt board), but it is the correct behaviour. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1394462692-8871-5-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Set the reset-cbar property of the Exynos4210 SoC's Cortex-A9 CPUs, so that Linux doesn't misrecognize them as a broken uniprocessor SoC. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1394462692-8871-4-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
If the CPU is a Cortex-A9 then we should set its reset-cbar property so that the guest can read the correct PERIPHBASE/CBAR register value; newer versions of the Linux kernel (as of commit bc41b8724 in 3.12) will otherwise assume the CPU is a buggy single core A9 SoC. The realview-pbx-a9 is the only one of the cluster of boards in realview.c which works with the Cortex-A9 (ie which gets an a9mpcore_priv device); make sure it also has reset-cbar set correctly. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1394462692-8871-3-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Newer versions of the Linux kernel (as of commit bc41b8724 in 3.12) now assume that if the CPU is a Cortex-A9 and the reset value of the PERIPHBASE/CBAR register is zero then the CPU is a specific buggy single core A9 SoC, and will not try to start other cores. Since we now have a CPU property for the reset value of the CBAR, we can just fix the vexpress board model to correctly set CBAR so SMP works again. To avoid duplicate boilerplate code in both the A9 and A15 daughterboard init functions, we split out the CPU and private memory region init to its own function. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reported-by: NRob Herring <rob.herring@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1394462692-8871-2-git-send-email-peter.maydell@linaro.org
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- 17 3月, 2014 10 次提交
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由 Peter Maydell 提交于
gtk: warp bugfixes. gtk: Allow to activate grab-on-hover from the command line # gpg: Signature made Mon 17 Mar 2014 13:35:35 GMT using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-gtk-3: gtk: Don't warp absolute pointer gtk: Fix mouse warping with gtk3 gtk: Allow to activate grab-on-hover from the command line Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Cole Robinson 提交于
This matches the behavior of SDL, and makes the mouse usable when using -display gtk -vga qxl https://bugzilla.redhat.com/show_bug.cgi?id=1051724Signed-off-by: NCole Robinson <crobinso@redhat.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Cole Robinson 提交于
We were using the wrong coordinates, this fixes things to match the original gtk2 implementation. You can see this error in action by using -vga qxl, however even after this patch the mouse warps in small increments up and to the left, -7x and -3y pixels at a time, until the pointer is warped off the widget. I think it's a qxl bug, but the next patch covers it up. Signed-off-by: NCole Robinson <crobinso@redhat.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Jan Kiszka 提交于
As long as we have no persistent GTK configuration, this allows to enable the useful grab-on-hover feature already when starting the VM. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> [ kraxel: fix warning with CONFIG_GTK=n ] Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Peter Maydell 提交于
* remotes/bonzini/fixes-for-2.0: vl.c: Output error on invalid machine type target-alpha: fix subl and s8subl indentation qemu-nbd: Fix coverity issues rules.mak: Fix per object libs extraction Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Miroslav Rezanina 提交于
Output error message using qemu's error_report() function when user provides the invalid machine type on the command line. This also saves time to find what issue is when you downgrade from one version of qemu to another that doesn't support required machine type yet (the version user downgraded to have to have this patch applied too, of course). Signed-off-by: NMiroslav Rezanina <mrezanin@redhat.com> [Replace printf with error_printf, suggested by Markus Armbruster. - Paolo] Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
Two missing braces, one close and one open, fabulously let the code compile. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
There are two issues in qemu-nbd: a missing return value check after calling accept(), and file descriptor leaks in nbd_client_thread. Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Fam Zheng 提交于
Don't sort the extracted options, sort the objects. Reported-by: NChristian Mahnke <cmahnke@googlemail.com> Signed-off-by: NFam Zheng <famz@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Fam Zheng 提交于
This fixes a dangerous bug: "make clean" after "make distclean" will delete every single file including those under .git, if you do in-tree build! Rationale: A first "make distclean" will unset $(DSOSUF), a following "make distclean" or "make clean" will find all the files and delete it. Fix it by explicitly typing the file extensions here, and combine multiple find invocations into one. Signed-off-by: NFam Zheng <famz@redhat.com> Message-id: 1395020122-4957-1-git-send-email-famz@redhat.com Reviewed-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 16 3月, 2014 2 次提交
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由 Peter Maydell 提交于
trivial patches for 2014-03-15 # gpg: Signature made Sat 15 Mar 2014 09:54:30 GMT using RSA key ID 74F0C838 # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: E190 8639 3B10 B51B AC2C 8B73 5253 C5AD 74F0 C838 * remotes/mjt/tags/trivial-patches-2014-03-15: FSL eTSEC: Fix typo in rx ring scripts/make-release: Don't distribute .git directories configure: Don't use __int128_t for clang versions before 3.2 audio: Add 'static' attributes to several variables tests: Fix 'make test' for i686 hosts (build regression) misc: Fix typos in comments Add qga/qapi-generated to .gitignore hw/timer/grlib_gptimer: Avoid integer overflows .travis.yml: add IRC notifications for build failures .travis.yml: trivial whitespace fixup .travis.yml: re-enable lttng user space trace test .travis.yml: add a new build target with non-core devlibs sasl: Avoid 'Could not find keytab file' in syslog Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
* remotes/rth/tcg-aarch-6-2: tcg-aarch64: Introduce tcg_out_insn_3405 tcg-aarch64: Support div, rem tcg-aarch64: Support muluh, mulsh tcg-aarch64: Support add2, sub2 tcg-aarch64: Support deposit tcg-aarch64: Use tcg_out_insn for setcond tcg-aarch64: Support movcond tcg-aarch64: Support andc, orc, eqv, not, neg tcg-aarch64: Handle constant operands to and, or, xor tcg-aarch64: Handle constant operands to add, sub, and compare tcg-aarch64: Implement mov with tcg_out_insn tcg-aarch64: Introduce tcg_out_insn_3401 tcg-aarch64: Convert shift insns to tcg_out_insn tcg-aarch64: Introduce tcg_out_insn Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 15 3月, 2014 3 次提交
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由 Fabien Chouteau 提交于
Signed-off-by: NFabien Chouteau <chouteau@adacore.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Cole Robinson 提交于
[crobinso@localhost qemu-2.0.0-rc0]$ find . -name .git ./dtc/.git ./pixman/.git This is already done for the rom submodules. https://bugs.launchpad.net/qemu/+bug/1224414Signed-off-by: NCole Robinson <crobinso@redhat.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Stefan Weil 提交于
Those versions don't fully support __int128_t. Cc: qemu-stable@nongnu.org Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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