checking Xilinx datasheet "UG1085" (v1.7)
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-27-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-26-f4bug@amsat.org>

following the datasheet.
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-25-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-24-f4bug@amsat.org>

[based on a patch from Alistair Francis <alistair.francis@xilinx.com>
 from qemu/xilinx tag xilinx-v2015.2]
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-23-f4bug@amsat.org>

[based on a patch from Alistair Francis <alistair.francis@xilinx.com>
 from qemu/xilinx tag xilinx-v2015.2]
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-22-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-21-f4bug@amsat.org>

[based on a patch from Alistair Francis <alistair.francis@xilinx.com>
 from qemu/xilinx tag xilinx-v2015.2]
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-20-f4bug@amsat.org>

As per the Spec v3.00
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-19-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-18-f4bug@amsat.org>

checking Xilinx datasheet "UG585" (v1.12.1)
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-17-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-16-f4bug@amsat.org>

We only set a 32-bit value, but this is a good practice in case this
code is used as reference.

(missed in 5efc9016)
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-15-f4bug@amsat.org>

Incorrect value will throw an error.
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-14-f4bug@amsat.org>

The 64-bit ADMA address is not converted to the cpu endianes correctly.
This patch fixes the issue and uses a valid mask for the attribute data.
Signed-off-by: NSai Pavan Boddu <saipava@xilinx.com>
[AF: Re-write commit message]
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-13-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-12-f4bug@amsat.org>

Incorrect value will throw an error.

Note than Spec v2 is supported by default.
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-11-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-10-f4bug@amsat.org>

using many #defines is not portable when scaling to different HCI.
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-9-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-8-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20180208164818.7961-7-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20180208164818.7961-6-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20180208164818.7961-5-f4bug@amsat.org>

Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20180208164818.7961-4-f4bug@amsat.org>

The PCI model is tested with the pc/x86_64 machine,
the SysBus model with the smdkc210/arm machine.
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
Message-Id: <20180208164818.7961-3-f4bug@amsat.org>

avoid the "errp && *errp" pattern (not recommended in "qapi/error.h" comments).
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-2-f4bug@amsat.org>

Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20180208162343.30809-2-marcandre.lureau@redhat.com>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Only EXTRA_LDFLAGS seems to be used during configure Xen checks.
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20180208162343.30809-1-marcandre.lureau@redhat.com>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Define two functions to update the interrupt state, and call them
on loadvm.  This removes the need to migrate the state as part of
vmstate_kvaser_pci.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Signed-off-by: NDeniz Eren <deniz.eren@icloud.com>
Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Signed-off-by: NDeniz Eren <deniz.eren@icloud.com>
Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

The core SJA1000 support is independent of following
patches which map SJA1000 chip to PCI boards.

The work is based on Jin Yang GSoC 2013 work funded
by Google and mentored in frame of RTEMS project GSoC
slot donated to QEMU.

Rewritten for QEMU-2.0+ versions and architecture cleanup
by Pavel Pisa (Czech Technical University in Prague).
Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Connection to the real host CAN bus network through
SocketCAN network interface is available only for Linux
host system. Mechanism is generic, support for another
CAN API and operating systems can be implemented in future.
Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

The CanBusState state structure is created for each
emulated CAN channel. Individual clients/emulated
CAN interfaces or host interface connection registers
to the bus by CanBusClientState structure.

The CAN core is prepared to support connection to the
real host CAN bus network. The commit with such support
for Linux SocketCAN follows.

Implementation is as simple as possible.  There is no state to be
migrated, and messages prioritization and queuing are not considered
for now.  But it is intended to be extended when need arises.

Development repository and more documentation at

https://gitlab.fel.cvut.cz/canbus/qemu-canbus

The work is based on Jin Yang GSoC 2013 work funded
by Google and mentored in frame of RTEMS project GSoC
slot donated to QEMU.

Rewritten for QEMU-2.0+ versions and architecture cleanup
by Pavel Pisa (Czech Technical University in Prague).
Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Since HAX_VM_IOCTL_ALLOC_RAM takes a 32-bit size, it cannot handle
RAM blocks of 4GB or larger, which is why HAXM can only run guests
with less than 4GB of RAM. Solve this problem by utilizing the new
HAXM API, HAX_VM_IOCTL_ADD_RAMBLOCK, which takes a 64-bit size, to
register RAM blocks with the HAXM kernel module. The new API is
first added in HAXM 7.0.0, and its availablility and be confirmed
by the presence of the HAX_CAP_64BIT_RAMBLOCK capability flag.

When the guest RAM size reaches 7GB, QEMU will ask HAXM to set up a
memory mapping that covers a 4GB region, which will fail, because
HAX_VM_IOCTL_SET_RAM also takes a 32-bit size. Work around this
limitation by splitting the large mapping into small ones and
calling HAX_VM_IOCTL_SET_RAM multiple times.

Bug: https://bugs.launchpad.net/qemu/+bug/1735576Signed-off-by: NYu Ning <yu.ning@intel.com>
Message-Id: <1515752555-12784-1-git-send-email-yu.ning@linux.intel.com>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

The make rules for building QEMU are mostly silent by default. They can
be made verbose by setting the variable V=1. The default state does not
however correspond to a V=0 setting - $(V) must be undefined / empty to
get the default quiet build.
Signed-off-by: NDaniel P. Berrange <berrange@redhat.com>
Message-Id: <20180123164718.12714-3-berrange@redhat.com>
Reviewed-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

This reverts commit 42a77f1c.

The primary intention of this change was to silence messages
like

  make[1]: '/home/berrange/src/virt/qemu/capstone/libcapstone.a' is up to date.

which we get when calling make recursively with explicit
targets.

The problem is that this change affected every make target,
not merely the targets that triggered these "is up to date"
messages. As a result any targets that were not invoking
commands via "$(call quiet-command ...)" suddenly become
silent. This is particularly bad for "make install" which
now appears todo nothing.

Rather than go through every make rule and try to identify
places where we now need to explicitly print a message to
show work taking place, just revert the change.

To address the original problem of silencing "is up to date"
messages, we simply add --quiet to the SUBDIR_MAKEVARS
variable, so it only affects us on recursive make calls.
Signed-off-by: NDaniel P. Berrange <berrange@redhat.com>
Message-Id: <20180123164718.12714-2-berrange@redhat.com>
Tested-by: NEric Blake <eblake@redhat.com>
Reviewed-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

ppc patch queue 2018-02-12

Here's the accumulatead ppc and pseries related patches for the last
while.  Highlights are:
    * A number of Macintosh / CUDA cleanups from Mark Cave-Ayland
    * An important bug fix (missing "break;") for
      H_GET_CPU_CHARACTERISTICS
    * Yet another fix for SMT mode handling
    * Assorted other cleanups and fixes

# gpg: Signature made Mon 12 Feb 2018 03:39:30 GMT
# gpg:                using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.12-20180212:
  misc: introduce new mos6522 VIA device and enable it for ppc builds
  cuda: factor out timebase-derived counter value and load time
  cuda: set timer 1 frequency property to CUDA_TIMER_FREQ
  cuda: don't call cuda_update() when writing to ACR register
  cuda: minor cosmetic tidy-ups to get_next_irq_time()
  cuda: rename frequency property to tb_frequency
  cuda: introduce CUDAState parameter to get_counter()
  spapr: set vsmt to MAX(8, smp_threads)
  cuda: don't allow writes to port output pins
  cuda: do not use old_mmio accesses
  hw/ppc: rename functions in comments
  spapr: add missing break in h_get_cpu_characteristics()
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>