1. 15 12月, 2014 25 次提交
  2. 26 11月, 2014 2 次提交
  3. 25 11月, 2014 9 次提交
  4. 24 11月, 2014 4 次提交
    • P
      Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging · 3d4a70f8
      Peter Maydell 提交于
      Block patches for 2.2.0-rc3
      
      # gpg: Signature made Mon 24 Nov 2014 12:52:23 GMT using RSA key ID C88F2FD6
      # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"
      
      * remotes/kevin/tags/for-upstream:
        Revert "qemu-img info: show nocow info"
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      3d4a70f8
    • P
      Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging · a31a7475
      Peter Maydell 提交于
      Three patches to fix ExtINT for the QEMU implementation of the local APIC.
      
      # gpg: Signature made Mon 24 Nov 2014 13:38:36 GMT using RSA key ID 78C7AE83
      # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
      # gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
      # gpg: WARNING: This key is not certified with sufficiently trusted signatures!
      # gpg:          It is not certain that the signature belongs to the owner.
      # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
      #      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83
      
      * remotes/bonzini/tags/for-upstream:
        apic: fix incorrect handling of ExtINT interrupts wrt processor priority
        apic: fix loss of IPI due to masked ExtINT
        apic: avoid getting out of halted state on masked PIC interrupts
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      a31a7475
    • P
      apic: fix incorrect handling of ExtINT interrupts wrt processor priority · 5224c88d
      Paolo Bonzini 提交于
      This fixes another failure with ExtINT, demonstrated by QNX.  The failure
      mode is as follows:
      - IPI sent to cpu 0 (bit set in APIC irr)
      - IPI accepted by cpu 0 (bit cleared in irr, set in isr)
      - IPI sent to cpu 0 (bit set in both irr and isr)
      - PIC interrupt sent to cpu 0
      
      The PIC interrupt causes CPU_INTERRUPT_HARD to be set, but
      apic_irq_pending observes that the highest pending APIC interrupt priority
      (the IPI) is the same as the processor priority (since the IPI is still
      being handled), so apic_get_interrupt returns a spurious interrupt rather
      than the pending PIC interrupt. The result is an endless sequence of
      spurious interrupts, since nothing will clear CPU_INTERRUPT_HARD.
      
      Instead, ExtINT interrupts should have ignored the processor priority.
      Calling apic_check_pic early in apic_get_interrupt ensures that
      apic_deliver_pic_intr is called instead of delivering the spurious
      interrupt.  apic_deliver_pic_intr then clears CPU_INTERRUPT_HARD if needed.
      Reported-by: NRichard Bilson <rbilson@qnx.com>
      Tested-by: NRichard Bilson <rbilson@qnx.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      5224c88d
    • P
      apic: fix loss of IPI due to masked ExtINT · 8092cb71
      Paolo Bonzini 提交于
      This patch fixes an obscure failure of the QNX kernel on QEMU x86 SMP.
      In QNX, all hardware interrupts come via the PIC, and are delivered by
      the cpu 0 LAPIC in ExtINT mode, while IPIs are delivered by the LAPIC
      in fixed mode.
      
      This bug happens as follows:
      - cpu 0 masks a particular PIC interrupt
      - IPI sent to cpu 0 (CPU_INTERRUPT_HARD is set)
      - before the IPI is accepted, the masked interrupt line is asserted by the
      device
      
      Since the interrupt is masked, apic_deliver_pic_intr will clear
      CPU_INTERRUPT_HARD. The IPI will still be set in the APIC irr, but since
      CPU_INTERRUPT_HARD is not set the cpu will not notice. Depending on the
      scenario this can cause a system hang, i.e. if cpu 0 is expected to unmask
      the interrupt.
      
      In order to fix this, do a full check of the APIC before an EXTINT
      is acknowledged.  This can result in clearing CPU_INTERRUPT_HARD, but
      can also result in delivering the lost IPI.
      Reported-by: NRichard Bilson <rbilson@qnx.com>
      Tested-by: NRichard Bilson <rbilson@qnx.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      8092cb71