- 19 1月, 2013 29 次提交
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由 Markus Armbruster 提交于
Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Markus Armbruster 提交于
Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Markus Armbruster 提交于
Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Markus Armbruster 提交于
Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Markus Armbruster 提交于
No caller is checking the value, so all errors get ignored, usually silently. assert() instead. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Markus Armbruster 提交于
Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Paolo Bonzini 提交于
This adds two optimizations using the non-zero bit mask. In some cases involving shifts or ANDs the value can become zero, and can thus be optimized to a move of zero. Second, useless zero-extension or an AND with constant can be detected that would only zero bits that are already zero. The main advantage of this optimization is that it turns zero-extensions into moves, thus enabling much better copy propagation (around 1% code reduction). Here is for example a "test $0xff0000,%ecx + je" before optimization: mov_i64 tmp0,rcx movi_i64 tmp1,$0xff0000 discard cc_src and_i64 cc_dst,tmp0,tmp1 movi_i32 cc_op,$0x1c ext32u_i64 tmp0,cc_dst movi_i64 tmp12,$0x0 brcond_i64 tmp0,tmp12,eq,$0x0 and after (without patch on the left, with on the right): movi_i64 tmp1,$0xff0000 movi_i64 tmp1,$0xff0000 discard cc_src discard cc_src and_i64 cc_dst,rcx,tmp1 and_i64 cc_dst,rcx,tmp1 movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c ext32u_i64 tmp0,cc_dst movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0 brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0 Other similar cases: "test %eax, %eax + jne" where eax is already 32-bit (after optimization, without patch on the left, with on the right): discard cc_src discard cc_src mov_i64 cc_dst,rax mov_i64 cc_dst,rax movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c ext32u_i64 tmp0,cc_dst movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0 brcond_i64 tmp0,tmp12,ne,$0x0 brcond_i64 rax,tmp12,ne,$0x0 "test $0x1, %dl + je": movi_i64 tmp1,$0x1 movi_i64 tmp1,$0x1 discard cc_src discard cc_src and_i64 cc_dst,rdx,tmp1 and_i64 cc_dst,rdx,tmp1 movi_i32 cc_op,$0x1a movi_i32 cc_op,$0x1a ext8u_i64 tmp0,cc_dst movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0 brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0 In some cases TCG even outsmarts GCC. :) Here the input code has "and $0x2,%eax + movslq %eax,%rbx + test %rbx, %rbx" and the optimizer, thanks to copy propagation, does the following: movi_i64 tmp12,$0x2 movi_i64 tmp12,$0x2 and_i64 rax,rax,tmp12 and_i64 rax,rax,tmp12 mov_i64 cc_dst,rax mov_i64 cc_dst,rax ext32s_i64 tmp0,rax -> nop mov_i64 rbx,tmp0 -> mov_i64 rbx,cc_dst and_i64 cc_dst,rbx,rbx -> nop Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Paolo Bonzini 提交于
Add a "mask" field to the tcg_temp_info struct. A bit that is zero in "mask" will always be zero in the corresponding temporary. Zero bits in the mask can be produced from moves of immediates, zero-extensions, ANDs with constants, shifts; they can then be be propagated by logical operations, shifts, sign-extensions, negations, deposit operations, and conditional moves. Other operations will just reset the mask to all-ones, i.e. unknown. [rth: s/target_ulong/tcg_target_ulong/] Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Paolo Bonzini 提交于
The next patch will add to the TCG optimizer a field that should be non-zero in the default case. Thus, replace the memset of the temps array with a loop. Only the state field has to be up-to-date, because others are not used except if the state is TCG_TEMP_COPY or TCG_TEMP_CONST. [rth: Extracted the loop to a function.] Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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git://repo.or.cz/qemu/agraf由 Blue Swirl 提交于
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: PPC: KVM: Add support for EPR with KVM openpic: export e500 epr enable into a ppc.c function Update Linux kernel headers PPC: e500: Change in-memory order of load blobs PPC: Provide zero SVR for -cpu e500mc and e5500 PPC: E500: Calculate loading blob offsets properly openpic: set mixed mode as supported openpic: unify gcr mode mask updates openpic: move gcr write into a function
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git://repo.or.cz/qemu/agraf由 Blue Swirl 提交于
* 's390-for-upstream' of git://repo.or.cz/qemu/agraf: s390: Add a hypercall registration interface. target-s390x: Unregister reset callback on finalization s390x: fix indentation s390: Add CPU reset handler s390x: Remove inline function ebcdic_put and related data from cpu.h S390: Enable -cpu help and QMP query-cpu-definitions s390: Move IPL code into a separate device s390: new contributions GPLv2 or later
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git://github.com/rth7680/qemu由 Blue Swirl 提交于
* 'axp-next' of git://github.com/rth7680/qemu: alpha-linux-user: Correct select alpha-linux-user: Translate fcntl l_type
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由 Cornelia Huck 提交于
Allow virtio machines to register for different diag500 function codes and convert s390-virtio to use it. Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Andreas Färber 提交于
Since commit "s390: Add CPU reset handler" the CPU's instance_init registers a reset callback. Unregister that on instance_finalize. Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
In one of the last commits we accidently got 3-space indentation into the tree. Fix it up so it's 4 spaces wide. Reported-by: NAndreas Faerber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Jens Freimann 提交于
Add a CPU reset handler to have all CPUs in a PoP compliant state. Signed-off-by: NJens Freimann <jfrei@linux.vnet.ibm.com> [agraf: move hw/hw.h into existing ifdef] Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Stefan Weil 提交于
The function is only used in misc_helper.c, so move it to that file. This reduces the size of debug executables (compiled without optimization) because they get unused code and data for each compilation which includes cpu.h. Executables with optimization don't change their size. ebcdic2ascii is currently unused and could be removed (not done here). The array ascii2ebcdic must be accessed with an unsigned index, therefore (int)ascii[i] was replaced by (uint8_t)ascii[i]. The old code would have failed for a signed char less than 0. The current code only converts "QEMU" and spaces to EBCDIC, so there is no problem today. Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Viktor Mihajlovski 提交于
This enables qemu -cpu help to return a list of supported CPU models on s390 and also to query for cpu definitions in the monitor. Initially only cpu model = host is returned. This needs to be reworked into a full-fledged CPU model handling later on. This change is needed to allow libvirt exploiters (like OpenStack) to specify a CPU model. Signed-off-by: NViktor Mihajlovski <mihajlov@linux.vnet.ibm.com> Signed-off-by: NJens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: NChristian Borntraeger <borntraeger@de.ibm.com> [agraf: fix s390x-linux-user, adjust header locations] Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Christian Borntraeger 提交于
Lets move the code to setup IPL for external kernel or via the zipl rom into a separate file. This allows to - define a reboot handler, setting up the PSW appropriately - enhance the boot code to IPL disks that contain a bootmap that was created with zipl under LPAR or z/VM (future patch) - reuse that code for several machines (e.g. virtio-ccw and virtio-s390) - allow different machines to provide different defaults Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NJens Freimann <jfrei@linux.vnet.ibm.com> [agraf: symbolify initial psw, adjust header file location, fix for QOM] Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Christian Borntraeger 提交于
IBMs s390 contributions were meant to to be gplv2 or later (since we were contributing to qemu). Several of the s390 specific files link to gpl code anyway, so lets clarify the licence statement for new contributions for those files that we have touched multiple times or will likely touch again. This patch does not touch files that mostly deal with tcg. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
This patch links KVM EPR support to the existing TCG support we have now. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
Enabling and disabling the EPR capability (mpic_proxy) is a system wide operation. As such, it belongs into the ppc.c file, since that's where PPC specific machine wide logic happens. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
Based on kvm.git a843fac (next) plus dfdebc24 (master). Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
Today, we load <kernel> <initrd> <dtb> into memory in that order. However, Linux has a bug where it can only handle the dtb if it's within the first 64MB of where <kernel> starts. So instead, let's change the order to <kernel> <dtb> <initrd> making Linux happy. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
Even though our -cpu types for e500mc and e5500 are no real CPUs that actually have version registers, a guest might still want to access said version register and that has to succeed for a guest to be happy. So let's expose a zero SVR value on E500_SVR SPR reads. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
We have 3 blobs we need to load when booting the system: - kernel - initrd - dtb We place them in physical memory in that order. At least we should. This patch fixes the location calculation up to take any module into account, fixing the dtb offset along the way. Reported-by: NStuart Yoder <stuart.yoder@freescale.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The Raven MPIC implementation supports the "Mixed" mode to work with an i8259. While we don't implement mixed mode, we should mark it as a supported mode in the mode bitmap. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The mode mask already masks out bits we don't care about, so the actual handling code can stay intact regardless. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The GCR register contains too much functionality to be covered inside of the register switch statement. Move it out into a separate function. Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 18 1月, 2013 1 次提交
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由 Anthony Liguori 提交于
# By Wenchao Xia # Via Luiz Capitulino * luiz/queue/qmp: HMP: add sub command table to info HMP: move define of mon_cmds HMP: add infrastructure for sub command HMP: delete info handler HMP: add QDict to info callback handler
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- 17 1月, 2013 10 次提交
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由 Michael S. Tsirkin 提交于
Order of arguments of kvm_virtio_pci_irqfd_release got mixed up in all calls. As a result users see assertions during cleanup. Reported-by: NLaszlo Ersek <lersek@redhat.com> Reviewed-by: NLaszlo Ersek <lersek@redhat.com> Tested-by: NLaszlo Ersek <lersek@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Tested-by: NWanlong Gao <gaowanlong@cn.fujitsu.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Andreas Färber 提交于
Add a documentation section "Methods" and discuss among others how to handle overriding virtual methods. Clarify DeviceClass::realize documentation and refer to the above. Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Stefan Hajnoczi 提交于
Commit eb8eb53e5846a957cf333f2e1ec8cb6e0c04 ("libcacard: rewrite Makefile in non-recursive style") refactored libcacard/Makefile so it can be included by the top-level Makefile. The top-level clean target still loops over subdirectories, including libcacard/, to invoke recursive clean. Remove libcacard from the recursive clean since its files are already included at the top level. Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Wenchao Xia 提交于
Now info command takes a table of sub info commands, and changed do_info() to do_info_help() to do help funtion only. Note that now "info <unknown-topic>" returns error instead of list of info topics. Signed-off-by: NWenchao Xia <xiawenc@linux.vnet.ibm.com> Signed-off-by: NLuiz Capitulino <lcapitulino@redhat.com>
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由 Wenchao Xia 提交于
Because mon_cmds may use info_cmds, so adjust the declare sequence of them. Signed-off-by: NWenchao Xia <xiawenc@linux.vnet.ibm.com> Signed-off-by: NLuiz Capitulino <lcapitulino@redhat.com>
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由 Wenchao Xia 提交于
This patch make parsing of hmp command aware of that it may have sub command. Also discard simple encapsulation function monitor_find_command(). For case "@command ", space after @command is filtered out. Signed-off-by: NWenchao Xia <xiawenc@linux.vnet.ibm.com> Signed-off-by: NLuiz Capitulino <lcapitulino@redhat.com>
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由 Wenchao Xia 提交于
Now cmd and info handler have same format, so delete info handler. Signed-off-by: NWenchao Xia <xiawenc@linux.vnet.ibm.com> Signed-off-by: NLuiz Capitulino <lcapitulino@redhat.com>
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由 Wenchao Xia 提交于
This patch change all info call back function to take additional QDict * parameter, which allow those command take parameter. Now it is set to NULL at default case. Signed-off-by: NWenchao Xia <xiawenc@linux.vnet.ibm.com> Signed-off-by: NLuiz Capitulino <lcapitulino@redhat.com>
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由 Blue Swirl 提交于
OpenBSD system compiler (gcc 4.2.1) has problems with concatenation of macro arguments in macro functions: CC aes.o In file included from /src/qemu/include/qemu-common.h:126, from /src/qemu/aes.c:30: /src/qemu/include/qemu/bswap.h: In function 'leul_to_cpu': /src/qemu/include/qemu/bswap.h:461: warning: implicit declaration of function 'bswapHOST_LONG_BITS' /src/qemu/include/qemu/bswap.h:461: warning: nested extern declaration of 'bswapHOST_LONG_BITS' Function leul_to_cpu() is only used in kvm-all.c, so the warnings are not fatal on OpenBSD without -Werror. Fix by applying glue(). Also add do {} while(0) wrapping and fix semicolon use while at it. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Anthony Liguori 提交于
# By Gerd Hoffmann # Via Gerd Hoffmann * kraxel/chardev.1: chardev: add pty chardev support to chardev-add (qmp) chardev: add socket chardev support to chardev-add (qmp) chardev: add parallel chardev support to chardev-add (qmp) chardev: add serial chardev support to chardev-add (qmp) chardev: add file chardev support to chardev-add (qmp) chardev: add hmp hotplug commands chardev: add qmp hotplug commands, with null chardev support chardev: reduce chardev ifdef mess a bit chardev: fix QemuOpts lifecycle chardev: add error reporting for qemu_chr_new_from_opts
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