Use the new softfloat floatXX_muladd() functions to implement the madd,
msub, nmadd and nmsub instructions. At the same time replace the name of
the helpers by the name of the instruction, as the only reason for the
previous names was to keep the macros simple.
Reviewed-by: NRichard Henderson <rth@twiddle.net>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add MIPS ASE DSP Accumulator and DSPControl Access instructions.
Signed-off-by: NJia Liu <proljc@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add MIPS ASE DSP Compare-Pick instructions.
Signed-off-by: NJia Liu <proljc@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add MIPS ASE DSP Bit/Manipulation instructions.
Signed-off-by: NJia Liu <proljc@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add MIPS ASE DSP Multiply instructions.
Signed-off-by: NJia Liu <proljc@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add MIPS ASE DSP GPR-Based Shift instructions.
Signed-off-by: NJia Liu <proljc@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add MIPS ASE DSP Arithmetic instructions.
Signed-off-by: NJia Liu <proljc@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Rename helper flags to the new ones. This is purely a mechanical change,
it's possible to use better flags by looking at the helpers.
Reviewed-by: NRichard Henderson <rth@twiddle.net>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Implements all of the COP2 instructions except for the S<cond>
family of comparisons.  The documentation is unclear for those.
Signed-off-by: NRichard Henderson <rth@twiddle.net>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add an explicit CPUState parameter instead of relying on AREG0
and switch to AREG0 free mode.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
Acked-by: NAurelien Jarno <aurelien@aurel32.net>

helper_raise_exception_err does not return, nor do helper_raise_exception
and do_unaligned_access.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: NStefan Weil <sw@weilnetz.de>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>

The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of:

  int x;
  ...		/* no initialization of x */
  x = f (x);

which confused later bits of TCG rather badly, leading to crashes.

Fix the helpers to only return results (those instructions have no
inputs), and fix the translation code accordingly.
Signed-off-by: NNathan Froyd <froydnj@codesourcery.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Commit 36388314 moved most of the
interrupt logic to cpu-exec.c. Remove the remaining useless code
and fix software interrupts.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
Acked-by: NEdgar E. Iglesias <edgar@axis.com>
Tested-by: NEdgar E. Iglesias <edgar@axis.com>

Add instruction decoding for the microMIPS ASE.  All we do is decode and
then forward to the existing gen_* routines.
Signed-off-by: NNathan Froyd <froydnj@codesourcery.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Currently the ll/sc instructions use the virtual address in both
user and system mode. Use the physical address insteead in system
mode.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Depending on the CPU, CP0_LLAddr is either read-only or read-write,
and the returned value can be shifted by a variable amount of bits.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
Signed-off-by: NHervé Poussineau <hpoussin@reactos.org>

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7009 c046a42c-6fe2-441c-8c8c-71466251a162

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6773 c046a42c-6fe2-441c-8c8c-71466251a162

Signed-off-by: NPaul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162

Bit shuffle operations can be written with very few TCG instructions
(between 5 and 8), so it is worth converting them to TCG.

This code also move all bit shuffle generation code to a separate
function in order to have a cleaner exception code path, that is it
doesn't store back the TCG register to the target register after the
exception, as the TCG register doesn't exist anymore.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5679 c046a42c-6fe2-441c-8c8c-71466251a162

Bitfield operations can be written with very few TCG instructions
(between 2 and 5), so it is worth converting them to TCG.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5678 c046a42c-6fe2-441c-8c8c-71466251a162

This patch attempts to fix mft* helpers and the associated TCG calls.
mft* helpers do not take a register in argument, however:
- some helpers are called with an argument while they do not take one.
- some helpers are declared with an argument they don't use.
Acked-by: NThiemo Seufer <ths@networkno.de>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5674 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4802 c046a42c-6fe2-441c-8c8c-71466251a162

Stefan Weil.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4795 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4788 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4784 c046a42c-6fe2-441c-8c8c-71466251a162

leftovers.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4780 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4759 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4756 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4753 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4740 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4739 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4736 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4734 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4708 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4700 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4507 c046a42c-6fe2-441c-8c8c-71466251a162