1. 20 7月, 2016 6 次提交
    • D
      target-i386: Allow physical address bits to be set · af45907a
      Dr. David Alan Gilbert 提交于
      Currently QEMU sets the x86 number of physical address bits to the
      magic number 40.  This is only correct on some small AMD systems;
      Intel systems tend to have 36, 39, 46 bits, and large AMD systems
      tend to have 48.
      
      Having the value different from your actual hardware is detectable
      by the guest and in principal can cause problems;
      The current limit of 40 stops TB VMs being created by those lucky
      enough to have that much.
      
      This patch lets you set the physical bits by a cpu property but
      defaults to the same 40bits which matches TCGs setup.
      
      I've removed the ancient warning about the 42 bit limit in exec.c;
      I can't find that limit in there and no one else seems to know where
      it is.
      
      We use a magic value of 0 as the property default so that we can
      later distinguish between the default and a user set value.
      Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com>
      Reviewed-by: NEduardo Habkost <ehabkost@redhat.com>
      Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
      af45907a
    • D
      target-i386: Provide TCG_PHYS_ADDR_BITS · 709787ee
      Dr. David Alan Gilbert 提交于
      Provide a constant for the number of address bits supported under TCG.
      Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com>
      Suggested-by: NEduardo Habkost <ehabkost@redhat.com>
      Reviewed-by: NEduardo Habkost <ehabkost@redhat.com>
      Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
      709787ee
    • P
      Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160719' into staging · 338404d0
      Peter Maydell 提交于
      target-arm queue:
       * fix two minor Coverity complaints
      
      # gpg: Signature made Tue 19 Jul 2016 18:02:34 BST
      # gpg:                using RSA key 0x3C2525ED14360CDE
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
      # gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
      # gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
      # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE
      
      * remotes/pmaydell/tags/pull-target-arm-20160719:
        arm_gicv3: Add assert()s to tell Coverity that offsets are aligned
        target-arm: Fix unreachable code in gicv3_class_name()
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      338404d0
    • P
      Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20160719-2' into staging · 1ecfb24d
      Peter Maydell 提交于
      linux-user fixes before 2.7 freeze, fix commit message
      
      # gpg: Signature made Tue 19 Jul 2016 14:18:54 BST
      # gpg:                using RSA key 0xB44890DEDE3C9BC0
      # gpg: Good signature from "Riku Voipio <riku.voipio@iki.fi>"
      # gpg:                 aka "Riku Voipio <riku.voipio@linaro.org>"
      # Primary key fingerprint: FF82 03C8 C391 98AE 0581  41EF B448 90DE DE3C 9BC0
      
      * remotes/riku/tags/pull-linux-user-20160719-2:
        linux-user: AArch64 has sync_file_range, not sync_file_range2
        linux-user: Fix type for SIOCATMARK ioctl
        linux-user: define missing sparc syscalls
        linux-user: Fix terminal control ioctls
        linux-user: Add some new blk ioctls
        linux-user: Handle short lengths in host_to_target_sockaddr()
        linux-user: Forget about synchronous signal once it is delivered
        linux-user: Correct type for LOOP_GET_STATUS{,64} ioctls
        linux-user: Correct type for BLKSSZGET
        linux-user: Add loop control ioctls
        linux-user: Check sigsetsize argument to syscalls
        linux-user: add nested netlink types
        linux-user: convert sockaddr_ll from host to target
        linux-user: add fd_trans helper in do_recvfrom()
        linux-user: fix netlink memory corruption
        linux-user: fd_trans_*_data() returns the length
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      1ecfb24d
    • P
      arm_gicv3: Add assert()s to tell Coverity that offsets are aligned · acd82796
      Peter Maydell 提交于
      Coverity complains that the GICR_IPRIORITYR case in gicv3_readl()
      can overflow an array, because it doesn't know that the offsets
      passed to that function must be word aligned. Add some assert()s
      which hopefully tell Coverity that this isn't possible.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Message-id: 1468261372-17508-1-git-send-email-peter.maydell@linaro.org
      acd82796
    • P
      target-arm: Fix unreachable code in gicv3_class_name() · ff9d3e9c
      Peter Maydell 提交于
      Coverity complains that the exit() in gicv3_class_name()
      can be unreachable, because if TARGET_AARCH64 is defined
      then all code paths return before reaching it. Move the
      exit() up to the error_report() that it belongs with.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: NShannon Zhao <shannon.zhao@linaro.org>
      Message-id: 1468260552-8400-1-git-send-email-peter.maydell@linaro.org
      ff9d3e9c
  2. 19 7月, 2016 34 次提交