- 03 10月, 2012 2 次提交
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由 Xudong Hao 提交于
Currently it is assumed PCI device BAR access < 4G memory. If there is such a device whose BAR size is larger than 4G, it must access > 4G memory address. This patch enable the 64bits big BAR support on qemu. Signed-off-by: NXudong Hao <xudong.hao@intel.com> Signed-off-by: NXiantao Zhang <xiantao.zhang@intel.com> Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
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由 Anthony PERARD 提交于
The Xen platform device will unplug any NICs if requested by the guest (PVonHVM) including a NIC that would have been passthrough. This patch makes sure that a passthrough device will not be unplug. Reported-by: N"Zhang, Yang Z" <yang.z.zhang@intel.com> Signed-off-by: NAnthony PERARD <anthony.perard@citrix.com> Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
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- 02 10月, 2012 3 次提交
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由 Peter Maydell 提交于
The uint64_to_float32() conversion function was incorrectly always returning numbers with the sign bit set (ie negative numbers). Correct this so we return positive numbers instead. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Peter Maydell 提交于
In float16_to_float32, when returning an infinity, just pass zero as the mantissa argument to packFloat32(), rather than shifting a value which we know must be zero. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Anthony Liguori 提交于
We cannot cast directly from pointer to uint64. Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Alex Barcelo <abarcelo@ac.upc.edu> Reported-by: NAlex Barcelo <abarcelo@ac.upc.edu> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 01 10月, 2012 5 次提交
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由 Alex Williamson 提交于
Enabled for all softmmu guests supporting PCI on Linux hosts. Note that currently only x86 hosts have the kernel side VFIO IOMMU support for this. PPC (g3beige) is the only non-x86 guest known to work. ARM (veratile) hangs in firmware, others untested. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Alex Williamson 提交于
This adds the core of the QEMU VFIO-based PCI device assignment driver. To make use of this driver, enable CONFIG_VFIO, CONFIG_VFIO_IOMMU_TYPE1, and CONFIG_VFIO_PCI in your host Linux kernel config. Load the vfio-pci module. To assign device 0000:05:00.0 to a guest, do the following: for dev in $(ls /sys/bus/pci/devices/0000:05:00.0/iommu_group/devices); do vendor=$(cat /sys/bus/pci/devices/$dev/vendor) device=$(cat /sys/bus/pci/devices/$dev/device) if [ -e /sys/bus/pci/devices/$dev/driver ]; then echo $dev > /sys/bus/pci/devices/$dev/driver/unbind fi echo $vendor $device > /sys/bus/pci/drivers/vfio-pci/new_id done See Documentation/vfio.txt in the Linux kernel tree for further description of IOMMU groups and VFIO. Then launch qemu including the option: -device vfio-pci,host=0000:05:00.0 Legacy PCI interrupts (INTx) currently makes use of a kludge where we trap BAR accesses and assume the access is in response to an interrupt, therefore de-asserting and unmasking the interrupt. It's not quite as targetted as using the EOI for this, but it's self contained and seems to work across all architectures. The side-effect is a significant performance slow-down for device in INTx mode. Some devices, like graphics cards, don't really use their interrupt, so this can be turned off with the x-intx=off option, which disables INTx alltogether. This should be considered an experimental option until we refine this code. Both MSI and MSI-X are supported and avoid these issues. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Alex Williamson 提交于
Based on Linux as of 1a95620. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Alex Williamson 提交于
Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 H. Peter Anvin 提交于
This patch implements Supervisor Mode Execution Prevention (SMEP) and Supervisor Mode Access Prevention (SMAP) for x86. The purpose of the patch, obviously, is to help kernel developers debug the support for those features. A fair bit of the code relates to the handling of CPUID features. The CPUID code probably would get greatly simplified if all the feature bit words were unified into a single vector object, but in the interest of producing a minimal patch for SMEP/SMAP, and because I had very limited time for this project, I followed the existing style. [ v2: don't change the definition of the qemu64 CPU shorthand, since that breaks loading old snapshots. Per Anthony Liguori this can be fixed once the CPU feature set is snapshot. Change the coding style slightly to conform to checkpatch.pl. ] Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 30 9月, 2012 5 次提交
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由 Eduardo Habkost 提交于
The -cpu configuration interface is based on a list of feature names or properties, on a single namespace, so there's no need to mention on which CPUID leaf/register each flag is located. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NDon Slutz <Don@CloudSwitch.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Eduardo Habkost 提交于
Instead of having duplicate feature names on the ext2_feature array for the AMD feature bit aliases, we keep the feature names only on the feature_name[] array, and copy the corresponding bits to cpuid_ext2_features in case the CPU vendor is AMD. This will: - Make sure we don't set the feature bit aliases on Intel CPUs; - Make it easier to convert feature bits to CPU properties, as now we have a single bit on the x86_def_t struct for each CPU feature. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NDon Slutz <Don@CloudSwitch.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Eduardo Habkost 提交于
Both constants have the same value, but CPUID_EXT2_AMD_ALIASES is defined without using magic numbers. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NDon Slutz <Don@CloudSwitch.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Eduardo Habkost 提交于
Instea of using a hardcoded hex constant, define CPUID_EXT2_AMD_ALIASES as the set of CPUID[8000_0001].EDX bits that on AMD are the same as the bits of CPUID[1].EDX. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-By: NIgor Mammedov <imammedo@redhat.com> Reviewed-by: NDon Slutz <Don@CloudSwitch.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Eduardo Habkost 提交于
Bit 10 of CPUID[8000_0001].EDX is not defined as an alias of CPUID[1].EDX[10], so do not duplicate it on kvm_arch_get_supported_cpuid(). Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-By: NIgor Mammedov <imammedo@redhat.com> Reviewed-by: NDon Slutz <Don@CloudSwitch.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 28 9月, 2012 9 次提交
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git://git.linaro.org/people/pmaydell/qemu-arm由 Aurelien Jarno 提交于
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: Versatile Express: Add modelling of NOR flash Versatile Express: Fix NOR flash 0 address and remove flash alias hw/armv7m_nvic: Correctly register GIC region when setting up NVIC pl190: fix read of VECTADDR
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由 Richard Henderson 提交于
The blank lines inside the single dump make it difficult for the eye to pick out the block. Worse, with interior newlines, but no blank line following, the PSW line appears to belong to the next dump block. Reviewed-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
This is already handled generically in cpu_exec. Reviewed-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
Three places in the interrupt code did we not honor the mask. Reviewed-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
Acked-by: NGuan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
Cc: Paul Brook <paul@codesourcery.com> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
For all targets that currently call tcg_gen_debug_insn_start, add CPU_LOG_TB_OP_OPT to the condition that gates it. This is useful for comparing optimization dumps, when the pre-optimization dump is merely noise. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Stefan Weil 提交于
Support for helper functions with 5 arguments was missing in the code generator and in the interpreter. There is no need to pass the constant TCG_AREG0 from the code generator to the interpreter. Remove that code for the INDEX_op_qemu_st* opcodes. Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 26 9月, 2012 16 次提交
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由 Francesco Lavra 提交于
This patch adds modelling of the two NOR flash banks found on the Versatile Express motherboard. Tested with U-Boot running on an emulated Versatile Express, with either A9 or A15 CoreTile. Signed-off-by: NFrancesco Lavra <francescolavra.fl@gmail.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Francesco Lavra 提交于
In the A series memory map (implemented in the Cortex A15 CoreTile), the first NOR flash bank (flash 0) is mapped to address 0x08000000, while address 0x00000000 can be configured as alias to either the first or the second flash bank. This patch fixes the definition of flash 0 address, and for simplicity removes the alias definition. Signed-off-by: NFrancesco Lavra <francescolavra.fl@gmail.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Meador Inge 提交于
When setting up the NVIC memory regions the memory range 0x100..0xcff is aliased to an IO memory region that belongs to the ARM GIC. This aliased region should be added to the NVIC memory container, but the actual GIC IO memory region was being added instead. This mixup was causing the wrong IO memory access functions to be called when accessing parts of the NVIC memory. Signed-off-by: NMeador Inge <meadori@codesourcery.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Brendan Fennell 提交于
Reading VECTADDR was causing us to set the current priority to the wrong value, the most obvious effect of which was that we would return the vector for the wrong interrupt as the result of the read. Signed-off-by: NBrendan Fennell <bfennell@skynet.ie> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Amos Kong 提交于
Added an option to let qemu transfer a configuration file to bios, "etc/boot-fail-wait", which could be specified by command -boot reboot-timeout=T T have a max value of 0xffff, unit is ms. With this option, guest will wait for a given time if not find bootabled device, then reboot. If reboot-timeout is '-1', guest will not reboot, qemu passes '-1' to bios by default. This feature need the new seabios's support. Seabios pulls the value from the fwcfg "file" interface, this interface is used because SeaBIOS needs a reliable way of obtaining a name, value size, and value. It in no way requires that there be a real file on the user's host machine. Signed-off-by: NAmos Kong <akong@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Orit Wasserman 提交于
Signed-off-by: NOrit Wasserman <owasserm@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Orit Wasserman 提交于
getaddrinfo can give us a list of addresses, but we only try to connect to the first one. If that fails we never proceed to the next one. This is common on desktop setups that often have ipv6 configured but not actually working. To fix this make inet_connect_nonblocking retry connection with a different address. callers on inet_nonblocking_connect register a callback function that will be called when connect opertion completes, in case of failure the fd will have a negative value Signed-off-by: NOrit Wasserman <owasserm@redhat.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Orit Wasserman 提交于
No need to add non blocking parameters to the blocking inet_connect add block parameter for inet_connect_opts instead of using QemuOpt "block". Signed-off-by: NOrit Wasserman <owasserm@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Michael S. Tsirkin 提交于
refactor address resolution code to fix nonblocking connect remove getnameinfo call Signed-off-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NAmos Kong <akong@redhat.com> Signed-off-by: NOrit Wasserman <owasserm@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Stefan Weil 提交于
The old code aborted configure when no emulation target was selected. Even after removing the 'exit 1', it tried to read from STDIN when QEMU was configured with configure' '--disable-user' '--disable-system' This is fixed here. Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Gerd Hoffmann 提交于
This patch adds a "use64" property which will make the ivshmem driver register a 64bit memory bar when set, so you have something to play with when testing 64bit pci bits. It also allows to have quite big shared memory regions, like this: [root@fedora ~]# lspci -vs1:1 01:01.0 RAM memory: Red Hat, Inc Device 1110 Subsystem: Red Hat, Inc Device 1100 Physical Slot: 1-1 Flags: fast devsel Memory at fd400000 (32-bit, non-prefetchable) [disabled] [size=256] Memory at 8040000000 (64-bit, prefetchable) [size=1G] [ v5: rebase, update compat property for post-1.2 merge ] [ v4: rebase & adapt to latest master again ] [ v3: rebase & adapt to latest master ] [ v2: default to on as suggested by avi, turn off for pc-$old using compat property ] Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Tested-by: NCam Macdonell <cam@cs.ualberta.ca> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Gerd Hoffmann 提交于
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Gerd Hoffmann 提交于
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Igor Mammedov 提交于
All deps that used global qemu_system_powerdown var are now converted to notifiers, so remove it. Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Igor Mammedov 提交于
Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Igor Mammedov 提交于
Acked-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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