- 03 7月, 2010 2 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 29 6月, 2010 1 次提交
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由 Sheng Yang 提交于
Signed-off-by: NSheng Yang <sheng@linux.intel.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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- 19 6月, 2010 3 次提交
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由 Blue Swirl 提交于
Make APICState completely private to apic.c by using DeviceState in external APIs. Move apic_init() to pc.c. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
Move the actual CPUState contents handling to cpu.h and cpuid.c. Handle CPU reset and set env->halted in pc.c. Add a function to get the local APIC state of the current CPU for the MMIO. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
Pass only APICState when accessing APIC from CPU code. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 13 3月, 2010 2 次提交
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由 Andre Przywara 提交于
about half of target-i386/helper.c consist of CPUID related functions. Only one of them is a real TCG helper function. So move the whole CPUID stuff out of this into a separate file to get better maintainable parts. This is only code reordering and should not affect QEMU's functionality. Signed-off-by: NAndre Przywara <andre.przywara@amd.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
Removes a set of ifdefs from exec.c. Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other than Alpha. This will be used for page_find_alloc, which is supposed to be using virtual addresses in the first place. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 23 2月, 2010 1 次提交
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由 john cooper 提交于
This is a reimplementation of prior versions which adds the ability to define cpu models for contemporary processors. The added models are likewise selected via -cpu <name>, and are intended to displace the existing convention of "-cpu qemu64" augmented with a series of feature flags. A primary motivation was determination of a least common denominator within a given processor class to simplify guest migration. It is still possible to modify an arbitrary model via additional feature flags however the goal here was to make doing so unnecessary in typical usage. The other consideration was providing models names reflective of current processors. Both AMD and Intel have reviewed the models in terms of balancing generality of migration vs. excessive feature downgrade relative to released silicon. This version of the patch replaces the prior hard wired definitions with a configuration file approach for new models. Existing models are thus far left as-is but may easily be transitioned to (or may be overridden by) the configuration file representation. Proposed new model definitions are provided here for current AMD and Intel processors. Each model consists of a name used to select it on the command line (-cpu <name>), and a model_id which corresponds to a least common denominator commercial instance of the processor class. A table of names/model_ids may be queried via "-cpu ?model": : x86 Opteron_G3 AMD Opteron 23xx (Gen 3 Class Opteron) x86 Opteron_G2 AMD Opteron 22xx (Gen 2 Class Opteron) x86 Opteron_G1 AMD Opteron 240 (Gen 1 Class Opteron) x86 Nehalem Intel Core i7 9xx (Nehalem Class Core i7) x86 Penryn Intel Core 2 Duo P9xxx (Penryn Class Core 2) x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2) : Also added is "-cpu ?dump" which exhaustively outputs all config data for all defined models, and "-cpu ?cpuid" which enumerates all qemu recognized CPUID feature flags. The pseudo cpuid flag 'check' when added to the feature flag list will warn when feature flags (either implicit in a cpu model or explicit on the command line) would have otherwise been quietly unavailable to a guest: # qemu-system-x86_64 ... -cpu Nehalem,check warning: host cpuid 0000_0001 lacks requested flag 'sse4.2|sse4_2' [0x00100000] warning: host cpuid 0000_0001 lacks requested flag 'popcnt' [0x00800000] A similar 'enforce' pseudo flag exists which in addition to the above causes qemu to error exit if requested flags are unavailable. Configuration data for a cpu model resides in the target config file which by default will be installed as: /usr/local/etc/qemu/target-<arch>.conf The format of this file should be self explanatory given the definitions for the above six models and essentially mimics the structure of the static x86_def_t x86_defs. Encoding of cpuid flags names now allows aliases for both the configuration file and the command line which reconciles some Intel/AMD/Linux/Qemu naming differences. This patch was tested relative to qemu.git. Signed-off-by: Njohn cooper <john.cooper@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 14 1月, 2010 1 次提交
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由 Gleb Natapov 提交于
Initialize KVM paravirt cpuid leaf and allow user to control guest visible PV features through -cpu flag. Signed-off-by: NGleb Natapov <gleb@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 19 12月, 2009 2 次提交
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由 Jan Kiszka 提交于
hw_breakpoint_type and hw_breakpoint_len used the wrong index multiplier to extract type and len. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Jan Kiszka 提交于
Marcelo correctly remarked that there are usage conflicts between QEMU core code and KVM /wrt exception_index. So spend a separate field and also save/restore it properly. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 12 12月, 2009 1 次提交
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由 Glauber Costa 提交于
Currently, the msrs involved in setting up pvclock are not saved over migration and/or save/restore. This patch puts their value in special fields in our CPUState, and deal with them using vmstate. kvm also has to account for it, by including them in the msr list for the ioctls. This is a backport from qemu-kvm.git [v2: sucessfully build without kerneldir ] Signed-off-by: NGlauber Costa <glommer@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 04 12月, 2009 1 次提交
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由 Jan Kiszka 提交于
This patch extends the qemu-kvm state sync logic with support for KVM_GET/SET_VCPU_EVENTS, giving access to yet missing exception, interrupt and NMI states. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 17 11月, 2009 1 次提交
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由 Jan Kiszka 提交于
Drop interrupt_bitmap from the cpustate and solely rely on the integer interupt_injected. This prepares us for the new injected-interrupt interface, which will deprecate the bitmap, while preserving compatibility. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 06 10月, 2009 1 次提交
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由 Aurelien Jarno 提交于
This reduce the impact on hosts that have addressing modes with limited offsets. Suggested by Laurent Desnogues. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 05 10月, 2009 10 次提交
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由 Jan Kiszka 提交于
Commit 56aebc89 changed gdbstub in way that debugging 32 or 16-bit guest code is no longer possible with qemu for x86_64 guest CPUs. Since that commit, qemu only provides registers sets for 64-bit, forcing current and foreseeable gdb to also switch its architecture to 64-bit. And this breaks if the inferior is 32 or 16 bit. No question, this is a gdb issue. But, as it was confirmed in several discusssions with gdb people, it is a non-trivial thing to fix. So until qemu finds a gdb version attach with a rework x86 support, we have to work around it by switching the register layout as the guest switches its execution mode between 16/32 and 64 bit. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Juan Quintela 提交于
Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Juan Quintela 提交于
Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Juan Quintela 提交于
mce_banks is always MCE_BANKS_DEF * 4 in size, value never change CC: Huang Ying <ying.huang@intel.com> Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Juan Quintela 提交于
Don't even ask, being able to load/save between 64<->80bit floats should be forbidden Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Juan Quintela 提交于
It is needed to save the interrupt_bitmap Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Juan Quintela 提交于
It is needed to store fptags Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Juan Quintela 提交于
We save more that fpus on that 16 bits (fpstt), we need an additional field Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Juan Quintela 提交于
Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Juan Quintela 提交于
This makes the savevm code correct, and sign extensins gives us exactly what we need (namely, sign extend to 64 bits when used with 64bit addresess. Once there, change 0x100000 for 1 << 20, that maks all a20 use the same syntax. Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 04 10月, 2009 1 次提交
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由 Andre Przywara 提交于
RDTSCP reads the time stamp counter and atomically also the content of a 32-bit MSR, which can be freely set by the OS. This allows CPU local data to be queried by userspace. Linux uses this to allow a fast implementation of the getcpu() syscall, which uses the vsyscall page to avoid a context switch. AMD CPUs since K8RevF and Intel CPUs since Nehalem support this instruction. RDTSCP is guarded by the RDTSCP CPUID bit (Fn8000_0001:EDX[27]). Signed-off-by: NAndre Przywara <andre.przywara@amd.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 24 8月, 2009 2 次提交
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由 Nathan Froyd 提交于
handle_cpu_signal is very nearly copy-paste code for each target, with a few minor variations. This patch sets up appropriate defaults for a generic handle_cpu_signal and provides overrides for particular targets that did things differently. Fixing things like the persistent (XXX: use sigsetjmp) should now become somewhat easier. Previous comments on this patch suggest that the "activate soft MMU for this block" comments refer to defunct functionality. I have removed such blocks for the appropriate targets in this patch. Signed-off-by: NNathan Froyd <froydnj@codesourcery.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Anthony Liguori 提交于
kqemu introduces a number of restrictions on the i386 target. The worst is that it prevents large memory from working in the default build. Furthermore, kqemu is fundamentally flawed in a number of ways. It relies on the TSC as a time source which will not be reliable on a multiple processor system in userspace. Since most modern processors are multicore, this severely limits the utility of kqemu. kvm is a viable alternative for people looking to accelerate qemu and has the benefit of being supported by the upstream Linux kernel. If someone can implement work arounds to remove the restrictions introduced by kqemu, I'm happy to avoid and/or revert this patch. N.B. kqemu will still function in the 0.11 series but this patch removes it from the 0.12 series. Paul, please Ack or Nack this patch. Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 28 7月, 2009 1 次提交
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由 Juan Quintela 提交于
Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 17 7月, 2009 1 次提交
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由 Blue Swirl 提交于
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 16 7月, 2009 1 次提交
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由 Jan Kiszka 提交于
This allows to set segment registers via gdb also in system emulation mode. Basic sanity checks are applied and nothing is changed if they fail. But screwing up the target via this interface will never be complicated, so I avoided being too paranoid here. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 11 7月, 2009 1 次提交
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由 Anthony Liguori 提交于
Fixes build on 32-bit Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 10 7月, 2009 1 次提交
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由 Huang Ying 提交于
- MCE features are initialized when VCPU is intialized according to CPUID. - A monitor command "mce" is added to inject a MCE. - A new interrupt mask: CPU_INTERRUPT_MCE is added to inject the MCE. aliguori: fix build for linux-user Signed-off-by: NHuang Ying <ying.huang@intel.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 30 6月, 2009 1 次提交
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由 Andre Przywara 提交于
The KVM kernel will disable all bits in CPUID which are not present in the host. As this is mostly true for the hypervisor bit (1.ecx), preserve its value before the trim and restore it afterwards. Signed-off-by: NAndre Przywara <andre.przywara@amd.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 22 6月, 2009 1 次提交
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由 Gleb Natapov 提交于
This should fix compilation problem in case of CONFIG_USER_ONLY. Currently INIT/SIPI is handled in the context of CPU that sends IPI. This patch changes this to handle them like all other events in a main cpu exec loop. When KVM will gain thread per vcpu capability it will be much more clear to handle those event by cpu thread itself and not modify one cpu's state from the context of the other. Signed-off-by: NGleb Natapov <gleb@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 17 6月, 2009 1 次提交
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由 Andre Przywara 提交于
KVM-enabled QEMU will always report the vendor ID of the physical CPU it is running on. Allow to override this if explicitly requested on the command line. It will not suffice to name a CPU type (like -cpu phenom), but you have to explicitly set the vendor: -cpu phenom,vendor=AuthenticAMD Signed-off-by: NAndre Przywara <andre.przywara@amd.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 22 5月, 2009 2 次提交
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由 Jan Kiszka 提交于
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
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由 Jan Kiszka 提交于
Save and restore all so far neglected KVM-specific CPU states. Handling the TSC stabilizes migration in KVM mode. The interrupt_bitmap and mp_state are currently unused, but will become relevant for in-kernel irqchip support. By including proper saving/restoring already, we avoid having to increment CPU_SAVE_VERSION later on once again. v2: - initialize mp_state runnable (for the boot CPU) Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 19 4月, 2009 1 次提交
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由 blueswir1 提交于
Basically a recursive ":%s/USE_KQEMU/CONFIG_KQEMU/g". Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7189 c046a42c-6fe2-441c-8c8c-71466251a162
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