- 29 1月, 2016 1 次提交
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由 Peter Maydell 提交于
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Acked-by: NCornelia Huck <cornelia.huck@de.ibm.com> Message-id: 1453832250-766-8-git-send-email-peter.maydell@linaro.org
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- 13 1月, 2016 3 次提交
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由 Yi Min Zhao 提交于
At present, list_pci() shows all PCI devices as being in configured state. As devices can be deconfigured by the guest, we need to show the real configuration status instead. Signed-off-by: NYi Min Zhao <zyimin@linux.vnet.ibm.com> Reviewed-by: NCornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Yi Min Zhao 提交于
Make use of the new FH_ENABLED define in existing code. Signed-off-by: NYi Min Zhao <zyimin@linux.vnet.ibm.com> Reviewed-by: NCornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Yi Min Zhao 提交于
According to the s390 architecture, any mpcifc, pcilg, pcistg, pcistb and rpcit instructions issued to disabled PCI functions are rejected, and the instruction completes by setting condition code 3. In addition, any DMA and MSIX interruption operations are ignored. Signed-off-by: NYi Min Zhao <zyimin@linux.vnet.ibm.com> Reviewed-by: NCornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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- 01 12月, 2015 1 次提交
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由 Yi Min Zhao 提交于
Present code uses @size==UINT64_MAX to initialize IOMMU. It infers that it can map any 64-bit IOVA whatsoever. But in fact, the largest DMA range for each PCI Device on s390x is from ZPCI_SDMA_ADDR to ZPCI_EDMA_ADDR. The largest value is returned from hardware, which is to indicate the largest range hardware can support. But the real IOMMU size for specific PCI Device is obtained once qemu intercepts mpcifc instruction that guest is requesting a DMA range for that PCI Device. Therefore, before intercepting mpcifc instruction, qemu cannot be aware of the size of IOMMU region that guest will use. Moreover, iommu replay during device initialization for the whole region in 4k steps takes a very long time. In conclusion, this patch intializes IOMMU region for each PCI Device when intercept mpcifc instruction which is to register DMA range for the PCI Device. And then, destroy IOMMU region when guest wants to deregister IOAT. Signed-off-by: NYi Min Zhao <zyimin@linux.vnet.ibm.com> Reviewed-by: NCornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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- 30 4月, 2015 1 次提交
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由 Alexander Yarygin 提交于
Access register mode is one of the modes that control dynamic address translation. In this mode the address space is specified by values of the access registers. The effective address-space-control element is obtained from the result of the access register translation. See the "Access-Register Introduction" section of the chapter 5 "Program Execution" in "Principles of Operations" for more details. When the CPU is in AR mode, the s390_cpu_virt_mem_rw() function must know which access register number to use for address translation. This patch does several things: - add new parameter 'uint8_t ar' to that function - decode ar number from intercepted instructions - pass the ar number to s390_cpu_virt_mem_rw(), which in turn passes it to the KVM_S390_MEM_OP ioctl. Signed-off-by: NAlexander Yarygin <yarygin@linux.vnet.ibm.com> Reviewed-by: NThomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: NDavid Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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- 26 4月, 2015 1 次提交
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由 Peter Maydell 提交于
Rather than retaining io_mem_read/write as simple wrappers around the memory_region_dispatch_read/write functions, make the latter public and change all the callers to use them, since we need to touch all the callsites anyway to add MemTxAttrs and MemTxResult support. Delete io_mem_read and io_mem_write entirely. (All the callers currently pass MEMTXATTRS_UNSPECIFIED and convert the return value back to bool or ignore it.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
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- 18 2月, 2015 1 次提交
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由 Frank Blaschka 提交于
Change zpci instructions to use the new logical memory access functions. Signed-off-by: NFrank Blaschka <blaschka@linux.vnet.ibm.com> Signed-off-by: NJens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
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- 03 2月, 2015 2 次提交
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由 Yi Min Zhao 提交于
The virtual I/O address range passed to rpcit instruction might not map to consecutive physical guest pages. For this we have to translate and create mapping notifications for each vioa page separately. Signed-off-by: NYi Min Zhao <zyimin@cn.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Frank Blaschka 提交于
This patch avoids sign extension and fixes a data conversion bug in stpcifc. Both issues where found by Coverity. Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NFrank Blaschka <blaschka@linux.vnet.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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- 12 1月, 2015 1 次提交
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由 Frank Blaschka 提交于
This patch implements the s390 pci instructions in qemu. It allows to access and drive pci devices attached to the s390 pci bus. Because of platform constrains devices using IO BARs are not supported. Also a device has to support MSI/MSI-X to run on s390. Signed-off-by: NFrank Blaschka <frank.blaschka@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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