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OMAP MPUI bridge config register.


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  tend more to propagate bugged definition than simplify the code.
Check and fix PowerPC 6xx implementations definitions.
Misc fixes in PowerPC CPU list.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3707 c046a42c-6fe2-441c-8c8c-71466251a162

  64 bits PowerPC ones.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3706 c046a42c-6fe2-441c-8c8c-71466251a162

- hrfid is part of the hypervisor extension
- fix stfiwx naming


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3705 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3704 c046a42c-6fe2-441c-8c8c-71466251a162

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3702 c046a42c-6fe2-441c-8c8c-71466251a162

Use it to properly initialize the clock for the PreP target.


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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3699 c046a42c-6fe2-441c-8c8c-71466251a162

  and qemu-common.h to osdep.h.
Include this header in translate-op.c.
Make sure it's included first in darwin-user/qemu.h.
To avoid discarded inlining bug, define inline as always_inline and
always_inline as (( attribute (always_inline) )) __inline__.


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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3696 c046a42c-6fe2-441c-8c8c-71466251a162

libSDL. Patch by Ben Taylor.


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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3692 c046a42c-6fe2-441c-8c8c-71466251a162

 function qualifiers must always come before the return type.


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Catch wrong/unknown NOR flash command sequences, by Thorsten Zitterell.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3684 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3683 c046a42c-6fe2-441c-8c8c-71466251a162

Remove meaningless define from cpu.h
Misc cleanups.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3682 c046a42c-6fe2-441c-8c8c-71466251a162

  ie MPC5xx, MPC8xx, e200, e300, e500 and e600 cores.
Make those CPUs and PowerPC 440 available for user-mode emulation,
  thus providing a way of testing their implementation specific instructions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3681 c046a42c-6fe2-441c-8c8c-71466251a162

  (but do not provide any actual implementation).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3680 c046a42c-6fe2-441c-8c8c-71466251a162

  in order to implement Freescale cores.
Fix efsadd / efssub opcodes.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3679 c046a42c-6fe2-441c-8c8c-71466251a162

Remove TARGET_PPC64 dependency and add code provision to be able
  to define a fake 32 bits CPU with hypervisor feature support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3678 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3677 c046a42c-6fe2-441c-8c8c-71466251a162

Don't error out on reading GPCR register, just warn (Thorsten Zitterell).
Don't zero a memory that's already zeroed.


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