1. 27 6月, 2014 15 次提交
    • B
      mac99: Add motherboard devices before PCI cards · a0bb2a5f
      BALATON Zoltan 提交于
      Change the order of creating devices for New World Mac emulation so
      that devices on the motherboard are added first and PCI cards (VGA and
      NIC) come later. As a side effect, this also causes OpenBIOS to map
      the motherboard devices into the MMIO space to the same addresses as
      on real hardware and allow clients that hardcode these addresses (e.g.
      MorphOS) to find and use them until OpenBIOS is tought to map devices
      to specific addresses. (On real hardware the graphics and network
      cards are really on separate buses but we don't model that yet.) This
      brings the memory map closer to what is found on PowerMac3,1.
      Signed-off-by: NBALATON Zoltan <balaton@eik.bme.hu>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a0bb2a5f
    • P
      target-ppc: Remove unused gen_qemu_ld8s() · c99b6f87
      Peter Maydell 提交于
      The gen_qemu_ld8s() function is unused; remove it.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      c99b6f87
    • P
      target-ppc: Remove unused IMM and d extract helpers · b247812e
      Peter Maydell 提交于
      Remove the definition of the IMM and d extract helpers; these seem to have
      been added as part of the initial PPC support in 2003 but never actually
      used.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      b247812e
    • A
      vfio: Enable for SPAPR · 59181263
      Alexey Kardashevskiy 提交于
      This turns the sPAPR support on and enables VFIO container use
      in the kernel.
      
      This extends vfio_connect_container to support VFIO_SPAPR_TCE_IOMMU type
      in the host kernel.
      
      This registers a memory listener which sPAPR IOMMU will notify when
      executing H_PUT_TCE/etc DMA calls. The listener then will notify the host
      kernel about DMA map/unmap operation via VFIO_IOMMU_MAP_DMA/
      VFIO_IOMMU_UNMAP_DMA ioctls.
      
      This executes VFIO_IOMMU_ENABLE ioctl to make sure that the IOMMU is free
      of mappings and can be exclusively given to the user. At the moment SPAPR
      is the only platform requiring this call to be implemented.
      
      Note that the host kernel function implementing VFIO_IOMMU_DISABLE
      is called automatically when container's fd is closed so there is
      no need to call it explicitly from QEMU. We may need to call
      VFIO_IOMMU_DISABLE explicitly in the future for some sort of dynamic
      reconfiguration (PCI hotplug or dynamic IOMMU group management).
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Acked-by: NAlex Williamson <alex.williamson@redhat.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      59181263
    • A
      spapr_pci_vfio: Add spapr-pci-vfio-host-bridge to support vfio · 9fc34ada
      Alexey Kardashevskiy 提交于
      The patch adds a spapr-pci-vfio-host-bridge device type
      which is a PCI Host Bridge with VFIO support. The new device
      inherits from the spapr-pci-host-bridge device and adds an "iommu"
      property which is an IOMMU id. This ID represents a minimal entity
      for which IOMMU isolation can be guaranteed. In SPAPR architecture IOMMU
      group is called a Partitionable Endpoint (PE).
      
      Current implementation supports one IOMMU id per QEMU VFIO PHB. Since
      SPAPR allows multiple PHB for no extra cost, this does not seem to
      be a problem. This limitation may change in the future though.
      
      Example of use:
      Configure and Add 3 functions of a multifunctional device to QEMU:
      (the NEC PCI USB card is used as an example here):
      -device spapr-pci-vfio-host-bridge,id=USB,iommu=4,index=7 \
      -device vfio-pci,host=4:0:1.0,addr=1.0,bus=USB,multifunction=true
      -device vfio-pci,host=4:0:1.1,addr=1.1,bus=USB
      -device vfio-pci,host=4:0:1.2,addr=1.2,bus=USB
      
      where:
      * index=7 is a QEMU PHB index (used as source for MMIO/MSI/IO windows
      offset);
      * iommu=4 is an IOMMU id which can be found in sysfs:
      [aik@vpl2 ~]$ cd /sys/bus/pci/devices/0004:00:00.0/
      [aik@vpl2 0004:00:00.0]$ ls -l iommu_group
      lrwxrwxrwx 1 root root 0 Jun  5 12:49 iommu_group -> ../../../kernel/iommu_groups/4
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      9fc34ada
    • A
      vfio: Add vfio_container_ioctl() · 6d8be4c3
      Alexey Kardashevskiy 提交于
      While most operations with VFIO IOMMU driver are generic and used inside
      vfio.c, there are still some operations which only specific VFIO IOMMU
      drivers implement. The first example of it will be reading a DMA window
      start from the host.
      
      This adds a helper which passes an ioctl request to the container's fd.
      
      The helper will check if @req is known. For this, stub is added. This return
      -1 on any requests for now.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Acked-by: NAlex Williamson <alex.williamson@redhat.com>
      Acked-by: NAlex Williamson <alex.williamson@redhat.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      6d8be4c3
    • A
      spapr_iommu: Make in-kernel TCE table optional · 9bb62a07
      Alexey Kardashevskiy 提交于
      POWER KVM supports an KVM_CAP_SPAPR_TCE capability which allows allocating
      TCE tables in the host kernel memory and handle H_PUT_TCE requests
      targeted to specific LIOBN (logical bus number) right in the host without
      switching to QEMU. At the moment this is used for emulated devices only
      and the handler only puts TCE to the table. If the in-kernel H_PUT_TCE
      handler finds a LIOBN and corresponding table, it will put a TCE to
      the table and complete hypercall execution. The user space will not be
      notified.
      
      Upcoming VFIO support is going to use the same sPAPRTCETable device class
      so KVM_CAP_SPAPR_TCE is going to be used as well. That means that TCE
      tables for VFIO are going to be allocated in the host as well.
      However VFIO operates with real IOMMU tables and simple copying of
      a TCE to the real hardware TCE table will not work as guest physical
      to host physical address translation is requited.
      
      So until the host kernel gets VFIO support for H_PUT_TCE, we better not
      to register VFIO's TCE in the host.
      
      This adds a place holder for KVM_CAP_SPAPR_TCE_VFIO capability. It is not
      in upstream yet and being discussed so now it is always false which means
      that in-kernel VFIO acceleration is not supported.
      
      This adds a bool @vfio_accel flag to the sPAPRTCETable device telling
      that sPAPRTCETable should not try allocating TCE table in the host kernel
      for VFIO. The flag is false now as at the moment there is no VFIO.
      
      This adds an vfio_accel parameter to spapr_tce_new_table(), the semantic
      is the same. Since there is only emulated PCI and VIO now, the flag is set
      to false. Upcoming VFIO support will set it to true.
      
      This is a preparation patch so no change in behaviour is expected
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      9bb62a07
    • A
      spapr: Fix RTAS token numbers · 3a3b8502
      Alexey Kardashevskiy 提交于
      At the moment spapr_rtas_register() allocates a new token number for every
      new RTAS callback so numbers are not fixed and depend on the number of
      supported RTAS handlers and the exact order of spapr_rtas_register() calls.
      These tokens are copied into the device tree and remain the same during
      the guest lifetime.
      
      When we start another guest to receive a migration, it calls
      spapr_rtas_register() as well. If the number of RTAS handlers or their
      order is different in QEMU on source and destination sides, the "/rtas"
      node in the device tree will differ. Since migration overwrites the device
      tree (as it overwrites the entire RAM), the actual RTAS config on
      the destination side gets broken.
      
      This defines global contant values for every RTAS token which QEMU
      is using today.
      
      This changes spapr_rtas_register() to accept a token number instead of
      allocating one. This changes all users of spapr_rtas_register().
      
      This changes XICS-KVM not to cache tokens registered with KVM as they
      constant now.
      
      This makes TOKEN_BASE global as RTAS_XXX use TOKEN_BASE as
      a base. TOKEN_MAX is moved and renamed too and its value is changed
      to the last token + 1. Boundary checks for token values are adjusted.
      
      This reserves token numbers for "os-term" handlers and PCI hotplug
      which we are working on.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      3a3b8502
    • A
      PPC: Add support for Apple gdb in gdbstub · b3cad3ab
      Alexander Graf 提交于
      The Apple gdbstub protocol is different from the normal gdbstub protocol
      used on PowerPC. Add support for the different variant, so that we can use
      Apple's gdb to debug guest code.
      
      Keep in mind that the switch is a compile time option. We can't detect
      during runtime whether a gdb connecting to us is an upstream gdb or an
      Apple gdb.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      b3cad3ab
    • S
      target-ppc: fixed translation of mcrxr instruction · 294d1292
      Sorav Bansal 提交于
      Fixed bug in gen_mcrxr() in target-ppc/translate.c:
      The XER[SO], XER[OV], and XER[CA] flags are stored in the least
      significant bit (bit 0) of their respective registers. They need
      to be shifted left (by their respective offsets) to generate the final
      XER value. The old translation code for the 'mcrxr' instruction
      was assuming that  the flags are stored in bit 2, and was shifting them
      right (incorrectly)
      Signed-off-by: NSorav Bansal <sbansal@cse.iitd.ernet.in>
      Reviewed-by: NTom Musta <tommusta@gmail.com>
      Tested-by: NTom Musta <tommusta@gmail.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      294d1292
    • A
      spapr: Add "qemu, boot-menu" property to /chosen · cc84c0f3
      Avik Sil 提交于
      This is required to enable boot menu display during booting
      Signed-off-by: NAvik Sil <aviksil@linux.vnet.ibm.com>
      Signed-off-by: NNikunj A Dadhania <nikunj@linux.vnet.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      cc84c0f3
    • T
      linux-user: Support HWCAP2 in PowerPC · a60438dd
      Tom Musta 提交于
      Set bits in the AT_HWCAP2 entry of the AUXV.  Specifically, detect and set bits
      for bctar, ISEL and ISA 2.07.
      Signed-off-by: NTom Musta <tommusta@gmail.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a60438dd
    • T
      linux-user: Identify Addition Hardware Capabilities for PowerPC · 0e019746
      Tom Musta 提交于
      Add VSX, DFP and ISA 2.06 to the bits identified in the AT_HWCAP
      entry of the AUXV.
      Signed-off-by: NTom Musta <tommusta@gmail.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      0e019746
    • T
      target-ppc: Add DFP to Emulated Instructions Flag · b2f13550
      Tom Musta 提交于
      Decimal Floating Point is emulated, so add it the mask.  This will
      fix the erroneous message:
      
        Warning: Disabling some instructions which are not emulated by TCG (0x0, 0x4)
      Signed-off-by: NTom Musta <tommusta@gmail.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      b2f13550
    • T
      linux-user: Correct AUXV Cache Line Sizes for PowerPC · 623e250a
      Tom Musta 提交于
      Set the AT_ICACHEBSIZE and AT_DCACHEBSIZE entries of the AUXV to match the
      CPU model's cache line sizes.  This fixes memory clobbering problems on more
      recent Book 3s implementations; memset(p, 0, N) will use the dcbz instruction
      when N is sufficiently large and many of the newer server CPUs have cache lines
      sizes of 128 bytes.
      Signed-off-by: NTom Musta <tommusta@gmail.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      623e250a
  2. 26 6月, 2014 23 次提交
  3. 25 6月, 2014 2 次提交
    • P
      Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-2014-06-24' into staging · 2b5b7ae9
      Peter Maydell 提交于
      trivial patches for 2014-06-24
      
      # gpg: Signature made Tue 24 Jun 2014 17:07:31 BST using RSA key ID A4C3D7DB
      # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
      # gpg:                 aka "Michael Tokarev <mjt@corpit.ru>"
      # gpg:                 aka "Michael Tokarev <mjt@debian.org>"
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
      #      Subkey fingerprint: 6F67 E18E 7C91 C5B1 5514  66A7 BEE5 9D74 A4C3 D7DB
      
      * remotes/mjt/tags/trivial-patches-2014-06-24:
        Add support for the arm breakpoint syscall
        Increase maximum number of session of the internal TFTP server.
        target-s390x: Remove unused ld_code6() function
        hw/moxie/moxiesim.c: Remove unused moxie_intc_create()
        target-unicore: Remove unused functions
        build-sys: introduce install-prog macro to install&strip binaries and use it
        tcg: mark tcg_out* and tcg_patch* with attribute 'unused'
        rng-random: NULL check not needed before g_free()
        block.c: Remove useless 'buf' variable
        vscclient: Add required headers to fix build on FreeBSD
        target-ppc: Fix compiler warning
        configure: Enable TPM by default, add --disable-tpm
        Fix new typos (found by codespell)
        virtio-serial: remove useless set_config function
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      2b5b7ae9
    • H
      Add support for the arm breakpoint syscall · d5355087
      Hunter Laux 提交于
      OABI arm used a software interrupt(0xef9f0001) for breakpoints.
      Since 2005 gdb has used the break instruction(0xe7f001f0) for EABI.
      Apparently Steel Bank Common Lisp still uses the swi instruction.
      
      This is the kernel implementation:
      http://lxr.free-electrons.com/source/arch/arm/kernel/traps.c#L598Signed-off-by: NHunter Laux <hunterlaux@gmail.com>
      Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
      d5355087