- 27 6月, 2014 15 次提交
-
-
由 BALATON Zoltan 提交于
Change the order of creating devices for New World Mac emulation so that devices on the motherboard are added first and PCI cards (VGA and NIC) come later. As a side effect, this also causes OpenBIOS to map the motherboard devices into the MMIO space to the same addresses as on real hardware and allow clients that hardcode these addresses (e.g. MorphOS) to find and use them until OpenBIOS is tought to map devices to specific addresses. (On real hardware the graphics and network cards are really on separate buses but we don't model that yet.) This brings the memory map closer to what is found on PowerMac3,1. Signed-off-by: NBALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Peter Maydell 提交于
The gen_qemu_ld8s() function is unused; remove it. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Peter Maydell 提交于
Remove the definition of the IMM and d extract helpers; these seem to have been added as part of the initial PPC support in 2003 but never actually used. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexey Kardashevskiy 提交于
This turns the sPAPR support on and enables VFIO container use in the kernel. This extends vfio_connect_container to support VFIO_SPAPR_TCE_IOMMU type in the host kernel. This registers a memory listener which sPAPR IOMMU will notify when executing H_PUT_TCE/etc DMA calls. The listener then will notify the host kernel about DMA map/unmap operation via VFIO_IOMMU_MAP_DMA/ VFIO_IOMMU_UNMAP_DMA ioctls. This executes VFIO_IOMMU_ENABLE ioctl to make sure that the IOMMU is free of mappings and can be exclusively given to the user. At the moment SPAPR is the only platform requiring this call to be implemented. Note that the host kernel function implementing VFIO_IOMMU_DISABLE is called automatically when container's fd is closed so there is no need to call it explicitly from QEMU. We may need to call VFIO_IOMMU_DISABLE explicitly in the future for some sort of dynamic reconfiguration (PCI hotplug or dynamic IOMMU group management). Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Acked-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexey Kardashevskiy 提交于
The patch adds a spapr-pci-vfio-host-bridge device type which is a PCI Host Bridge with VFIO support. The new device inherits from the spapr-pci-host-bridge device and adds an "iommu" property which is an IOMMU id. This ID represents a minimal entity for which IOMMU isolation can be guaranteed. In SPAPR architecture IOMMU group is called a Partitionable Endpoint (PE). Current implementation supports one IOMMU id per QEMU VFIO PHB. Since SPAPR allows multiple PHB for no extra cost, this does not seem to be a problem. This limitation may change in the future though. Example of use: Configure and Add 3 functions of a multifunctional device to QEMU: (the NEC PCI USB card is used as an example here): -device spapr-pci-vfio-host-bridge,id=USB,iommu=4,index=7 \ -device vfio-pci,host=4:0:1.0,addr=1.0,bus=USB,multifunction=true -device vfio-pci,host=4:0:1.1,addr=1.1,bus=USB -device vfio-pci,host=4:0:1.2,addr=1.2,bus=USB where: * index=7 is a QEMU PHB index (used as source for MMIO/MSI/IO windows offset); * iommu=4 is an IOMMU id which can be found in sysfs: [aik@vpl2 ~]$ cd /sys/bus/pci/devices/0004:00:00.0/ [aik@vpl2 0004:00:00.0]$ ls -l iommu_group lrwxrwxrwx 1 root root 0 Jun 5 12:49 iommu_group -> ../../../kernel/iommu_groups/4 Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexey Kardashevskiy 提交于
While most operations with VFIO IOMMU driver are generic and used inside vfio.c, there are still some operations which only specific VFIO IOMMU drivers implement. The first example of it will be reading a DMA window start from the host. This adds a helper which passes an ioctl request to the container's fd. The helper will check if @req is known. For this, stub is added. This return -1 on any requests for now. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Acked-by: NAlex Williamson <alex.williamson@redhat.com> Acked-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexey Kardashevskiy 提交于
POWER KVM supports an KVM_CAP_SPAPR_TCE capability which allows allocating TCE tables in the host kernel memory and handle H_PUT_TCE requests targeted to specific LIOBN (logical bus number) right in the host without switching to QEMU. At the moment this is used for emulated devices only and the handler only puts TCE to the table. If the in-kernel H_PUT_TCE handler finds a LIOBN and corresponding table, it will put a TCE to the table and complete hypercall execution. The user space will not be notified. Upcoming VFIO support is going to use the same sPAPRTCETable device class so KVM_CAP_SPAPR_TCE is going to be used as well. That means that TCE tables for VFIO are going to be allocated in the host as well. However VFIO operates with real IOMMU tables and simple copying of a TCE to the real hardware TCE table will not work as guest physical to host physical address translation is requited. So until the host kernel gets VFIO support for H_PUT_TCE, we better not to register VFIO's TCE in the host. This adds a place holder for KVM_CAP_SPAPR_TCE_VFIO capability. It is not in upstream yet and being discussed so now it is always false which means that in-kernel VFIO acceleration is not supported. This adds a bool @vfio_accel flag to the sPAPRTCETable device telling that sPAPRTCETable should not try allocating TCE table in the host kernel for VFIO. The flag is false now as at the moment there is no VFIO. This adds an vfio_accel parameter to spapr_tce_new_table(), the semantic is the same. Since there is only emulated PCI and VIO now, the flag is set to false. Upcoming VFIO support will set it to true. This is a preparation patch so no change in behaviour is expected Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexey Kardashevskiy 提交于
At the moment spapr_rtas_register() allocates a new token number for every new RTAS callback so numbers are not fixed and depend on the number of supported RTAS handlers and the exact order of spapr_rtas_register() calls. These tokens are copied into the device tree and remain the same during the guest lifetime. When we start another guest to receive a migration, it calls spapr_rtas_register() as well. If the number of RTAS handlers or their order is different in QEMU on source and destination sides, the "/rtas" node in the device tree will differ. Since migration overwrites the device tree (as it overwrites the entire RAM), the actual RTAS config on the destination side gets broken. This defines global contant values for every RTAS token which QEMU is using today. This changes spapr_rtas_register() to accept a token number instead of allocating one. This changes all users of spapr_rtas_register(). This changes XICS-KVM not to cache tokens registered with KVM as they constant now. This makes TOKEN_BASE global as RTAS_XXX use TOKEN_BASE as a base. TOKEN_MAX is moved and renamed too and its value is changed to the last token + 1. Boundary checks for token values are adjusted. This reserves token numbers for "os-term" handlers and PCI hotplug which we are working on. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Alexander Graf 提交于
The Apple gdbstub protocol is different from the normal gdbstub protocol used on PowerPC. Add support for the different variant, so that we can use Apple's gdb to debug guest code. Keep in mind that the switch is a compile time option. We can't detect during runtime whether a gdb connecting to us is an upstream gdb or an Apple gdb. Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Sorav Bansal 提交于
Fixed bug in gen_mcrxr() in target-ppc/translate.c: The XER[SO], XER[OV], and XER[CA] flags are stored in the least significant bit (bit 0) of their respective registers. They need to be shifted left (by their respective offsets) to generate the final XER value. The old translation code for the 'mcrxr' instruction was assuming that the flags are stored in bit 2, and was shifting them right (incorrectly) Signed-off-by: NSorav Bansal <sbansal@cse.iitd.ernet.in> Reviewed-by: NTom Musta <tommusta@gmail.com> Tested-by: NTom Musta <tommusta@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Avik Sil 提交于
This is required to enable boot menu display during booting Signed-off-by: NAvik Sil <aviksil@linux.vnet.ibm.com> Signed-off-by: NNikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Tom Musta 提交于
Set bits in the AT_HWCAP2 entry of the AUXV. Specifically, detect and set bits for bctar, ISEL and ISA 2.07. Signed-off-by: NTom Musta <tommusta@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Tom Musta 提交于
Add VSX, DFP and ISA 2.06 to the bits identified in the AT_HWCAP entry of the AUXV. Signed-off-by: NTom Musta <tommusta@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Tom Musta 提交于
Decimal Floating Point is emulated, so add it the mask. This will fix the erroneous message: Warning: Disabling some instructions which are not emulated by TCG (0x0, 0x4) Signed-off-by: NTom Musta <tommusta@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Tom Musta 提交于
Set the AT_ICACHEBSIZE and AT_DCACHEBSIZE entries of the AUXV to match the CPU model's cache line sizes. This fixes memory clobbering problems on more recent Book 3s implementations; memset(p, 0, N) will use the dcbz instruction when N is sufficiently large and many of the newer server CPUs have cache lines sizes of 128 bytes. Signed-off-by: NTom Musta <tommusta@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
- 26 6月, 2014 23 次提交
-
-
由 Peter Maydell 提交于
A gcc codegen bug in x86_64-w64-mingw32-gcc (GCC) 4.6.3 means that non-debug builds of QEMU for Windows tend to assert when using coroutines. Work around this by marking qemu_coroutine_switch as noinline. If we allow gcc to inline qemu_coroutine_switch into coroutine_trampoline, then it hoists the code to get the address of the TLS variable "current" out of the while() loop. This is an invalid transformation because the SwitchToFiber() call may be called when running thread A but return in thread B, and so we might be in a different thread context each time round the loop. This can happen quite often. Typically. a coroutine is started when a VCPU thread does bdrv_aio_readv: VCPU thread main VCPU thread coroutine I/O coroutine bdrv_aio_readv -----> start I/O operation thread_pool_submit_co <------------ yields back to emulation Then I/O finishes and the thread-pool.c event notifier triggers in the I/O thread. event_notifier_ready calls thread_pool_co_cb, and the I/O coroutine now restarts *in another thread*: iothread main iothread coroutine I/O coroutine (formerly in VCPU thread) event_notifier_ready thread_pool_co_cb -----> current = I/O coroutine; call AIO callback But on Win32, because of the bug, the "current" being set here the current coroutine of the VCPU thread, not the iothread. noinline is a good-enough workaround, and quite unlikely to break in the future. (Thanks to Paolo Bonzini for assistance in diagnosing the problem and providing the detailed example/ascii art quoted above.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1403535303-14939-1-git-send-email-peter.maydell@linaro.org Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NRichard Henderson <rth@twiddle.net>
-
由 Peter Maydell 提交于
X86CPU * Filter out MONITOR for KVM * Fix filtering for TCG * -cpu foo,check and -cpu foo,enforce support for TCG * -cpu host migration support (-cpu host,migratable=no to disable) * Add invtsc feature support * New model: Broadwell # gpg: Signature made Wed 25 Jun 2014 22:55:04 BST using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" * remotes/afaerber/tags/qom-cpu-for-2.1: target-i386: Broadwell CPU model target-i386: Fix indentation of CPU model definitions target-i386: Support "invariant tsc" flag target-i386: block migration and savevm if invariant tsc is exposed savevm: check vmsd for migratability status target-i386: Set migratable=yes by default on "host" CPU mooel target-i386: Add "migratable" property to "host" CPU model target-i386: Support check/enforce flags in TCG mode, too target-i386: Loop-based feature word filtering in TCG mode target-i386: Loop-based copying and setting/unsetting of feature words target-i386: Define TCG_*_FEATURES earlier in cpu.c target-i386: Filter KVM and 0xC0000001 features on TCG target-i386: Filter FEAT_7_0_EBX TCG features too target-i386: Make TCG feature filtering more readable target-i386: Isolate KVM-specific code on CPU feature filtering logic target-i386: Pass FeatureWord argument to report_unavailable_features() target-i386: Merge feature filtering/checking functions target-i386: Simplify reporting of unavailable features target-i386: kvm: Don't enable MONITOR by default on any CPU model Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Paolo Bonzini 提交于
Otherwise, Windows fails with a deadlock. Reported-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Message-id: 1403679897-11480-1-git-send-email-pbonzini@redhat.com Tested-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Igor Mammedov 提交于
Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Message-id: 1403683241-20678-1-git-send-email-imammedo@redhat.com Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Reviewed-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Eduardo Habkost 提交于
This adds a new CPU model named "Broadwell". It has all the features from Haswell, plus PREFETCHW, RDSEED, ADX, SMAP. PREFETCHW was already supported as "3dnowprefetch". RDSEED, ADX was added on Linux v3.15-rc1. SMAP was added on Linux v3.15-rc2. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Cc: Wang, Yong Y <yong.y.wang@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Dugger, Donald D <donald.d.dugger@intel.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Marcelo Tosatti 提交于
Expose "Invariant TSC" flag, if KVM is enabled. From Intel documentation: 17.13.1 Invariant TSC The time stamp counter in newer processors may support an enhancement, referred to as invariant TSC. Processor’s support for invariant TSC is indicated by CPUID.80000007H:EDX[8]. The invariant TSC will run at a constant rate in all ACPI P-, C-. and T-states. This is the architectural behavior moving forward. On processors with invariant TSC support, the OS may use the TSC for wall clock timer services (instead of ACPI or HPET timers). TSC reads are much more efficient and do not incur the overhead associated with a ring transition or access to a platform resource. Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com> [ehabkost: redo feature filtering to use .tcg_features] [ehabkost: add CPUID_APM_INVTSC macro, add it to .unmigratable_flags] Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Marcelo Tosatti 提交于
Invariant TSC documentation mentions that "invariant TSC will run at a constant rate in all ACPI P-, C-. and T-states". This is not the case if migration to a host with different TSC frequency is allowed, or if savevm is performed. So block migration/savevm. Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NJuan Quintela <quintela@redhat.com> [AF+mtosatti: Updated error message] Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Marcelo Tosatti 提交于
Check vmsd for unmigratable field, allowing migratibility status to be modified after vmstate_register. Cc: Juan Quintela <quintela@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
Having only migratable flags reported by default on the "host" CPU model is safer for the following reasons: * Existing users may expect "-cpu host" to be migration-safe, if they take care of always using compatible host CPUs, host kernels, and QEMU versions. * Users who don't care aboug migration and want to enable all features supported by the host kernel can simply change their setup to use migratable=no. Without this change, people using "-cpu host" will stop being able to migrate, because now "invtsc" is getting enabled by default. We are not setting migratable=yes by default on all X86CPU subclasses, because users should be able to get non-migratable features enabled if they ask for them explicitly. Reviewed-by: NMarcelo Tosatti <mtosatti@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
This flag will allow the user to choose between two modes: * All flags that can be enabled on the host, even if unmigratable (migratable=no); * All flags that can be enabled on the host, are known to QEMU and migratable (migratable=yes). The default is still migratable=false, to keep current behavior, but this will be changed to migratable=true by another patch. My plan was to support the "migratable" flag on all CPU classes, but have the default to "false" on all CPU models except "host". However, DeviceClass has no mechanism to allow a child class to have a different property default from the parent class yet, so by now only the "host" CPU model will support the "migratable" flag. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
If enforce/check is specified in TCG mode, QEMU will ensure all CPU features are supported by TCG, so no CPU feature is silently disabled. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> [AF: Be explicit about TCG vs. !KVM] Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
Instead of manually filtering each feature word, add a tcg_features field to FeatureWordInfo, and use that field to filter all feature words in TCG mode. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
Now that we have the feature word arrays, we don't need to manually copy each array item, we can simply iterate through each feature word. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
Those macros will be used in the feature_word_info array data, so need to be defined earlier. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
TCG doesn't support any of the feature flags on FEAT_KVM and FEAT_C000_0001_EDX feature words, so clear all bits on those feature words. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
The TCG_7_0_EBX_FEATURES macro was defined but never used (it even had a typo that was never noticed). Make the existing TCG feature filtering code use it. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Cc: qemu-stable@nongnu.org Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
Instead of an #ifdef in the middle of the code, just set TCG_EXT2_FEATURES to a different value depending on TARGET_X86_64. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
This will allow us to re-use the feature filtering logic (and the check/enforce flag logic) for TCG. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
This will help us simplify the code that calls report_unavailable_features() later. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
Merge filter_features_for_kvm() and kvm_check_features_against_host(). Both functions made exactly the same calculations, the only difference was that filter_features_for_kvm() changed the bits on cpu->features[], and kvm_check_features_against_host() did error reporting. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
Instead of checking and calling unavailable_host_feature() once for each bit, simply call the function (now renamed to report_unavailable_features()) once for each feature word. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> [AF: Drop unused return value] Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
由 Eduardo Habkost 提交于
KVM never supported the MONITOR flag so it doesn't make sense to have it enabled by default when KVM is enabled. The rationale here is similar to the cases where it makes sense to have a feature enabled by default on all CPU models when on KVM mode (e.g. x2apic). In this case we are having a feature disabled by default for the same reasons. In this case we don't need machine-type compat code because it is currently impossible to run a KVM VM with the MONITOR flag set. Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
- 25 6月, 2014 2 次提交
-
-
由 Peter Maydell 提交于
trivial patches for 2014-06-24 # gpg: Signature made Tue 24 Jun 2014 17:07:31 BST using RSA key ID A4C3D7DB # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 6F67 E18E 7C91 C5B1 5514 66A7 BEE5 9D74 A4C3 D7DB * remotes/mjt/tags/trivial-patches-2014-06-24: Add support for the arm breakpoint syscall Increase maximum number of session of the internal TFTP server. target-s390x: Remove unused ld_code6() function hw/moxie/moxiesim.c: Remove unused moxie_intc_create() target-unicore: Remove unused functions build-sys: introduce install-prog macro to install&strip binaries and use it tcg: mark tcg_out* and tcg_patch* with attribute 'unused' rng-random: NULL check not needed before g_free() block.c: Remove useless 'buf' variable vscclient: Add required headers to fix build on FreeBSD target-ppc: Fix compiler warning configure: Enable TPM by default, add --disable-tpm Fix new typos (found by codespell) virtio-serial: remove useless set_config function Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Hunter Laux 提交于
OABI arm used a software interrupt(0xef9f0001) for breakpoints. Since 2005 gdb has used the break instruction(0xe7f001f0) for EABI. Apparently Steel Bank Common Lisp still uses the swi instruction. This is the kernel implementation: http://lxr.free-electrons.com/source/arch/arm/kernel/traps.c#L598Signed-off-by: NHunter Laux <hunterlaux@gmail.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
-