1. 18 5月, 2013 1 次提交
  2. 27 4月, 2013 2 次提交
    • D
      pseries: Fixes and enhancements to L1 cache properties · 0cbad81f
      David Gibson 提交于
      PAPR requires that the device tree's CPU nodes have several properties
      with information about the L1 cache.  We already create two of these
      properties, but with incorrect names - "[id]cache-block-size" instead
      of "[id]-cache-block-size" (note the extra hyphen).
      
      We were also missing some of the required cache properties.  This
      patch adds the [id]-cache-line-size properties (which have the same
      values as the block size properties in all current cases).  We also
      add the [id]-cache-size properties.
      
      Adding the cache sizes requires some extra infrastructure in the
      general target-ppc code to (optionally) set the cache sizes for
      various CPUs.  The CPU family descriptions in translate_init.c can set
      these sizes - this patch adds correct information for POWER7, I'm
      leaving other CPU types to people who have a physical example to
      verify against.  In addition, for -cpu host we take the values
      advertised by the host (if available) and use those to override the
      information based on PVR.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      0cbad81f
    • F
      PPC: Remove env->hreset_excp_prefix · 2cf3eb6d
      Fabien Chouteau 提交于
      This value is not needed if we use correctly the MSR[IP] bit.
      
      excp_prefix is always 0x00000000, except when the MSR[IP] bit is
      implemented and set to 1, in that case excp_prefix is 0xfff00000.
      
      The handling of MSR[IP] was already implemented but not used at reset
      because the value of env->msr was changed "manually".
      
      The patch uses the function hreg_store_msr() to set env->msr, this
      ensures a good handling of MSR[IP] at reset, and therefore a good value
      for excp_prefix.
      Signed-off-by: NFabien Chouteau <chouteau@adacore.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      2cf3eb6d
  3. 09 4月, 2013 1 次提交
    • P
      hw: move headers to include/ · 0d09e41a
      Paolo Bonzini 提交于
      Many of these should be cleaned up with proper qdev-/QOM-ification.
      Right now there are many catch-all headers in include/hw/ARCH depending
      on cpu.h, and this makes it necessary to compile these files per-target.
      However, fixing this does not belong in these patches.
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      0d09e41a
  4. 22 3月, 2013 3 次提交
  5. 12 3月, 2013 1 次提交
  6. 01 3月, 2013 2 次提交
  7. 26 1月, 2013 1 次提交
    • D
      pseries: Improve handling of multiple PCI host bridges · caae58cb
      David Gibson 提交于
      Multiple - even many - PCI host bridges (i.e. PCI domains) are very
      common on real PAPR compliant hardware.  For reasons related to the
      PAPR specified IOMMU interfaces, PCI device assignment with VFIO will
      generally require at least two (virtual) PHBs and possibly more
      depending on which devices are assigned.
      
      At the moment the qemu PAPR PCI code will not deal with this well,
      leaving several crucial parameters of PHBs other than the default one
      uninitialized.  This patch reworks the code to allow this.
      
      Every PHB needs a unique BUID (Bus Unit Identifier, the id used for
      the PAPR PCI related interfaces) and a unique LIOBN (Logical IO Bus
      Number, the id used for the PAPR IOMMU related interfaces).  In
      addition they need windows in CPU real address space to access PCI
      memory space, PCI IO space and MSIs.  Properties are added to the PCI
      host bridge qdevice to allow configuration of all these.
      
      To simplify configuration of multiple PHBs for common cases, a
      convenience "index" property is also added.  This can be set instead
      of the low-level properties, and will generate suitable values for the
      other parameters, different for each index value.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      caae58cb
  8. 17 1月, 2013 1 次提交
  9. 16 1月, 2013 2 次提交
  10. 15 1月, 2013 2 次提交
  11. 19 12月, 2012 6 次提交
  12. 17 12月, 2012 1 次提交
  13. 14 12月, 2012 2 次提交
  14. 11 12月, 2012 1 次提交
    • C
      Support default block interfaces per QEMUMachine · 2d0d2837
      Christian Borntraeger 提交于
      There are QEMUMachines that have neither IF_IDE nor IF_SCSI as a
      default/standard interface to their block devices / drives. Therefore,
      this patch introduces a new field default_block_type per QEMUMachine
      struct. The prior use_scsi field becomes thereby obsolete and is
      replaced through .default_block_type = IF_SCSI.
      
      This patch also changes the default for s390x to IF_VIRTIO and
      removes an early hack that converts IF_IDE drives.
      Other parties have already claimed interest (e.g. IF_SD for exynos)
      
      To create a sane default, for machines that dont specify a
      default_block_type, this patch makes IF_IDE = 0 and IF_NONE = 1.
      I checked all users of IF_NONE (blockdev.c and ww/device-hotplug.c)
      as well as IF_IDE and it seems that it is ok to change the defines -
      in other words, I found no obvious (to me) assumption in the code
      regarding IF_NONE==0. IF_NONE is only set if there is an
      explicit if=none. Without if=* the interface becomes IF_DEFAULT.
      
      I would suggest to have some additional care, e.g. by letting
      this patch sit some days in the block tree.
      
      Based on an initial patch from Einar Lueck <elelueck@de.ibm.com>
      Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
      CC: Igor Mitsyanko <i.mitsyanko@samsung.com>
      CC: Markus Armbruster <armbru@redhat.com>
      CC: Kevin Wolf <kwolf@redhat.com>
      Reviewed-by: NAlexander Graf <agraf@suse.de>
      Acked-by: NIgor Mitsyanko <i.mitsyanko@samsung.com>
      Reviewed-by: NMarkus Armbruster <armbru@redhat.com>
      Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
      2d0d2837
  15. 31 10月, 2012 2 次提交
  16. 29 10月, 2012 2 次提交
    • D
      pseries: Implement qemu initiated shutdowns using EPOW events · 74d042e5
      David Gibson 提交于
      At present, using 'system_powerdown' from the monitor or otherwise
      instructing qemu to (cleanly) shut down a pseries guest will not work,
      because we did not have a method of signalling the shutdown request to the
      guest.
      
      PAPR does include a usable mechanism for this, though it is rather more
      involved than the equivalent on x86.  This involves sending an EPOW
      (Environmental and POwer Warning) event through the PAPR event and error
      logging mechanism, which also has a number of other functions.
      
      This patch implements just enough of the event/error logging functionality
      to be able to send a shutdown event to the guest.  At least with modern
      guest kernels and a userspace that is up and running, this means that
      system_powerdown from the qemu monitor should now work correctly on pseries
      guests.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      74d042e5
    • Z
      Add USB option in machine options · 094b287f
      zhlcindy@gmail.com 提交于
      When -usb option is used, global varible usb_enabled is set.
      And all the plaform will create one USB controller according
      to this variable. In fact, global varibles make code hard
      to read.
      
      So this patch is to remove global variable usb_enabled and
      add USB option in machine options. All the plaforms will get
      USB option value from machine options.
      
      USB option of machine options will be set either by:
        * -usb
        * -machine type=pseries,usb=on
      
      Both these ways can work now. They both set USB option in
      machine options. In the future, the first way will be removed.
      Signed-off-by: NLi Zhang <zhlcindy@linux.vnet.ibm.com>
      Acked-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      094b287f
  17. 23 10月, 2012 1 次提交
    • A
      Rename target_phys_addr_t to hwaddr · a8170e5e
      Avi Kivity 提交于
      target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
      reserved) and its purpose doesn't match the name (most target_phys_addr_t
      addresses are not target specific).  Replace it with a finger-friendly,
      standards conformant hwaddr.
      
      Outstanding patchsets can be fixed up with the command
      
        git rebase -i --exec 'find -name "*.[ch]"
                              | xargs s/target_phys_addr_t/hwaddr/g' origin
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      a8170e5e
  18. 20 10月, 2012 1 次提交
    • E
      create struct for machine initialization arguments · 5f072e1f
      Eduardo Habkost 提交于
      This should help us to:
      - More easily add or remove machine initialization arguments without
        having to change every single machine init function;
      - More easily make mechanical changes involving the machine init
        functions in the future;
      - Let machine initialization forward the init arguments to other
        functions more easily.
      
      This change was half-mechanical process: first the struct was added with
      the local ram_size, boot_device, kernel_*, initrd_*, and cpu_model local
      variable initialization to all functions. Then the compiler helped me
      locate the local variables that are unused, so they could be removed.
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      5f072e1f
  19. 07 10月, 2012 2 次提交
  20. 05 10月, 2012 1 次提交
    • D
      pseries: Don't test for MSR_PR for hypercalls under KVM · efcb9383
      David Gibson 提交于
      PAPR hypercalls should only be invoked from the guest kernel, not guest
      user programs, that is, with MSR[PR]=0.  Currently we check this in
      spapr_hypercall, returning H_PRIVILEGE if MSR[PR]=1.
      
      However, under KVM the state of MSR[PR] is already checked by the host
      kernel before passing the hypercall to qemu, making this check redundant.
      Worse, however, we don't generally synchronize KVM and qemu state on the
      hypercall path, meaning that qemu could incorrectly reject a hypercall
      because it has a stale MSR value.
      
      This patch fixes the problem by moving the privilege test exclusively to
      the TCG hypercall path.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      CC: qemu-stable@nongnu.org
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      efcb9383
  21. 04 10月, 2012 5 次提交
    • D
      pseries: Set hash table size based on RAM size · 382be75d
      David Gibson 提交于
      Currently the pseries machine code always attempts to set the size of the
      guests's hash page table to 16MB.  However, because of the way the POWER
      MMU works, a suitable hash page table size should really depend on memory
      size.  16MB will be excessive for guests with <1GB and RAM, and may not be
      enough for guests with >2GB of RAM (depending on guest page size and
      other factors).
      
      The usual given rule of thumb is that the hash table should be 1/64 of
      the size of memory, but in fact the Linux guests we are aiming at don't
      really need that much.  This patch, therefore, changes the hash table
      allocation code to aim for 1/128 of the size of RAM (rounding up).  When
      using KVM, this size may still be adjusted by the host kernel if it is
      unable to allocate a suitable (contiguous) table.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      382be75d
    • D
      pseries: Remove XICS irq type enum type · ff9d2afa
      David Gibson 提交于
      Currently the XICS interrupt controller emulation uses a custom enum to
      specify whether a given interrupt is level-sensitive or message-triggered.
      This enum makes life awkward for saving the state, and isn't particularly
      useful since there are only two possibilities.  This patch replaces the
      enum with a simple bool.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      ff9d2afa
    • D
      pseries: Add support for new KVM hash table control call · 7f763a5d
      David Gibson 提交于
      This adds support for then new "reset htab" ioctl which allows qemu
      to properly cleanup the MMU hash table when the guest is reset. With
      the corresponding kernel support, reset of a guest now works properly.
      
      This also paves the way for indicating a different size hash table
      to the kernel and for the kernel to be able to impose limits on
      the requested size.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      7f763a5d
    • D
      pseries: Use new method to correct reset sequence · c8787ad4
      David Gibson 提交于
      A number of things need to occur during reset of the PAPR
      paravirtualized platform in a specific order.  For example, the hash
      table needs to be cleared before the CPUs are reset, so that they
      initialize their register state correctly, and the CPUs need to have
      their main reset called before we set up the entry point state on the
      boot cpu.  We also need to have the main qdev reset happen before the
      creation and installation of the device tree for the new boot, because
      we need the state of the devices settled to correctly construct the
      device tree.
      
      We currently do the pseries once-per-reset initializations done from a
      reset handler.  However we can't adequately control when this handler
      is called during the reset - in particular we can't guarantee it
      happens after all the qdev resets (since qdevs might be registered
      after the machine init function has executed).
      
      This patch uses the new QEMUMachine reset method to to fix this
      problem, ensuring the various order dependent reset steps happen in
      the correct order.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NAndreas Färber <afaerber@suse.de>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      c8787ad4
    • D
      pseries: Fix and cleanup CPU initialization and reset · 048706d9
      David Gibson 提交于
      The current pseries machine init function iterates over the CPUs at several
      points, doing various bits of initialization.  This is messy; these can
      and should be merged into a single iteration doing all the necessary per
      cpu initialization.  Worse, some of these initializations were setting up
      state which should be set on every reset, not just at machine init time.
      A few of the initializations simply weren't necessary at all.
      
      This patch, therefore, moves those things that need to be to the
      per-cpu reset handler, and combines the remainder into two loops over
      the cpus (which also creates them).  The second loop is for setting up
      hash table information, and will be removed in a subsequent patch also
      making other fixes to the hash table setup.
      
      This exposes a bug in our start-cpu RTAS routine (called by the guest to
      start up CPUs other than CPU0) under kvm.  Previously, this function did
      not make a call to ensure that it's changes to the new cpu's state were
      pushed into KVM in-kernel state.  We sort-of got away with this because
      some of the initializations had already placed the secondary CPUs into the
      right starting state for the sorts of Linux guests we've been running.
      
      Nonetheless the start-cpu RTAS call's behaviour was not correct and could
      easily have been broken by guest changes.  This patch also fixes it.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NAndreas Färber <afaerber@suse.de>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      048706d9