- 12 6月, 2015 40 次提交
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由 Peter Maydell 提交于
sh4 linux-user cpu and hwcap misc optimizations and cleanup convert r2d to new MMIO accessor style # gpg: Signature made Fri Jun 12 11:28:43 2015 BST using RSA key ID 1DDD8C9B # gpg: Good signature from "Aurelien Jarno <aurelien@aurel32.net>" # gpg: aka "Aurelien Jarno <aurelien@jarno.fr>" # gpg: aka "Aurelien Jarno <aurel32@debian.org>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 7746 2642 A9EF 94FD 0F77 196D BA9C 7806 1DDD 8C9B * remotes/aurel/tags/pull-sh4-next-20150612: target-sh4: remove dead code target-sh4: factorize fmov implementation target-sh4: split out Q and M from of SR and optimize div1 target-sh4: optimize negc using add2 and sub2 target-sh4: optimize subc using sub2 target-sh4: optimize addc using add2 target-sh4: Split out T from SR target-sh4: use bit number for SR constants sh4/r2d: convert to new MMIO accessor style linux-user: Add HWCAP for SH4 linux-user: Default sh4 to sh7785 Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
MIPS patches 2015-06-12 Changes: * improve dp8393x network card and rc4030 chipset emulation * support misaligned R6 and MSA memory accesses * support MIPS eXtended and Large Physical Addressing * add Config5.FRE bit and ERETNC instruction (Config5.LLB) * support ememsize on MALTA # gpg: Signature made Fri Jun 12 09:38:11 2015 BST using RSA key ID 0B29DA6B # gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8DD3 2F98 5495 9D66 35D4 4FC0 5211 8E3C 0B29 DA6B * remotes/lalrae/tags/mips-20150612: (29 commits) target-mips: enable XPA and LPA features target-mips: remove misleading comments in translate_init.c target-mips: add MTHC0 and MFHC0 instructions target-mips: add CP0.PageGrain.ELPA support target-mips: support Page Frame Number Extension field target-mips: extend selected CP0 registers to 64-bits in MIPS32 target-mips: correct MFC0 for CP0.EntryLo in MIPS64 net/dp8393x: fix hardware reset net/dp8393x: correctly reset in_use field net/dp8393x: add load/save support net/dp8393x: add PROM to store MAC address net/dp8393x: QOM'ify net/dp8393x: use dp8393x_ prefix for all functions net/dp8393x: do not use old_mmio accesses net/dp8393x: always calculate proper checksums dma/rc4030: convert to QOM dma/rc4030: use trace events instead of custom logging dma/rc4030: document register at offset 0x210 dma/rc4030: do not use old_mmio accesses dma/rc4030: use AddressSpace and address_space_rw in users ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
migration/next for 20150612 # gpg: Signature made Fri Jun 12 05:56:21 2015 BST using RSA key ID 5872D723 # gpg: Good signature from "Juan Quintela <quintela@redhat.com>" # gpg: aka "Juan Quintela <quintela@trasno.org>" * remotes/juanquintela/tags/migration/20150612: (21 commits) Remove unneeded memset Rename RDMA structures to make destination clear Teach analyze-migration.py about section footers Add a protective section footer Disable section footers on older machine types Merge section header writing Move loadvm_handlers into MigrationIncomingState Move copy out of qemu_peek_buffer Create MigrationIncomingState qemu_ram_foreach_block: pass up error value, and down the ramblock name Split header writing out of qemu_savevm_state_begin Add qemu_get_counted_string to read a string prefixed by a count byte migration: Use normal VMStateDescriptions for Subsections migration: create savevm_state migration: Remove duplicated assignment of SETUP status rdma: Fix qemu crash when IPv6 address is used for migration arch_init: Clean up the duplicate variable 'len' defining in ram_load() migration: reduce include files migration: Add myself to the copyright list of both files migration: move savevm.c inside migration/ ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Aurelien Jarno 提交于
Splitting Q and M out of SR, it's possible to optimize div1 by using TCG code instead of an helper. At the same time removed the now unused gen_copy_bit_i32 function. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Aurelien Jarno 提交于
In preparation for more efficient setting of this field. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Aurelien Jarno 提交于
Use the bit number for SR constants instead of using a bit mask. This make possible to also use the constants for shifts. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Aurelien Jarno 提交于
The documentation is clear to use 16-bit accesses for all registers. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
Only exposing FPU and LLSC as the only features supported by the translator. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Leon Alrae 提交于
Enable XPA in MIPS32R5-generic and LPA in MIPS64R6-generic. Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Leon Alrae 提交于
PABITS are not hardcoded to 36 bits and we do not model 59 PABITS (which is the architectural limit) in QEMU. Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Leon Alrae 提交于
Implement MTHC0 and MFHC0 instructions. In MIPS32 they are used to access upper word of extended to 64-bits CP0 registers. In MIPS64, when CP0 destination register specified is the EntryLo0 or EntryLo1, bits 1:0 of the GPR appear at bits 31:30 of EntryLo0 or EntryLo1. This is to compensate for RI and XI, which were shifted to bits 63:62 by MTC0 to EntryLo0 or EntryLo1. Therefore creating separate functions for EntryLo0 and EntryLo1. Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Leon Alrae 提交于
CP0.PageGrain.ELPA enables support for large physical addresses. This field is encoded as follows: 0: Large physical address support is disabled. 1: Large physical address support is enabled. If this bit is a 1, the following changes occur to coprocessor 0 registers: - The PFNX field of the EntryLo0 and EntryLo1 registers is writable and concatenated with the PFN field to form the full page frame number. - Access to optional COP0 registers with PA extension, LLAddr, TagLo is defined. P5600 can operate in 32-bit or 40-bit Physical Address Mode. Therefore if XPA is disabled (CP0.PageGrain.ELPA = 0) then assume 32-bit Address Mode. In MIPS64 assume 36 as default PABITS (when CP0.PageGrain.ELPA = 0). env->PABITS value is constant and indicates maximum PABITS available on a core, whereas env->PAMask is calculated from env->PABITS and is also affected by CP0.PageGrain.ELPA. Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Leon Alrae 提交于
Update tlb->PFN to contain PFN concatenated with PFNX. PFNX is 0 if large physical address is not supported. Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Leon Alrae 提交于
Extend EntryLo0, EntryLo1, LLAddr and TagLo from 32 to 64 bits in MIPS32. Introduce gen_move_low32() function which moves low 32 bits from 64-bit temp to GPR; it sign extends 32-bit value on MIPS64 and truncates on MIPS32. Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Leon Alrae 提交于
CP0.EntryLo bits 31:30 have to be cleared. Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Dr. David Alan Gilbert 提交于
Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NMichael R. Hines <mrhines@us.ibm.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
RDMA has two data types that are named confusingly; RDMALocalBlock (pointed to indirectly by local_ram_blocks) RDMARemoteBlock (pointed to by block in RDMAContext) RDMALocalBlocks, as the name suggests is a data strucuture that represents the RDMAable RAM Blocks on the current side of the migration whichever that is. RDMARemoteBlocks is always the shape of the RAMBlocks on the destination, even on the destination. Rename: RDMARemoteBlock -> RDMADestBlock context->'block' -> context->dest_blocks Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NMichael R. Hines <mrhines@us.ibm.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
Badly formatted migration streams can go undetected or produce misleading errors due to a lock of checking at the end of sections. In particular a section that adds an extra 0x00 at the end causes what looks like a normal end of stream and thus doesn't produce any errors, and something that ends in a 0x01..0x04 kind of look like real section headers and then fail when the section parser tries to figure out which section they are. This is made worse by the choice of 0x00..0x04 being small numbers that are particularly common in normal section data. This patch adds a section footer consisting of a marker (0x7e - ~) followed by the section-id that was also sent in the header. If they mismatch then it throws an error explaining which section was being loaded. Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
The next patch adds section footers; but we don't want to break migration compatibility so disable them on older machine types Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
The header writing for device sections is open coded in a few places, merge it into one. Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
In postcopy we need the loadvm_handlers to be used in a couple of different instances of the loadvm loop/routine, and thus it can't be local any more. Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
qemu_peek_buffer currently copies the data it reads into a buffer, however a future patch wants access to the buffer without the copy, hence rework to remove the copy to the layer above. Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NAmit Shah <amit.shah@redhat.com> Reviewed-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
There are currently lots of pieces of incoming migration state scattered around, and postcopy is adding more, and it seems better to try and keep it together. allocate MIS in process_incoming_migration_co Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NAmit Shah <amit.shah@redhat.com> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
check the return value of the function it calls and error if it's non-0 Fixup qemu_rdma_init_one_block that is the only current caller, and rdma_add_block the only function it calls using it. Pass the name of the ramblock to the function; helps in debugging. Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NAmit Shah <amit.shah@redhat.com> Reviewed-by: NMichael R. Hines <mrhines@us.ibm.com> Reviewed-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
Split qemu_savevm_state_begin to: qemu_savevm_state_header That writes the initial file header. qemu_savevm_state_begin That sets up devices and does the first device pass. Used later in postcopy. Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NAmit Shah <amit.shah@redhat.com> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Dr. David Alan Gilbert 提交于
and use it in loadvm_state and ram_load. Where ever it's used, check the return and error if it failed. Minor: ram_load was using a 257 byte array for its string, the maximum length is 255 bytes + 0 terminator, so fix to 256 Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NAmit Shah <amit.shah@redhat.com> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Juan Quintela 提交于
We create optional sections with this patch. But we already have optional subsections. Instead of having two mechanism that do the same, we can just generalize it. For subsections we just change: - Add a needed function to VMStateDescription - Remove VMStateSubsection (after removal of the needed function it is just a VMStateDescription) - Adjust the whole tree, moving the needed function to the corresponding VMStateDescription Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Juan Quintela 提交于
This way, we will put savevm global state here, instead of lots of variables. Signed-off-by: NJuan Quintela <quintela@redhat.com> Reviewed-by: NDr. David Alan Gilbert <dgilbert@redhat.com>
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由 Juan Quintela 提交于
We assign the MIGRATION_STATUS_SETUP status in two places. Just in succession. Just remove the second one. Signed-off-by: NJuan Quintela <quintela@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com>
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由 Padmanabh Ratnakar 提交于
Qemu crashes when IPv6 address is specified for migration and access to any RDMA uverbs device available on the system is blocked using cgroups. Fix the crash by checking the return value of ibv_open_device routine. Signed-off-by: NMeghana Cheripady <meghana.cheripady@avagotech.com> Signed-off-by: NPadmanabh Ratnakar <padmanabh.ratnakar@avagotech.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 zhanghailiang 提交于
There are two places that define 'len' variable, It's OK for compiling, but makes it difficult for reading. Remove the local one which defined in the inside 'while' loop. Signed-off-by: Nzhanghailiang <zhang.zhanghailiang@huawei.com> Signed-off-by: NJuan Quintela <quintela@redhat.com>
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由 Juan Quintela 提交于
To make changes easier, with the copy, I maintained almost all include files. Now I remove the unnecessary ones on this patch. This compiles on linux x64 with all architectures configured, and cross-compiles for windows 32 and 64 bits. Signed-off-by: NJuan Quintela <quintela@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com>
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由 Juan Quintela 提交于
If anyone feels like adding himself to the list, just sent me a patch. Signed-off-by: NJuan Quintela <quintela@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com>
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