- 12 1月, 2015 1 次提交
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由 Frank Blaschka 提交于
on s390 MSI-X irqs are presented as thin or adapter interrupts for this we have to reorganize the routing entry to contain valid information for the adapter interrupt code on s390. To minimize impact on existing code we introduce an architecture function to fixup the routing entry. Signed-off-by: NFrank Blaschka <frank.blaschka@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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- 07 1月, 2015 1 次提交
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由 Cédric Le Goater 提交于
Currently, when the page tables are saved, the kvm_get_htab_header structs and the ptes are assumed being big endian and dumped as a indistinct blob in the statefile. This is no longer true when the host is little endian and this breaks restoration. This patch unfolds the kvmppc_save_htab routine to write explicitly the kvm_get_htab_header structs in big endian. The ptes are left untouched. Signed-off-by: NCédric Le Goater <clg@fr.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 05 11月, 2014 1 次提交
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由 Chen Gang 提交于
strncat() will append additional '\0' to destination buffer, so need additional 1 byte for it, or may cause memory overflow, just like other area within QEMU have done. And can use g_strdup_printf() instead of strncat(), which may be more easier understanding. Signed-off-by: NChen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 08 9月, 2014 6 次提交
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由 Alexander Graf 提交于
To find out whether we support the KVM hypercall interface we need to ask KVM on the VM level rather than the global KVM level, because Book3S HV KVM does not support it and we play conservative when both HV and PR are loaded. So instead, use the VM helper that falls back to global KVM enumeration. That should cover all cases. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Bharat Bhushan 提交于
This patch adds hardware breakpoint and hardware watchpoint support for ppc. On BOOKE architecture we cannot share debug resources between QEMU and guest because: When QEMU is using debug resources then debug exception must be always enabled. To achieve this we set MSR_DE and also set MSRP_DEP so guest cannot change MSR_DE. When emulating debug resource for guest we want guest to control MSR_DE (enable/disable debug interrupt on need). So above mentioned two configuration cannot be supported at the same time. So the result is that we cannot share debug resources between QEMU and Guest on BOOKE architecture. In the current design QEMU gets priority over guest, this means that if QEMU is using debug resources then guest cannot use them and if guest is using debug resource then qemu can overwrite them. When QEMU is not able to handle debug exception then we inject program exception to guest. Yes program exception NOT debug exception and the reason is: 1) QEMU and guest not sharing debug resources 2) For software breakpoint QEMU uses a ehpriv-1 instruction; So there cannot be any reason that we are in qemu with exit reason KVM_EXIT_DEBUG for guest set debug exception, only possibility is guest executed ehpriv-1 privilege instruction and that's why we are injecting program exception. Signed-off-by: NBharat Bhushan <Bharat.Bhushan@freescale.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Bharat Bhushan 提交于
This patch allow insert/remove software breakpoint. When QEMU is not able to handle debug exception then we inject program exception to guest because for software breakpoint QEMU uses a ehpriv-1 instruction; So there cannot be any reason that we are in qemu with exit reason KVM_EXIT_DEBUG for guest set debug exception, only possibility is guest executed ehpriv-1 privilege instruction and that's why we are injecting program exception. Signed-off-by: NBharat Bhushan <Bharat.Bhushan@freescale.com> [agraf: make deflect comment booke/book3s agnostic] Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Bharat Bhushan 提交于
This patch synchronizes env->excp_vectors[] with env->iovr[]. This is required for using the existing interrupt injection mechanism for kvm. Signed-off-by: NBharat Bhushan <Bharat.Bhushan@freescale.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Bharat Bhushan 提交于
Get trap instruction opcode from KVM and this opcode will be used for setting software breakpoint in following patch Signed-off-by: NBharat Bhushan <Bharat.Bhushan@freescale.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Nikunj A Dadhania 提交于
Useful for identifying the guest/host uniquely within the guest. Adding following properties to the guest root node. vm,uuid - uuid of the guest host-model - Host model number host-serial - Host machine serial number hypervisor type - Tells its "kvm" Signed-off-by: NNikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 15 7月, 2014 1 次提交
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由 Alexey Kardashevskiy 提交于
PPC970 does not support VRMA (virtual RMA) so real memory required for SLOF to execute must be allocated by the KVM_ALLOCATE_RMA ioctl. Later this memory is used as a part of the guest RAM area. The RMA allocating code also registers a memory region for this piece of RAM. We are going to simplify memory regions layout: RMA memory region will be a subregion in the RAM memory region, both starting from zero. This way we will not have to take care of start address alignment for the piece of RAM next to the RMA. This moves memory region business closer to the RAM memory region creation/allocation code. As this is a mechanical patch, no change in behaviour is expected. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> [agraf: fix compilation on non-kvm systems] Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 27 6月, 2014 1 次提交
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由 Alexey Kardashevskiy 提交于
POWER KVM supports an KVM_CAP_SPAPR_TCE capability which allows allocating TCE tables in the host kernel memory and handle H_PUT_TCE requests targeted to specific LIOBN (logical bus number) right in the host without switching to QEMU. At the moment this is used for emulated devices only and the handler only puts TCE to the table. If the in-kernel H_PUT_TCE handler finds a LIOBN and corresponding table, it will put a TCE to the table and complete hypercall execution. The user space will not be notified. Upcoming VFIO support is going to use the same sPAPRTCETable device class so KVM_CAP_SPAPR_TCE is going to be used as well. That means that TCE tables for VFIO are going to be allocated in the host as well. However VFIO operates with real IOMMU tables and simple copying of a TCE to the real hardware TCE table will not work as guest physical to host physical address translation is requited. So until the host kernel gets VFIO support for H_PUT_TCE, we better not to register VFIO's TCE in the host. This adds a place holder for KVM_CAP_SPAPR_TCE_VFIO capability. It is not in upstream yet and being discussed so now it is always false which means that in-kernel VFIO acceleration is not supported. This adds a bool @vfio_accel flag to the sPAPRTCETable device telling that sPAPRTCETable should not try allocating TCE table in the host kernel for VFIO. The flag is false now as at the moment there is no VFIO. This adds an vfio_accel parameter to spapr_tce_new_table(), the semantic is the same. Since there is only emulated PCI and VIO now, the flag is set to false. Upcoming VFIO support will set it to true. This is a preparation patch so no change in behaviour is expected Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 16 6月, 2014 9 次提交
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由 Alexander Graf 提交于
There were a few revisions of the Linux kernel that incorrectly swapped the hcall instructions when they saw ePAPR compliant hypercalls. We already have fixups for those in place when running with PR KVM, but HV KVM and systems that don't implement hypercalls at all are still broken because they fall back to the QEMU implementation of fallback hypercalls. So let's make the fallback hypercall instruction path endian agnostic. This only really works well for 64bit guests, but I don't think there are any 32bit systems left that don't implement real pv hcall support, so we'll never get into this code path. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexey Kardashevskiy 提交于
This adds migration support for registers saved before Transactional Memory (TM) transaction started. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: NTom Musta <tommusta@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
New kvm versions expose a PPC_FIXUP_HCALL capability. Make it visible to machine code so we can take decisions based on it. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexey Kardashevskiy 提交于
This removes window_size as it is basically a copy of nb_table shifted by SPAPR_TCE_PAGE_SHIFT. As new dynamic DMA windows are going to support windows as big as the entire RAM and this number will be bigger that 32 capacity, we will have to do something about @window_size anyway and removal seems to be the right way to go. This removes dma_window_start/dma_window_size from sPAPRPHBState as they are no longer used. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexey Kardashevskiy 提交于
Currently only single TCE entry per request is supported (H_PUT_TCE). However PAPR+ specification allows multiple entry requests such as H_PUT_TCE_INDIRECT and H_STUFF_TCE. Having less transitions to the host kernel via ioctls, support of these calls can accelerate IOMMU operations. This implements H_STUFF_TCE and H_PUT_TCE_INDIRECT. This advertises "multi-tce" capability to the guest if the host kernel supports it (KVM_CAP_SPAPR_MULTITCE) or guest is running in TCG mode. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexey Kardashevskiy 提交于
The host kernel implements a KVM_REG_PPC_ARCH_COMPAT register which this uses to enable a compatibility mode if any chosen. This sets the KVM_REG_PPC_ARCH_COMPAT register in KVM. ppc_set_compat() signals the caller if the mode cannot be enabled by the host kernel. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> [agraf: fix TCG compat setting] Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexey Kardashevskiy 提交于
This allows guests to have a different timebase origin from the host. This is needed for migration, where a guest can migrate from one host to another and the two hosts might have a different timebase origin. However, the timebase seen by the guest must not go backwards, and should go forwards only by a small amount corresponding to the time taken for the migration. This is only supported for recent POWER hardware which has the TBU40 (timebase upper 40 bits) register. That includes POWER6, 7, 8 but not 970. This adds kvm_access_one_reg() to access a special register which is not in env->spr. This requires kvm_set_one_reg/kvm_get_one_reg patch. The feature must be present in the host kernel. This bumps vmstate_spapr::version_id and enables new vmstate_ppc_timebase only for it. Since the vmstate_spapr::minimum_version_id remains unchanged, migration from older QEMU is supported but without vmstate_ppc_timebase. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
When we select a CPU type that does not support 1TB segments, we should not expose 1TB just because KVM supports 1TB segments. User configuration always wins over feature availability. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexey Kardashevskiy 提交于
At the moment generic version-less CPUs are supported via hardcoded aliases. For example, POWER7 is an alias for POWER7_v2.1. So when QEMU is started with -cpu POWER7, the POWER7_v2.1 class instance is created. This approach works for TCG and KVMs other than HV KVM. HV KVM cannot emulate PVR value so the guest always sees the real PVR. HV KVM will not allow setting PVR other that the host PVR because of that (the kernel patch for it is on its way). So in most cases it is impossible to run QEMU with -cpu POWER7 unless the host PVR is exactly the same as the one from the alias (which is now POWER7_v2.3). It was decided that under HV KVM QEMU should use -cpu host. Using "host" CPU type creates a problem for management tools such as libvirt because they want to know in advance if the destination guest can possibly run on the destination. Since the "host" type is really not a type and will always work with any KVM, there is no way for libvirt to know if the migration will success. This registers additional CPU class derived from the host CPU family. The name for it is taken from @desc field of the CPU family class. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 13 5月, 2014 1 次提交
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由 Paolo Bonzini 提交于
Now that we have a CPU object with a reset method, it is better to keep the KVM reset close to the CPU reset. Using qemu_register_reset as we do now keeps them far apart. With this patch, PPC no longer calls the kvm_arch_ function, so it can get removed there. Other arches call it from their CPU reset handler, and the function gets an ARMCPU/X86CPU/S390CPU. Note that ARM- and s390-specific functions are called kvm_arm_* and kvm_s390_*, while x86-specific functions are called kvm_arch_*. That follows the convention used by the different architectures. Changing that is the topic of a separate patch. Reviewed-by: NGleb Natapov <gnatapov@redhat.com> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 30 4月, 2014 1 次提交
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由 Cornelia Huck 提交于
Convert existing users of KVM_ENABLE_CAP to new helper. Reviewed-by: NThomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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- 14 3月, 2014 2 次提交
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 05 3月, 2014 7 次提交
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由 Alexey Kardashevskiy 提交于
This makes use of @cpu_dt_id and related API in: 1. emulated XICS hypercall handlers as they receive fixed CPU indexes; 2. XICS-KVM to enable in-kernel XICS on right CPU; 3. device-tree renderer. This removes @cpu_index fixup as @cpu_dt_id is used instead so QEMU monitor can accept command-line CPU indexes again. This changes kvm_arch_vcpu_id() to use ppc_get_vcpu_dt_id() as at the moment KVM CPU id and device tree ID are calculated using the same algorithm. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Acked-by: NMike Day <ncmike@ncultra.org> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexey Kardashevskiy 提交于
Normally CPUState::cpu_index is used to pick the right CPU for various operations. However default consecutive numbering does not always work for POWERPC. These indexes are reflected in /proc/device-tree/cpus/PowerPC,POWER7@XX and used to call KVM VCPU's ioctls. In order to achieve this, kvmppc_fixup_cpu() was introduced. Roughly speaking, it multiplies cpu_index by the number of threads per core. This approach has disadvantages such as: 1. NUMA configuration stays broken after the fixup; 2. CPU-targeted commands from the QEMU Monitor do not work properly as CPU indexes have been fixed and there is no clear way for the user to know what the new CPU indexes are. This introduces a @cpu_dt_id field in the CPUPPCState struct which is initialized from @cpu_index by default and can be fixed later to meet the device tree requirements. This adds an API to handle @cpu_dt_id. This removes kvmppc_fixup_cpu() as it is not more needed, @cpu_dt_id is calculated in ppc_cpu_realize(). This will be used later in machine code. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Acked-by: NMike Day <ncmike@ncultra.org> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Aneesh Kumar K.V 提交于
This support updating htab managed by the hypervisor. Currently we don't have any user for this feature. This actually bring the store_hpte interface in-line with the load_hpte one. We may want to use this when we want to emulate henter hcall in qemu for HV kvm. Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> [ folded fix for the "warn_unused_result" build break in kvmppc_hash64_write_pte(), Greg Kurz <gkurz@linux.vnet.ibm.com> ] Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Aneesh Kumar K.V 提交于
With kvm enabled, we store the hash page table information in the hypervisor. Use ioctl to read the htab contents. Without this we get the below error when trying to read the guest address (gdb) x/10 do_fork 0xc000000000098660 <do_fork>: Cannot access memory at address 0xc000000000098660 (gdb) Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> [ fixes for 32 bit build (casts!), ldq_phys() API change, Greg Kurz <gkurz@linux.vnet.ibm.com ] Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Aneesh Kumar K.V 提交于
Correctly update the htab_mask using the return value of KVM_PPC_ALLOCATE_HTAB ioctl. Also we don't update sdr1 on GET_SREGS for HV. We check for external htab and if found true, we don't need to update sdr1 Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> [ fixed pte group offset computation in ppc_hash64_htab_lookup() that caused TCG to fail, Greg Kurz <gkurz@linux.vnet.ibm.com> ] Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexey Kardashevskiy 提交于
PR KVM lacks support of many SPRs in set/get one register API but it does really break PR KVM. So convert them to switchable traces for now. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexey Kardashevskiy 提交于
When ppc_store_slb() is called from kvm_arch_get_registers(), it stores a SLB in CPUPPCState::slb[slot]. However it drops the slot number from ESID so when kvm_arch_put_registers() puts SLBs back to KVM, they do not have correct "index" field anymore. This broke migration with LPCR_AIR enabled as now the guest is handling interrupts in virtual mode and unable to reconstruct correct SLBs anymore. This adds "index" field for valid SLBs when putting them to KVM. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: qemu-stable@nongnu.org Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 14 2月, 2014 1 次提交
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由 Alexander Graf 提交于
We now have to pass an address space to our _phys helpers. During the transition apparently the EPR exit path missed out, so let's put it there. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 20 12月, 2013 2 次提交
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由 Alexey Kardashevskiy 提交于
IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and a CPU version in lower 16 bits. Since there is no significant change in behavior between versions, there is no point to add every single CPU version in QEMU's CPU list. Also, new CPU versions of already supported CPU won't break the existing code. This adds PVR value/mask support for KVM, i.e. for -cpu host option. As CPU family class name for POWER7 is "POWER7-family", there is no need to touch aliases. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Greg Kurz 提交于
The latest update to v3.13-rc3 (bf63839f) breaks the ppc build with KVM: kvm-all.o: In function `kvm_update_guest_debug': kvm-all.c:1910: undefined reference to `kvm_arch_update_guest_debug' kvm-all.o: In function `kvm_insert_breakpoint': kvm-all.c:1937: undefined reference to `kvm_arch_insert_sw_breakpoint' kvm-all.c:1945: undefined reference to `kvm_arch_insert_hw_breakpoint' kvm-all.o: In function `kvm_remove_breakpoint': kvm-all.c:1977: undefined reference to `kvm_arch_remove_sw_breakpoint' kvm-all.c:1985: undefined reference to `kvm_arch_remove_hw_breakpoint' kvm-all.o: In function `kvm_remove_all_breakpoints': kvm-all.c:2009: undefined reference to `kvm_arch_remove_sw_breakpoint' kvm-all.c:2006: undefined reference to `kvm_arch_remove_sw_breakpoint' kvm-all.c:2017: undefined reference to `kvm_arch_remove_all_hw_breakpoints' We need stubs until something gets implemented. Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 26 10月, 2013 3 次提交
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由 Aneesh Kumar K.V 提交于
Instead of opencoding 64 use MAX_SLB_ENTRIES. We don't update the kernel header here. Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Aneesh Kumar K.V 提交于
Without this, a value of rb=0 and rs=0 results in replacing the 0th index. This can be observed when using gdb remote debugging support. (gdb) x/10i do_fork 0xc000000000085330 <do_fork>: Cannot access memory at address 0xc000000000085330 (gdb) This is because when we do the slb sync via kvm_cpu_synchronize_state, we overwrite the slb entry (0th entry) for 0xc000000000085330 Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 David Gibson 提交于
Recent PowerKVM allows the kernel to intercept some RTAS calls from the guest directly. This is used to implement the more efficient in-kernel XICS for example. qemu is still responsible for assigning the RTAS token numbers however, and needs to tell the kernel which RTAS function name is assigned to a given token value. This patch adds a convenience wrapper for the KVM_PPC_RTAS_DEFINE_TOKEN ioctl() which is used for this purpose. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Acked-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 23 8月, 2013 1 次提交
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由 Alex Bligh 提交于
This is an autogenerated patch using scripts/switch-timer-api. Switch the entire code base to using the new timer API. Note this patch may introduce some line length issues. Signed-off-by: NAlex Bligh <alex@alex.org.uk> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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- 30 7月, 2013 1 次提交
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由 Peter Maydell 提交于
'dprintf' is the name of a POSIX standard function so we should not be stealing it for our debug macro. Rename to 'DPRINTF' (in line with a number of other source files.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: NMORITA Kazutaka <morita.kazutaka@lab.ntt.co.jp> Acked-by: NRichard Henderson <rth@twiddle.net> Acked-by: NKevin Wolf <kwolf@redhat.com> Message-id: 1375100199-13934-4-git-send-email-peter.maydell@linaro.org Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 29 7月, 2013 1 次提交
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由 Alexey Kardashevskiy 提交于
At present, the savevm / migration support for the pseries machine will not work when KVM is enabled. That's because KVM manages the guest's hash page table in the host kernel, so qemu has no visibility of it. This patch fixes this by using new kernel interfaces to extract and reinsert the guest's hash table during the migration process. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Message-id: 1374175984-8930-11-git-send-email-aliguori@us.ibm.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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