1. 14 5月, 2018 1 次提交
  2. 11 5月, 2018 3 次提交
    • P
      Merge remote-tracking branch 'remotes/rth/tags/cota-target-pull-request' into staging · c74e62ee
      Peter Maydell 提交于
      * Fix all next_page checks for overflow.
      * Convert six targets to the translator loop.
      
      # gpg: Signature made Wed 09 May 2018 18:20:43 BST
      # gpg:                using RSA key 64DF38E8AF7E215F
      # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
      # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F
      
      * remotes/rth/tags/cota-target-pull-request: (28 commits)
        target/riscv: convert to TranslatorOps
        target/riscv: convert to DisasContextBase
        target/riscv: convert to DisasJumpType
        target/openrisc: convert to TranslatorOps
        target/openrisc: convert to DisasContextBase
        target/s390x: convert to TranslatorOps
        target/s390x: convert to DisasContextBase
        target/s390x: convert to DisasJumpType
        target/mips: convert to TranslatorOps
        target/mips: use *ctx for DisasContext
        target/mips: convert to DisasContextBase
        target/mips: convert to DisasJumpType
        target/mips: use lookup_and_goto_ptr on BS_STOP
        target/sparc: convert to TranslatorOps
        target/sparc: convert to DisasContextBase
        target/sparc: convert to DisasJumpType
        target/sh4: convert to TranslatorOps
        translator: merge max_insns into DisasContextBase
        target/mips: avoid integer overflow in next_page PC check
        target/s390x: avoid integer overflow in next_page PC check
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      c74e62ee
    • P
      Merge remote-tracking branch 'remotes/rth/tags/tcg-next-pull-request' into staging · 6d7cde80
      Peter Maydell 提交于
      Queued TCG patches
      
      # gpg: Signature made Wed 09 May 2018 16:46:21 BST
      # gpg:                using RSA key 64DF38E8AF7E215F
      # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
      # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F
      
      * remotes/rth/tags/tcg-next-pull-request:
        tcg: Limit the number of ops in a TB
        tcg/i386: Fix dup_vec in non-AVX2 codepath
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      6d7cde80
    • R
      target/m68k: Fix build Werror with gcc 8.0.1 · 5cbc6111
      Richard Henderson 提交于
      Fedora 28 ships with the released gcc 8.
      
      The Werror stems from the compiler finding a path through the second
      switch via a missing default case in which src1 is uninitialized, and
      not being able to prove that the missing default case is unreachable
      due to the first switch.
      
      Simplify the second switch to merge default with OS_LONG,
      which returns directly.  This removes the unreachable path.
      
      Cc: Laurent Vivier <laurent@vivier.eu>
      Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
      Reviewed-by: NLaurent Vivier <laurent@vivier.eu>
      Message-id: 20180508185520.23757-1-richard.henderson@linaro.org
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      5cbc6111
  3. 10 5月, 2018 29 次提交
  4. 09 5月, 2018 6 次提交
    • R
      tcg: Limit the number of ops in a TB · abebf925
      Richard Henderson 提交于
      In 6001f772 we partially attempt to address the branch
      displacement overflow caused by 15fa08f8.
      
      However, gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqtbX.c
      is a testcase that contains a TB so large as to overflow anyway.
      The limit here of 8000 ops produces a maximum output TB size of
      24112 bytes on a ppc64le host with that test case.  This is still
      much less than the maximum forward branch distance of 32764 bytes.
      
      Cc: qemu-stable@nongnu.org
      Fixes: 15fa08f8 ("tcg: Dynamically allocate TCGOps")
      Reviewed-by: NLaurent Vivier <laurent@vivier.eu>
      Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
      Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
      abebf925
    • P
      tcg/i386: Fix dup_vec in non-AVX2 codepath · 7eb30ef0
      Peter Maydell 提交于
      The VPUNPCKLD* instructions are all "non-destructive source",
      indicated by "NDS" in the encoding string in the x86 ISA manual.
      This means that they take two source operands, one of which is
      encoded in the VEX.vvvv field. We were incorrectly treating them
      as if they were destructive-source and passing 0 as the 'v'
      argument of tcg_out_vex_modrm(). This meant we were always
      using %xmm0 as one of the source operands, causing incorrect
      results if the register allocator happened to want to use
      something else. For instance the input AArch64 insn:
       DUP v26.16b, w21
      which becomes TCG IR ops:
       dup_vec v128,e8,tmp2,x21
       st_vec v128,e8,tmp2,env,$0xa40
      was assembled to:
      0x607c568c:  c4 c1 7a 7e 86 e8 00 00  vmovq    0xe8(%r14), %xmm0
      0x607c5694:  00
      0x607c5695:  c5 f9 60 c8              vpunpcklbw %xmm0, %xmm0, %xmm1
      0x607c5699:  c5 f9 61 c9              vpunpcklwd %xmm1, %xmm0, %xmm1
      0x607c569d:  c5 f9 70 c9 00           vpshufd  $0, %xmm1, %xmm1
      0x607c56a2:  c4 c1 7a 7f 8e 40 0a 00  vmovdqu  %xmm1, 0xa40(%r14)
      0x607c56aa:  00
      
      when the vpunpcklwd insn should be "%xmm1, %xmm1, %xmm1".
      This resulted in our incorrectly setting the output vector to
      q26=0000320000003200:0000320000003200
      when given an input of x21 == 0000000002803200
      rather than the expected all-zeroes.
      
      Pass the correct source register number to tcg_out_vex_modrm()
      for these insns.
      
      Fixes: 770c2fc7
      Cc: qemu-stable@nongnu.org
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Message-Id: <20180504153431.5169-1-peter.maydell@linaro.org>
      Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
      7eb30ef0
    • K
      riscv: requires libfdt · a666409f
      KONRAD Frederic 提交于
      When compiling on a machine without libfdt installed the configure script
      should try to get libfdt from the git or should die because otherwise
      CONFIG_LIBFDT is not set and the build process end in an error in the link
      phase.. eg:
      
      hw/riscv/virt.o: In function `riscv_virt_board_init':
      qemu/src/hw/riscv/virt.c:317: undefined reference to `qemu_fdt_setprop_cell'
      qemu/src/hw/riscv/virt.c:319: undefined reference to `qemu_fdt_setprop_cell'
      qemu/src/hw/riscv/virt.c:345: undefined reference to `qemu_fdt_dumpdtb'
      collect2: error: ld returned 1 exit status
      make[1]: *** [qemu-system-riscv64] Error 1
      make: *** [subdir-riscv64-softmmu] Error 2
      
      Cc: qemu-stable@nongnu.org
      Reviewed-by: NBastian Koppelmann <kbastian@mail.uni-paderborn.de>
      Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
      Reviewed-by: NMichael Clark <mjc@sifive.com>
      Signed-off-by: NKONRAD Frederic <frederic.konrad@adacore.com>
      Signed-off-by: NMichael Clark <mjc@sifive.com>
      
      Message-Id: <1525360636-18229-4-git-send-email-frederic.konrad@adacore.com>
      a666409f
    • K
      riscv: htif: increase the priority of the htif subregion · 6fad7d18
      KONRAD Frederic 提交于
      The htif device is supposed to be mapped over an other subregion. So increase
      its priority to one to avoid any conflict.
      
      Here is the output of info mtree:
      
      Before:
      (qemu) info mtree
       address-space: memory
         0000000000000000-ffffffffffffffff (prio 0, i/o): system
           0000000000000000-000000000000000f (prio 0, i/o): riscv.htif.uart
           0000000000000000-0000000000011fff (prio 0, ram): riscv.spike.bootrom
           0000000002000000-000000000200ffff (prio 0, i/o): riscv.sifive.clint
           0000000080000000-0000000087ffffff (prio 0, ram): riscv.spike.ram
      
       address-space: I/O
         0000000000000000-000000000000ffff (prio 0, i/o): io
      
       address-space: cpu-memory-0
         0000000000000000-ffffffffffffffff (prio 0, i/o): system
           0000000000000000-000000000000000f (prio 0, i/o): riscv.htif.uart
           0000000000000000-0000000000011fff (prio 0, ram): riscv.spike.bootrom
           0000000002000000-000000000200ffff (prio 0, i/o): riscv.sifive.clint
           0000000080000000-0000000087ffffff (prio 0, ram): riscv.spike.ram
      
      After:
       (qemu) info mtree
       address-space: memory
         0000000000000000-ffffffffffffffff (prio 0, i/o): system
           0000000000000000-000000000000000f (prio 1, i/o): riscv.htif.uart
           0000000000000000-0000000000011fff (prio 0, ram): riscv.spike.bootrom
           0000000002000000-000000000200ffff (prio 0, i/o): riscv.sifive.clint
           0000000080000000-0000000087ffffff (prio 0, ram): riscv.spike.ram
      
       address-space: I/O
         0000000000000000-000000000000ffff (prio 0, i/o): io
      
       address-space: cpu-memory-0
         0000000000000000-ffffffffffffffff (prio 0, i/o): system
           0000000000000000-000000000000000f (prio 1, i/o): riscv.htif.uart
           0000000000000000-0000000000011fff (prio 0, ram): riscv.spike.bootrom
           0000000002000000-000000000200ffff (prio 0, i/o): riscv.sifive.clint
           0000000080000000-0000000087ffffff (prio 0, ram): riscv.spike.ram
      Reviewed-by: NMichael Clark <mjc@sifive.com>
      Signed-off-by: NKONRAD Frederic <frederic.konrad@adacore.com>
      Signed-off-by: NMichael Clark <mjc@sifive.com>
      
      Message-Id: <1525360636-18229-3-git-send-email-frederic.konrad@adacore.com>
      6fad7d18
    • K
      riscv: spike: allow base == 0 · 17b9751e
      KONRAD Frederic 提交于
      The sanity check on base doesn't allow htif to be mapped @0. Check if the
      symbol exists instead so we can map it where we want.
      Reviewed-by: NMichael Clark <mjc@sifive.com>
      Signed-off-by: NKONRAD Frederic <frederic.konrad@adacore.com>
      Signed-off-by: NMichael Clark <mjc@sifive.com>
      
      Message-Id: <1525360636-18229-2-git-send-email-frederic.konrad@adacore.com>
      17b9751e
    • P
      Merge remote-tracking branch 'remotes/cody/tags/block-pull-request' into staging · e5cd6952
      Peter Maydell 提交于
      # gpg: Signature made Tue 08 May 2018 16:18:22 BST
      # gpg:                using RSA key BDBE7B27C0DE3057
      # gpg: Good signature from "Jeffrey Cody <jcody@redhat.com>"
      # gpg:                 aka "Jeffrey Cody <jeff@codyprime.org>"
      # gpg:                 aka "Jeffrey Cody <codyprime@gmail.com>"
      # Primary key fingerprint: 9957 4B4D 3474 90E7 9D98  D624 BDBE 7B27 C0DE 3057
      
      * remotes/cody/tags/block-pull-request:
        sheepdog: Fix sd_co_create_opts() memory leaks
        iotests: Add test for cancelling a mirror job
        block/mirror: Make cancel always cancel pre-READY
        block/mirror: honor ratelimit again
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      e5cd6952
  5. 08 5月, 2018 1 次提交