- 24 8月, 2018 40 次提交
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由 Aleksandar Rikalo 提交于
Use bits from configuration registers for availability control of MT ASE instructions, rather than only ISA_MT bit in insn_flags. This is done by adding a field in hflags for MT bit, and adding functions check_mt() and check_cp0_mt(). Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Stefan Markovic 提交于
Add emulation of various flavors of nanoMIPS 32-bit branch instructions. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Aleksandar Rikalo 提交于
Implement support for nanoMIPS LLWP/SCWP instructions. Beside adding core functionality of these instructions, this patch adds support for availability control via configuration bit XNP. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NDimitrije Nikolic <dnikolic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Dimitrije Nikolic 提交于
Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is needed for implementing availability control of various instructions. Reviewed-by: "Aleksandar Markovic <amarkovic@wavecomp.com>" Signed-off-by: "Aleksandar Markovic <amarkovic@wavecomp.com>"
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由 Yongbok Kim 提交于
Add emulation of various nanoMIPS load and store instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 James Hogan 提交于
Implement emulation of nanoMIPS EXTW instruction. EXTW instruction is similar to the MIPS r6 ALIGN instruction, except that it counts the other way and in bits instead of bytes. We therefore generalise gen_align() function into a new gen_align_bits() function (which counts in bits instead of bytes and optimises when bits = size of the word), and implement gen_align() and a new gen_ext() based on that. Since we need to know the word size to check for when the number of bits == the word size, the opc argument is replaced with a wordsz argument (either 32 or 64). Signed-off-by: NJames Hogan <james.hogan@mips.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Matthew Fortune 提交于
Added a helper for ROTX based on the pseudocode from the architecture spec. This instraction was not present in previous MIPS instruction sets. Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Yongbok Kim 提交于
Add emulation of nanoMIPS instructions situated in pool p_lsx, and emulation of LSA instruction as well. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of misc nanoMIPS instructions situated in pool32axf. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of nanoMIPS instructions that are situated in pool32a0. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of basic floating point arithmetic for nanoMIPS. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of LI48, ADDIU48, ADDIUGP48, ADDIUPC48, LWPC48, and SWPC48 instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of SIGRIE, SYSCALL, BREAK, SDBBP, ADDIU, ADDIUPC, ADDIUGP.W, LWGP, SWGP, ORI, XORI, ANDI, and other instructions. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Stefan Markovic 提交于
Add emulation of SAVE16 and RESTORE.JRC16 instructions. Routines gen_save(), gen_restore(), and gen_adjust_sp() are provided to support this feature. This patch at the same time provides function gen_op_addr_addi(). This function will be used in emulation of some other nanoMIPS instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of NOT16, AND16, XOR16, OR16 instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of LWXS16, LB16, SB16, LBU16, LH16, SH16, LHU16, LW16, LWSP16, LW4X4, SW4X4, LWGP16, SWSP16, SW16, and SWGP16 instructions. Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of misc nanoMIPS 16-bit instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of nanoMIPS 16-bit shift instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Stefan Markovic 提交于
Add emulation of nanoMIPS 16-bit branch instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add emulation of nanoMIPS 16-bit arithmetic instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Add some basic utility functions and macros for nanoMIPS decoding engine. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Add empty body and invocation of decode_nanomips_opc() if the bit ISA_NANOMIPS32 is set in ctx->insn_flags. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Stefan Markovic 提交于
Only if Config3.ISA is 3 (microMIPS), the mode should be switched in cpu_state_reset(). Config3.ISA is 1 for nanoMIPS processors, and no mode change should happen. Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Stefan Markovic 提交于
Add nanoMIPS opcodes for DSP ASE instruction pools and instructions. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Yongbok Kim 提交于
Add nanoMIPS opcodes. nanoMIPS instruction are organized by so-called instruction pools. Each pool contains a set of opcodes, that in turn can be instruction opcodes or instruction pool opcodes. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Add ISA_NANOMIPS32 and CPU_NANOMIPS32 preprocessor constants. Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NYongbok Kim <yongbok.kim@mips.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
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由 Peter Maydell 提交于
check/next for 20180822 # gpg: Signature made Wed 22 Aug 2018 09:03:40 BST # gpg: using RSA key F487EF185872D723 # gpg: Good signature from "Juan Quintela <quintela@redhat.com>" # gpg: aka "Juan Quintela <quintela@trasno.org>" # Primary key fingerprint: 1899 FF8E DEBF 58CC EE03 4B82 F487 EF18 5872 D723 * remotes/juanquintela/tags/check/20180822: check: Only test tpm devices when they are compiled in check: Only test usb-ehci when it is compiled in check: Only test usb-uhci devices when they are compiled in check: Only test usb-ohci when it is compiled in check: Only test nvme when it is compiled in check: Only test pvpanic when it is compiled in check: Only test wdt_ib700 when it is compiled in check: Only test sdhci when it is compiled in check: Only test i82801b11 when it is compiled in check: Only test ioh3420 when it is compiled in check: Only test ipack when it is compiled in check: Only test hda when it is compiled in check: Only test ac97 when it is compiled in check: Only test es1370 when it is compiled in check: Only test rtl8139 when it is compiled in check: Only test pcnet when it is compiled in check: Only test eepro100 when it is compiled in check: Only test ne2000 when it is compiled in check: Only test vmxnet3 when it is compiled in Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
target-arm queue: * Fix rounding errors in scaling float-to-int and int-to-float operations * Connect virtualization-related IRQs and memory regions of GICv2 in boards that use Cortex-A7 or Cortex-A15 * Support taking exceptions to AArch32 Hyp mode * Clear CPSR.IL and CPSR.J on 32-bit exception entry (a minor bug fix that won't affect non-buggy guest code) * mps2-an505: Implement various missing devices: dual timer, watchdogs, counters in the FPGAIO registers, some missing ID/control registers, TrustZone Master Security Controllers, PL081 DMA controllers, PL022 SPI controllers * correct ID register values for mps2-an385, -an511, -an505 * fix some hardcoded tabs in untouched backwaters of the target/arm codebase * raspi: Refactor framebuffer property handling code and implement support for the virtual framebuffer/viewport # gpg: Signature made Fri 24 Aug 2018 13:19:04 BST # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180824-1: (52 commits) hw/arm/mps2: Fix ID register errors on AN511 and AN385 hw/display/bcm2835_fb: Validate bcm2835_fb_mbox_push() config hw/display/bcm2835_fb: Validate config settings hw/display/bcm2835_fb: Fix handling of virtual framebuffer hw/display/bcm2835_fb: Abstract out calculation of pitch, size hw/display/bcm2835_fb: Reset resolution, etc correctly hw/display/bcm2835_fb: Drop unused size and pitch fields hw/misc/bcm2835_property: Track fb settings using BCM2835FBConfig hw/misc/bcm2835_fb: Move config fields to their own struct target/arm: Remove a handful of stray tabs target/arm: Untabify iwmmxt_helper.c target/arm: Untabify translate.c hw/arm/mps2-tz: Fix MPS2 SCC config register values hw/arm/mps2-tz: Instantiate SPI controllers hw/ssi/pl022: Correct wrong DMACR and ICR handling hw/ssi/pl022: Correct wrong value for PL022_INT_RT hw/ssi/pl022: Use DeviceState::realize rather than SysBusDevice::init hw/ssi/pl022: Don't directly call vmstate_register() hw/ssi/pl022: Set up reset function in class init hw/ssi/pl022: Allow use as embedded-struct device ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Fix MPS2 SCC config register values for the mps2-an511 and mps2-an385 boards: * the SCC_AID bits [23:20] specify the FPGA build target board revision, and the SCC_CFG4 register specifies the actual board revision, so these should have matching values. Claim to be board revision C, consistently -- we had the revision in the wrong part of SCC_AID. * SCC_ID bits [15:4] should be the board number in hex, not decimal Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180823175225.22612-1-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Refactor bcm2835_fb_mbox_push() to work by calling bcm2835_fb_validate_config() and bcm2835_fb_reconfigure(), so that config set this way is also validated. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180814144436.679-9-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Validate the config settings that the guest tries to set. The wiki page documentation is not really accurate here: generally rather than failing requests to set bad parameters, the hardware will just clip them to something sensible. Validate the most important parameters: sizes and the viewport offsets. This prevents the framebuffer code from trying to read out-of-range memory. In the property handling code, we validate the new parameters every time we encounter a tag that sets them. This means we validate the config multiple times if the request includes multiple config-setting tags, but the code would require significant restructuring to do a validation only once but still return the clipped settings for get-parameter tags and the buffer allocation tag. Validation of settings made via the older bcm2835_fb_mbox_push() function will be done in the next commit. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180814144436.679-8-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The raspi framebuffir in bcm2835_fb supports the definition of a virtual "viewport", which is smaller than the full physical framebuffer size and at an adjustable offset within it. Only the viewport area is sent to the screen. This allows the guest to do things like double buffering, or scrolling by adjusting the viewport origin. Currently QEMU doesn't implement this at all. Add support for this feature: * the property mailbox code needs to distinguish the virtual width/height from the physical width/height * the framebuffer code needs to do something with the virtual width/height/origin information Note that the wiki documentation on the semantics of the virtual and physical height and width has it the wrong way around -- the virtual size is the size of the allocated buffer, and the physical size is the size of the display, so the virtual size is always the same as or larger than the physical. If the viewport size is set smaller than the physical screen size, we ignore the viewport settings completely and just display the physical screen area. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180814144436.679-7-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Abstract out the calculation of the pitch and size of the framebuffer into functions that operate on the BCM2835FBConfig struct -- these are about to get a little more complicated when we add support for virtual and physical sizes differing. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180814144436.679-6-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The bcm2835_fb's initial resolution and other parameters are set via QOM properties. We should reset to those initial values on device reset, which means we need to save the QOM property values somewhere that they are not overwritten by guest changes to the framebuffer configuration. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180814144436.679-5-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The BCM2835FBState struct has a 'pitch' field which is a cached copy of xres * (bpp >> 3), and a 'size' field which is a cached copy of pitch * yres. However we don't actually do anything with these fields; delete them. We retain the now-unused slots in the VMState struct for migration compatibility. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180814144436.679-4-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Refactor the fb property setting code so that rather than using a set of pointers to local variables to track whether a config value has been updated in the current mbox and if so what its new value is, we just copy all the current settings of the fb at the start, and then update that copy as we go along, before asking the fb to switch to it at the end. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180814144436.679-3-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The handling of framebuffer properties in the bcm2835_property code is a bit clumsy, because for each of the many fb related properties we try to track the value we're about to set and whether we're going to be setting a value, and then we hand all the new values off to the framebuffer via a function which takes them all as separate arguments. It would be simpler if the property code could easily copy all the framebuffer's current settings, update them with the new specified values and then ask the framebuffer to switch to the new set. As the first part of this refactoring, pull all the fb config settings fields in BCM2835FBState out into their own struct. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180814144436.679-2-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Following the bulk conversion of the iwMMXt code, there are just a handful of hard coded tabs in target/arm; fix them. This is a whitespace-only patch. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 20180821165215.29069-4-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Untabify the arm iwmmxt_helper.c. This affects only the iwMMXt code. We've never touched that code in years, so it's not going to get fixed up by our "change when touched" process, and a bulk change is not going to be too disruptive. This commit was produced using Emacs "untabify" (plus one by-hand removal of a space to fix a checkpatch nit); it is a whitespace-only change. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 20180821165215.29069-3-peter.maydell@linaro.org
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