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  1. 06 10月, 2019 1 次提交
  3. 05 7月, 2019 1 次提交
    • P
      virtio-pci: Proxy for virtio-pmem · adf0748a
      由 Pankaj Gupta 提交于 
      We need a proxy device for virtio-pmem, and this device has to be the
actual memory device so we can cleanly hotplug it.

Forward memory device class functions either to the actual device or use
properties of the virtio-pmem device to implement these in the proxy.

virtio-pmem will only be compiled for selected, supported architectures
(that can deal with virtio/pci devices being memory devices). An
architecture that is prepared for that can simply enable
CONFIG_VIRTIO_PMEM to make it work.

As not all architectures support memory devices (and CONFIG_VIRTIO_PMEM
will be enabled per supported architecture), we have to move the PCI proxy
to a separate file.
Signed-off-by: NPankaj Gupta <pagupta@redhat.com>
[ split up patches, memory-device changes, move pci proxy]
Signed-off-by: NDavid Hildenbrand <david@redhat.com>
Message-Id: <20190619094907.10131-5-pagupta@redhat.com>
Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      adf0748a
  5. 03 7月, 2019 1 次提交
    • P
      virtio-pmem: add virtio device · 5f503cd9
      由 Pankaj Gupta 提交于 
      This is the implementation of virtio-pmem device. Support will require
machine changes for the architectures that will support it, so it will
not yet be compiled. It can be unlocked with VIRTIO_PMEM_SUPPORTED per
machine and disabled globally via VIRTIO_PMEM.

We cannot use the "addr" property as that is already used e.g. for
virtio-pci/pci devices. And we will have e.g. virtio-pmem-pci as a proxy.
So we have to choose a different one (unfortunately). "memaddr" it is.
That name should ideally be used by all other virtio-* based memory
devices in the future.
    -device virtio-pmem-pci,id=p0,bus=bux0,addr=0x01,memaddr=0x1000000...
Acked-by: NMarkus Armbruster <armbru@redhat.com>
[ QAPI bits ]
Signed-off-by: NPankaj Gupta <pagupta@redhat.com>
[ MemoryDevice/MemoryRegion changes, cleanups, addr property "memaddr",
  split up patches, unplug handler ]
Signed-off-by: NDavid Hildenbrand <david@redhat.com>
Message-Id: <20190619094907.10131-2-pagupta@redhat.com>
Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
Reviewed-by: NCornelia Huck <cohuck@redhat.com>
      5f503cd9
  7. 10 5月, 2019 1 次提交
    • M
      Add vhost-user-input-pci · 9c4d05b7
      由 Marc-André Lureau 提交于 
      Add a new virtio-input device, which connects to a vhost-user
backend.

Instead of reading configuration directly from an input device /
evdev (like virtio-input-host), it reads it over vhost-user protocol
with {SET,GET}_CONFIG messages. The vhost-user-backend handles the
queues & events setup.
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Message-id: 20190503130034.24916-5-marcandre.lureau@redhat.com

[ kraxel: drop -{non-,}transitional variants ]
[ kraxel: fix "make check" on !linux ]
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
      9c4d05b7
  9. 08 3月, 2019 1 次提交
  11. 22 2月, 2019 2 次提交
  13. 05 2月, 2019 1 次提交
  15. 18 1月, 2019 13 次提交
  17. 01 6月, 2018 1 次提交
  19. 25 5月, 2018 1 次提交
  21. 17 1月, 2017 1 次提交
  23. 02 11月, 2016 2 次提交
  25. 10 9月, 2016 1 次提交
  27. 25 2月, 2016 1 次提交
  29. 16 2月, 2015 1 次提交
  31. 22 9月, 2014 1 次提交
  33. 19 6月, 2014 2 次提交
  35. 19 7月, 2013 1 次提交
  37. 19 4月, 2013 1 次提交
  39. 09 4月, 2013 3 次提交
  41. 11 5月, 2012 1 次提交
  43. 13 3月, 2012 2 次提交
    • E
      add Opteron_G4 CPU model (v2) · 885bb036
      由 Eduardo Habkost 提交于 
      This patch addes a Bulldozer-based Opteron_G4 CPU model.

This version has the ffxsr bit actually disabled, to match what was
documented below. Thanks to Andre Przywara for spotting the bug.

I am trying to be conservative with the new model, so I am enabling only
features known to be useful to guests, and not enabling anything that
was not tested or found to be useful to a guest.

List of missing flags in comparison to real hardware:

- vme: host-specific feature.
- osxsave: it is not set here because it is set by the guest OS, not by KVM
- monitor: this is filtered out by the KVM module, so no point in
  enabling it.
- mmxext: untested, so not enabled.
- Perf*, Topology*, lwp, ibs: not emulated by KVM.
- wdt, skinit, osvw, altmovcr8, extapicspace, cmplegacy: untested,
  so not enabled.

List of new flags, in comparison to the Opteron_G3 model:

- xsave: xsave feature, already implemented by Qemu
- avx, aes, sse4.x, ssse3, pclmulqdq: all new state the new instructions
  could use is handled by the xsave state loading/saving code on Qemu.
- pdpe1gb: 1GB pages, supported by the KVM kernel module.
- ffxsr: untested, so not enabled
- fma4, xop: all new state the new instructions could use is handled by
  the xsave loading/saving code on Qemu.
- 3dnowprefetch: safe to pass through, though the flag is not used by
  Linux guests, at least.

Below is the comparison between the current Opteron_G3 model
and the new model being added.

- The "full" line contains the flags found on actual hardware.
- The "missing" line shows the flags that are present on actual
  hardware, but not on the added Opteron_G4 model.
- The "new" line shows the flags that were not on the Opteron_G3 model
  but are on Opteron_G4.

feature_edx:
  Opteron_G3: sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de     fpu
  full:       sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de vme fpu
  Opteron_G4: sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de     fpu
  missing:                                                                                              vme

feature_ecx:
  Opteron_G3:                       popcnt               cx16       monitor           sse3
  full:       avx osxsave xsave aes popcnt sse4.2 sse4.1 cx16 ssse3 monitor pclmulqdq sse3
  Opteron_G4: avx         xsave aes popcnt sse4.2 sse4.1 cx16 ssse3         pclmulqdq sse3
  missing:        osxsave                                           monitor
  new:        avx         xsave aes        sse4.2 sse4.1      ssse3         pclmulqdq

extfeature_edx:
  Opteron_G3: lm rdtscp               fxsr mmx        nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de     fpu
  full:       lm rdtscp pdpe1gb ffxsr fxsr mmx mmxext nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de vme fpu
  Opteron_G4: lm rdtscp pdpe1gb       fxsr mmx        nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de     fpu
  missing:                                     mmxext                                                                        vme
  new:                  pdpe1gb

extfeature_ecx:
  Opteron_G3:                                                                misalignsse sse4a abm                        svm           lahf_lm
  full:       Perf* Topology* fma4 lwp wdt skinit xop ibs osvw 3dnowprefetch misalignsse sse4a abm altmovcr8 extapicspace svm cmplegacy lahf_lm
  Opteron_G4:                 fma4                xop          3dnowprefetch misalignsse sse4a abm                        svm           lahf_lm
  new:                        fma4                xop          3dnowprefetch
  missing:    Perf* Topology*      lwp wdt skinit     ibs osvw                                     altmovcr8 extapicspace     cmplegacy

Changes v1 -> v2:
 - Actually disable ffxsr bit

Cc: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      885bb036
    • E
      add SandyBridge CPU model · c34ea314
      由 Eduardo Habkost 提交于 
      This patches add the definition of a SandyBridge CPU model.

Summary of differences:

Flags present on actual hardware, but not on the added model definition:

- pbe, tm, ht, ss, acpi, vme, xTPR, tm2, eist, smx: host-specific
  features, not exposed to guest.
- ds, ds-cpl, dtes64, pdcm: emulation not supported by KVM (although it
  may be added in the future if implementing PMU virtualization)
- pcid, vmx, monitor: not emulated by Qemu/KVM right now.
- osxsave: set by the guest OS, not by Qemu.

Flags added, that were not present on Westmere model:

- xsave: already supported by Qemu
- avx, pclmulqdq: all new state the new instructions could use is
  handled by xsave state loading/saving code.
- tsc-deadline, x2apic, rdtscp: already supported by Qemu/KVM.

Below there's a comparison of the features on the current Westmere CPU
model, and the SandyBridge CPU model.

- The "full" line contains the flags found on actual hardware.
- The "missing" line shows the flags that are present on actual
  hardware, but not on the added SandyBridge model.
- The "new" line shows the flags that were not on the Westmere model,
  but are on SandyBridge.

feature_edx:
  Westmere:                 sse2 sse fxsr mmx         clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de     fpu
  full:        pbe tm ht ss sse2 sse fxsr mmx ds acpi clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pge msr tsc pse de vme fpu
  SandyBridge:              sse2 sse fxsr mmx         clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de     fpu
  missing:     pbe tm ht ss                   ds acpi                                                                         vme

feature_ecx:
  Westmere:                      aes              popcnt        sse4.2 sse4.1                cx16 ssse3                                                  sse3
  full:        avx osxsave xsave aes tsc-deadline popcnt x2apic sse4.2 sse4.1 pcid pdcm xTPR cx16 ssse3 tm2 eist smx vmx ds-cpl monitor dtes64 pclmulqdq sse3
  SandyBridge: avx         xsave aes tsc-deadline popcnt x2apic sse4.2 sse4.1                cx16 ssse3                                        pclmulqdq sse3
  missing:         osxsave                                                    pcid pdcm xTPR            tm2 eist smx vmx ds-cpl monitor dtes64
  new:         avx         xsave     tsc-deadline        x2apic                                                                                pclmulqdq

extfeature_edx:
  Westmere:    i64        nx syscall
  full:        i64 rdtscp nx syscall
  SandyBridge: i64 rdtscp nx syscall
  new:             rdtscp

extfeature_ecx:
  Westmere:    lahf_lm
  full:        lahf_lm
  SandyBridge: lahf_lm

Cc: "Dugger, Donald D" <donald.d.dugger@intel.com>
Cc: "Zhang, Xiantao" <xiantao.zhang@intel.com>
Acked-by: NXiantao Zhang <xiantao.zhang@intel.com>
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      c34ea314