- 09 9月, 2015 1 次提交
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由 Alistair Francis 提交于
Bit 15 of the PHY Specific Status Register is reserved and should remain 0. Fix the reset value to ensure that the 15th bit is not set. Signed-off-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: c795069e49040ff770fe2ece19dfe1791b729e22.1441316450.git.alistair.francis@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 03 6月, 2015 1 次提交
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由 Sai Pavan Boddu 提交于
This patch corrects the Rx buffer size field mask to mask bits 23 to 16 to match Xilinx UG585 documentation. Signed-off-by: NSai Pavan Boddu <saipava@xilinx.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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- 18 5月, 2015 2 次提交
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由 Peter Crosthwaite 提交于
Create a new header for Cadence GEM to allow using the device with modern SoC programming conventions. The state struct needs to be visible to embed the device in SoC containers. Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: NAlistair Francis <alistair.francis@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a98b5df6440c5bff8f813a26bb53ce1cfefb4c4c.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Cleanup some variable names in preparation for migrating the state struct and type cast macro to a public header. The acronym "GEM" on its own is not specific enough to be used in a more global namespace so preface with "cadence". Fix the capitalisation of "gem" in the state type while touching the typename. Also preface the GEM_MAXREG macro as this will need to migrate to public header. Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: NAlistair Francis <alistair.francis@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 8e2b0687b3a7b7a3fde5ba2f3bee6f3b911e84ef.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 12 1月, 2015 1 次提交
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由 Paolo Bonzini 提交于
All NICs have a cleanup function that, in most cases, zeroes the pointer to the NICState. In some cases, it frees data belonging to the NIC. However, this function is never called except when exiting from QEMU. It is not necessary to NULL pointers and free data here; the right place to do that would be in the device's unrealize function, after calling qemu_del_nic. Zeroing the NIC multiple times is also wrong for multiqueue devices. This cleanup function gets in the way of making the NetClientStates for the NIC hold an object_ref reference to the object, so get rid of it. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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- 10 6月, 2014 4 次提交
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由 Peter Crosthwaite 提交于
Just use desc instead. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Crosthwaite 提交于
Fix some typos in comments. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Crosthwaite 提交于
Add a debug printf for TX descriptor fetching. This is helpful to anyone needing to debug TX ring buffer traversal. It is also now consistent with the RX code which has a similar printf. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Peter Crosthwaite 提交于
The local variable "desc" was being used to read-modify-write the first descriptor (of a multi-desc packet) upon packet completion. desc however continues to be used by the code as the current descriptor. Give this first desc RMW it's own local variable to avoid trampling. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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- 26 5月, 2014 1 次提交
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由 Peter Crosthwaite 提交于
To indicate Cadence GEM not Xilinx. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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- 13 5月, 2014 2 次提交
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由 Peter Maydell 提交于
Commit 191946c5 moved the code to handle padding to minimum length from after the handling of the CRC to before it. This means that the CRC code doesn't need to cope with the possibility that the size is less than 60; remove this dead code. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Juan Quintela 提交于
After commit 767adce2, they are redundant. This way we don't assign them except when needed. Once there, there were lots of cases where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (apart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: NJuan Quintela <quintela@redhat.com> [PMM: fixed minor conflict, corrected commit message typos] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 08 5月, 2014 1 次提交
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由 Stefan Weil 提交于
This fixes warnings from the static code analysis (smatch). Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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- 18 4月, 2014 1 次提交
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由 Peter Crosthwaite 提交于
Phys must respond to address 0 by specification. Implement. Signed-off-by: NNathan Rossi <nathan.rossi@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 6f4d53b04ddbfb19895bfb61a595e69f1c08859a.1396594056.git.peter.crosthwaite@xilinx.com Reviewed-by: NBeniamino Galvani <b.galvani@gmail.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 10 12月, 2013 14 次提交
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由 Peter Crosthwaite 提交于
Return false from can_receive() when no valid buffer descriptor is available. Ensures against mass packet droppage in some applications. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: cde00ef774e84e2586bf10fd37b542f75bf36cfb.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Currently this just floods indicating that can_receive has been called by the net framework. Instead, save the result of the most recent can_receive callback as state and only print a message if the result changes (indicating some sort of actual state change in GEM). Make said debug message more meaningful as well. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 2eb74ca6a5756aea242d9f525961db95d6cfcf2c.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
This write-1-clear logic was incorrect. It was always clearing w1c bits regardless of whether the written value was 1 or not. i.e. it was implementing a write-anything-to-clear strategy. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: ed905b04d3343966ded425f06aa2224bc7a35b59.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
The minimum packet size is 64, however this is before FCS stripping occurs. So when FCS stripping the minimum packet size is 60. Fix. Reported-by: NDeepika Dhamija <deepika@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 8aac5bd737f9cf48b87f32943d7eb5939061e546.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Bytes_to_copy was being updated before its final use where it advances the rx buffer pointer. This was causing total mayhem, where packet data for any subsequent fragments was being fetched from the wrong place. Reported-by: NDeepika Dhamija <deepika@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: c2a1c65c1fd06eb274442a0fa4a6839d940e145e.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 8f8c2bfb15f40fb5f0d5766aa4cd3d54c596de6a.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
The Specific address registers can be enabled or disabled by software. QEMU was assuming they were always enabled. Implement the disable/enable feature. SARs are disabled by writing to the lower half register. They are re-enabled by then writing the upper half. Reported-by: NDeepika Dhamija <deepika@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 49efd1f7450af8f980b967d3054245bae137866c.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Bit 27 of the RX buffer desc word 1 should be set when the packet was accepted due to specific address register match. Implement. This feature is absent from the Xilinx documentation (UG585) but the behaviour is tested as accurate on real hardware. Reported-by: NDeepika Dhamija <deepika@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 7e3f26fc4ab244e8123efc12723e7164730abdcb.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
The various Rx packet address matching mode flags were not being set in the rx descriptor. Implement. Reported-by: NDeepika Dhamija <deepika@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 6002a24a6a8ceaa11d3009ab5392840d1c084b28.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
The real hardware prefetches rx buffer descriptors ASAP and potentially throws relevant interrupts following the fetch even in the absence of a received packet. Reported-by: NDeepika Dhamija <deepika@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 41629e35edfdb1f02f1e401f2c3d0e2e4c9e44b3.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
There was a replication of the rx descriptor address walking logic. Reorder the flow control to remove. This refactoring also obsoletes the local variables packet_desc_addr and last_desc_addr. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 2a425b457ff0b57274bf206ad2236690cd7f5909.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
This has no real hardware analog and asserting correctness of DMA addresses is not a perhiperal level problem. Delete. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: fc02417eb1874cb05e4f20531c6203c5a00110f1.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Edgar E. Iglesias 提交于
We were updating the ownership bit of all descriptors if packets get split and written through several descriptors. Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: d61b7847b51487118783c93765a485bc5c66d272.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Cadence GEM has a MAC level loopback mode. Implement. Use the same basic operation as the already implemented PHY loopback. Reported-by: NDeepika Dhamija <deepika@xilinx.com> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 3a0baf1b6b2fc1be638bdf1a37408ec38988e970.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 30 7月, 2013 1 次提交
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 04 7月, 2013 2 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 09 4月, 2013 1 次提交
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由 Paolo Bonzini 提交于
This patch tackles all files that are compiled once, moving them to subdirectories of hw/. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 01 3月, 2013 6 次提交
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由 Paolo Bonzini 提交于
Done with this script: cd hw for i in `find . -name '*.h' | sed 's/^..//'`; do echo '\,^#.*include.*["<]'$i'[">], s,'$i',hw/&,' done | sed -i -f - `find . -type f` This is so that paths remain valid as files are moved. Instead, files in hw/dataplane are referenced with the relative path. We know they are not going to move to include/, and they are the only include files that are in subdirectories _and_ move. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Peter Crosthwaite 提交于
Add some helpful messages that show the rx descriptor pointer moving as packets are rxed. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1ef2eb34dade64d589a69a2bcfd5aaddb7d50164.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
This doesn't happen in the real hardware. The Zynq TRM explicitly states that this bit has no effect on the rx descriptor pointer ("The receive queue pointer register is unaffected"). Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 06fdf92b78ee62d8965779bafd29c8df1a5d2718.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Bits in the ISR were continually mirroring their corresponding TX/RX SR bits. This is incorrect. The ISR bits are only ever set at the time their corresponding event occurs. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: cedfb6d108318846480b416a6041023ea5a353d6.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
The gem_receive() function replicates the logic for whether or not the device can rx. Just call the actual gem_can_receive() function in place. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: bf7f93969f3e01fbc76d68d2955307fdbad11bb1.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
The device needs to check for queued RX packets when the RX path is re-enabled. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1fa8c88a3b7c654886d0a7484c2463cd4c2a2781.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 02 2月, 2013 2 次提交
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由 Jason Wang 提交于
To support multiqueue, this patch introduces a helper qemu_get_nic() to get NICState from a NetClientState. The following patches would refactor this helper to support multiqueue. Signed-off-by: NJason Wang <jasowang@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Jason Wang 提交于
To support multiqueue, the patch introduce a helper qemu_get_queue() which is used to get the NetClientState of a device. The following patches would refactor this helper to support multiqueue. Signed-off-by: NJason Wang <jasowang@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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