- 26 6月, 2018 5 次提交
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由 Gerd Hoffmann 提交于
This makes sure the regions are properly cleaned when unplugging -device seconday-vga. Reported-by: NThomas Huth <thuth@redhat.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: NThomas Huth <thuth@redhat.com> Message-id: 20180626060941.8326-1-kraxel@redhat.com
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由 Peter Maydell 提交于
x86 queue, 2018-06-25 * Add TOPOEXT feature to EPYC CPU model * AMD's amd-ssbd and amd-no-ssbd CPUID features * Removed unused CPUID flag names: ospke, osxsave * Better formatting of '-cpu help' # gpg: Signature made Mon 25 Jun 2018 23:18:51 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: Remove generic SMT thread check i386: Enable TOPOEXT feature on AMD EPYC CPU i386: Fix up the Node id for CPUID_8000_001E i386: Allow TOPOEXT to be enabled on older kernels i386: Define AMD's no SSB mitigation needed. i386: define the AMD 'amd-ssbd' CPUID feature bit i386: Remove ospke CPUID flag name i386: Remove osxsave CPUID flag name i386: display known CPUID features linewrapped, in alphabetical order i386: improve sorting of CPU model names i386: improve alignment of CPU model listing i386: Add support for CPUID_8000_001E for AMD Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Pull request # gpg: Signature made Mon 25 Jun 2018 22:11:06 BST # gpg: using RSA key 7DEF8106AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jnsnow/tags/ide-pull-request: ahci: fix FIS I bit and PIO Setup FIS interrupt Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Paolo Bonzini 提交于
The "I" bit in PIO Setup and D2H FISes is exclusively a device concept and the irqstatus register in the controller does not matter. The SATA spec says when it should be one; for D2H FISes in practice it is always set, while the PIO Setup FIS has several subcases that are documented in the patch. Also, the PIO Setup FIS interrupt is actually generated _after_ data has been received. Someone should probably spend some time reading the SATA specification and figuring out the more obscure fields in the PIO Setup FIS, but this is enough to fix SeaBIOS booting from ATAPI CD-ROMs over an AHCI controller. Fixes: 956556e1Reported-by: NGerd Hoffmann <kraxel@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Message-id: 20180622165159.19863-1-pbonzini@redhat.com [Minor edit to avoid ATAPI comment ambiguity. --js] Signed-off-by: NJohn Snow <jsnow@redhat.com>
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- 25 6月, 2018 7 次提交
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由 Peter Maydell 提交于
audio: new timer code for hda codec, fix audio_get_conf_int # gpg: Signature made Mon 25 Jun 2018 14:12:41 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20180625-pull-request: audio: Convert use of atoi to qemu_strtoi audio/hda: enable new timer code by default. audio/hda: detect output buffer overruns audio/hda: tweak timer adjust logic audio/hda: turn some dprintfs into trace points audio/hda: create millisecond timers that handle IO Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Nia Alarie 提交于
If qemu_strtoi indicates an error, return the default value. Signed-off-by: NNia Alarie <nia.alarie@gmail.com> Message-Id: <20180316144047.30904-1-nia.alarie@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Gerd Hoffmann 提交于
Also add a compat property to disable it for old machine types, needed for live migration compatibility. Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Message-id: 20180622111200.30561-6-kraxel@redhat.com
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由 Gerd Hoffmann 提交于
If some event caused some larger playback hickup the fine-grained timer adjust isn't able to recover. Use a buffer overruns as indicator for that. Reset timer adjust logic in case we detected one. Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Message-id: 20180622111200.30561-5-kraxel@redhat.com
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由 Gerd Hoffmann 提交于
We have some jitter in the audio timer call frequency and buffer sizes. So it is rather pointless trying to be very exact, effect is a constant up+down adjustment. So adjust only in case we are off too much. Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Message-id: 20180622111200.30561-4-kraxel@redhat.com
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由 Gerd Hoffmann 提交于
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180622111200.30561-3-kraxel@redhat.com
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由 Gerd Hoffmann 提交于
Currently, the HDA device tries to sync itself with the QEMU audio backend by waiting for the guest driver to handle buffer completion interrupts. This causes the backend to often read too much data from the device, as well as running out of data whenever the guest takes too long to handle the interrupt. According to the HDA specification, the guest is also not required to use interrupts, but can also sync itself by polling the LPIB registers. This patch will introduce high frequency (1000Hz) timers that interface with the device and allow for much smoother emulation of the LPIB registers. Since the timing is now provided by these timers, the need to wait for buffer completion interrupts also ceases. Signed-off-by: NMartin Schrodt <martin@schrodt.org> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Message-id: 20180622111200.30561-2-kraxel@redhat.com Message-id: 20171015184033.2951-3-martin@schrodt.org [ kraxel: keep old code for compatibility with older qemu versions, add property to switch code paths at runtime ] [ kraxel: new code is disabled by default, use-timer=on enables it ] Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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- 24 6月, 2018 1 次提交
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由 Peter Maydell 提交于
Python queue, 2018-06-22 * Partially revert commit that broke qmp-shell and other scripts inside ./scripts/qmp # gpg: Signature made Fri 22 Jun 2018 19:47:23 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/python-next-pull-request: Partially revert "python: futurize -f libfuturize.fixes.fix_absolute_import" Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 23 6月, 2018 15 次提交
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由 Eduardo Habkost 提交于
Since commit 068cf7a4, qmp-shell is broken: $ ./scripts/qmp/qmp-shell Traceback (most recent call last): File "./scripts/qmp/qmp-shell", line 70, in <module> from . import qmp ValueError: Attempted relative import in non-package Relative imports don't work on scripts that are executed directly, so revert the change on the scripts inside scripts/qmp. Fixes: 068cf7a4Reported-by: NJohn Snow <jsnow@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Message-Id: <20180621175451.7948-1-ehabkost@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Babu Moger 提交于
Remove generic non-intel check while validating hyperthreading support. Certain AMD CPUs can support hyperthreading now. CPU family with TOPOEXT feature can support hyperthreading now. Signed-off-by: NBabu Moger <babu.moger@amd.com> Tested-by: NGeoffrey McRae <geoff@hostfission.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Message-Id: <1529443919-67509-4-git-send-email-babu.moger@amd.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Babu Moger 提交于
Enable TOPOEXT feature on EPYC CPU. This is required to support hyperthreading on VM guests. Also extend xlevel to 0x8000001E. Disable topoext on PC_COMPAT_2_12 and keep xlevel 0x8000000a. Signed-off-by: NBabu Moger <babu.moger@amd.com> Message-Id: <1529443919-67509-3-git-send-email-babu.moger@amd.com> [ehabkost: Added EPYC-IBPB.xlevel to PC_COMPAT_2_12] Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Babu Moger 提交于
This is part of topoext support. To keep the compatibility, it is better we support all the combination of nr_cores and nr_threads currently supported. By allowing more nr_cores and nr_threads, we might end up with more nodes than we can actually support with the real hardware. We need to fix up the node id to make this work. We can achieve this by shifting the socket_id bits left to address more nodes. Signed-off-by: NBabu Moger <babu.moger@amd.com> Message-Id: <1529443919-67509-2-git-send-email-babu.moger@amd.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Babu Moger 提交于
Enabling TOPOEXT feature might cause compatibility issues if older kernels does not set this feature. Lets set this feature unconditionally. Signed-off-by: NBabu Moger <babu.moger@amd.com> Message-Id: <1528939107-17193-2-git-send-email-babu.moger@amd.com> [ehabkost: rewrite comment and commit message] Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Konrad Rzeszutek Wilk 提交于
AMD future CPUs expose a mechanism to tell the guest that the Speculative Store Bypass Disable is not needed and that the CPU is all good. This is exposed via the CPUID 8000_0008.EBX[26] bit. See 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf A copy of this document is available at https://bugzilla.kernel.org/show_bug.cgi?id=199889Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Message-Id: <20180601153809.15259-3-konrad.wilk@oracle.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Konrad Rzeszutek Wilk 提交于
AMD future CPUs expose _two_ ways to utilize the Intel equivalant of the Speculative Store Bypass Disable. The first is via the virtualized VIRT_SPEC CTRL MSR (0xC001_011f) and the second is via the SPEC_CTRL MSR (0x48). The document titled: 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf gives priority of SPEC CTRL MSR over the VIRT SPEC CTRL MSR. A copy of this document is available at https://bugzilla.kernel.org/show_bug.cgi?id=199889 Anyhow, this means that on future AMD CPUs there will be _two_ ways to deal with SSBD. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Message-Id: <20180601153809.15259-2-konrad.wilk@oracle.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Eduardo Habkost 提交于
OSPKE is not a static feature flag: it changes dynamically at runtime depending on CR4, and it was never configurable: KVM never returned OSPKE on GET_SUPPORTED_CPUID, and on TCG enables it automatically if CR4_PKE_MASK is set. Remove OSPKE from the feature name array so users don't try to configure it manually. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Message-Id: <20180611203712.12086-1-ehabkost@redhat.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Eduardo Habkost 提交于
OSXAVE is not a static feature flag: it changes dynamically at runtime depending on CR4, and it was never configurable: KVM never returned OSXSAVE on GET_SUPPORTED_CPUID, and it is not included in TCG_EXT_FEATURES. Remove OSXSAVE from the feature name array so users don't try to configure it manually. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Message-Id: <20180611203855.13269-1-ehabkost@redhat.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Daniel P. Berrangé 提交于
When using '-cpu help' the list of CPUID features is grouped according to the internal low level CPUID grouping. The data printed results in very long lines too. This combines to make it hard for users to read the output and identify if QEMU knows about the feature they wish to use. This change gets rid of the grouping of features and treats all flags as single list. The list is sorted into alphabetical order and the printing with line wrapping at the 77th column. Signed-off-by: NDaniel P. Berrangé <berrange@redhat.com> Message-Id: <20180606165527.17365-4-berrange@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Daniel P. Berrangé 提交于
The current list of CPU model names output by "-cpu help" is sorted alphabetically based on the internal QOM class name. The text that is displayed, however, uses the CPU model name, which is equivalent to the QOM class name, minus a suffix. Unfortunately that suffix has an effect on the sort ordering, for example, causing the various Broadwell variants to appear reversed: x86 486 x86 Broadwell-IBRS Intel Core Processor (Broadwell, IBRS) x86 Broadwell-noTSX-IBRS Intel Core Processor (Broadwell, no TSX, IBRS x86 Broadwell-noTSX Intel Core Processor (Broadwell, no TSX) x86 Broadwell Intel Core Processor (Broadwell) x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2) By sorting on the actual CPU model name text that is displayed, the result is x86 486 x86 Broadwell Intel Core Processor (Broadwell) x86 Broadwell-IBRS Intel Core Processor (Broadwell, IBRS) x86 Broadwell-noTSX Intel Core Processor (Broadwell, no TSX) x86 Broadwell-noTSX-IBRS Intel Core Processor (Broadwell, no TSX, IBRS) x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2) This requires extra string allocations during sorting, but this is not a concern given the usage scenario and the number of CPU models that exist. Signed-off-by: NDaniel P. Berrangé <berrange@redhat.com> Message-Id: <20180606165527.17365-3-berrange@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Daniel P. Berrangé 提交于
Since the addition of the -IBRS CPU model variants, the descriptions shown by '-cpu help' are not well aligned, as several model names overflow the space allowed. Right aligning the CPU model names is also not attractive, because it obscures the common name prefixes of many models. The CPU model name field needs to be 4 characters larger, and be left aligned instead. Signed-off-by: NDaniel P. Berrangé <berrange@redhat.com> Message-Id: <20180606165527.17365-2-berrange@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Babu Moger 提交于
Add support for cpuid leaf CPUID_8000_001E. Build the config that closely match the underlying hardware. Please refer to the Processor Programming Reference (PPR) for AMD Family 17h Model for more details. Signed-off-by: NBabu Moger <babu.moger@amd.com> Message-Id: <1528498581-131037-2-git-send-email-babu.moger@amd.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Emilio G. Cota 提交于
Fix the --disable-tcg breakage introduced by tb_lock's removal by relying on the fact that tcg_enabled() is set to 0 at compile-time under --disable-tcg. While at it, add further asserts to fix builds that enable both --disable-tcg and --enable-debug, which were broken even before tb_lock's removal. Tested to build x86_64-softmmu and i386-softmmu targets. Reported-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NEmilio G. Cota <cota@braap.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
QAPI patches for 2018-06-22 # gpg: Signature made Fri 22 Jun 2018 15:36:22 BST # gpg: using RSA key 3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2018-06-22: MAINTAINERS: Update QAPI stanza for commit fb0bc835 qapi/introspect: Eliminate pointless variable in .visit_end() Revert commit d4e5ec87 qapi: Open files with encoding='utf-8' qapi: remove empty flat union branches and types qapi: allow empty branches in flat unions tests: Add QDict clone-flatten test qdict: Make qdict_flatten() shallow-clone-friendly qapi/events: generate event enum in main module qapi/visit: remove useless prefix argument Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 22 6月, 2018 12 次提交
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由 Peter Maydell 提交于
target-arm queue: * hw/intc/arm_gicv3: fix wrong values when reading IPRIORITYR * target/arm: fix read of freed memory in kvm_arm_machine_init_done() * virt: support up to 512 CPUs * virt: support 256MB ECAM PCI region (for more PCI devices) * xlnx-zynqmp: Use Cortex-R5F, not Cortex-R5 * mps2-tz: Implement and use the TrustZone Memory Protection Controller * target/arm: enforce alignment checking for v6M cores * xen: Don't use memory_region_init_ram_nomigrate() in pci_assign_dev_load_option_rom() * vl.c: Don't zero-initialize statics for serial_hds # gpg: Signature made Fri 22 Jun 2018 13:56:00 BST # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180622: (28 commits) xen: Don't use memory_region_init_ram_nomigrate() in pci_assign_dev_load_option_rom() vl.c: Don't zero-initialize statics for serial_hds target/arm: Strict alignment for ARMv6-M and ARMv8-M Baseline target/arm: Introduce ARM_FEATURE_M_MAIN hw/arm/mps2-tz.c: Instantiate MPCs hw/arm/iotkit: Wire up MPC interrupt lines hw/arm/iotkit: Instantiate MPC hw/misc/iotkit-secctl.c: Implement SECMPCINTSTATUS hw/misc/tz_mpc.c: Honour the BLK_LUT settings in translate hw/misc/tz-mpc.c: Implement correct blocked-access behaviour hw/misc/tz-mpc.c: Implement registers hw/misc/tz-mpc.c: Implement the Arm TrustZone Memory Protection Controller xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F target-arm: Add the Cortex-R5F hw/arm/virt: Increase max_cpus to 512 hw/arm/virt: Use 256MB ECAM region by default hw/arm/virt: Add virt-3.0 machine type hw/arm/virt: Add a new 256MB ECAM region hw/arm/virt: Register two redistributor regions when necessary hw/arm/virt-acpi-build: Advertise one or two GICR structures ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Markus Armbruster 提交于
Commit fb0bc835 moved code from scripts/qapi-*.py to scripts/qapi/*.py. It neglected to update MAINTAINERS: scripts/qapi* matches only the former, not the latter. Do that now. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Message-Id: <20180620124827.17106-1-armbru@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com>
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由 Markus Armbruster 提交于
Commit 1a9a507b "qapi-introspect: Hide type names" added local variable @jsons to improve sorting, but also removed the sorting. It was part of a big series that went to v8, and it made sense until v2 or so... Commit 7d0f982b replaced @jsons by @qlits, preserving the uselessness. Get rid of it. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Message-Id: <20180620124742.16979-1-armbru@redhat.com> Reviewed-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
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由 Matthias Maier 提交于
This commit removes the PYTHON_UTF8 workaround. The problem with setting LC_ALL= LANG=C LC_CTYPE=en_US.UTF-8 is that the en_US.UTF-8 locale might not be available. In this case setting above locales results in build errors even though another UTF-8 locale was originally set [1]. The only stable way of fixing the encoding problem is by specifying the encoding in Python, like the previous commit does. [1] https://bugs.gentoo.org/657766Signed-off-by: NArfrever Frehtes Taifersar Arahesis <arfrever.fta@gmail.com> Signed-off-by: NMatthias Maier <tamiko@43-1.org> Message-Id: <20180618175958.29073-3-armbru@redhat.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com> [Commit message tweaked] Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
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由 Markus Armbruster 提交于
Python 2 happily reads UTF-8 files in text mode, but Python 3 requires either UTF-8 locale or an explicit encoding passed to open(). Commit d4e5ec87 fixed this by setting the en_US.UTF-8 locale. Falls apart when the locale isn't be available. Matthias Maier and Arfrever Frehtes Taifersar Arahesis proposed to use binary mode instead, with manual conversion from bytes to str. Works, but opening with an explicit encoding is simpler, so do that. Since Python 2's open() doesn't support the encoding parameter, we need to suppress it with a version check. Reported-by: NArfrever Frehtes Taifersar Arahesis <arfrever.fta@gmail.com> Reported-by: NMatthias Maier <tamiko@43-1.org> Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Message-Id: <20180618175958.29073-2-armbru@redhat.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com>
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由 Anton Nefedov 提交于
Flat unions may now have uncovered branches, so it is possible to get rid of empty types defined for that purpose only. Signed-off-by: NAnton Nefedov <anton.nefedov@virtuozzo.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Message-Id: <1529311206-76847-3-git-send-email-anton.nefedov@virtuozzo.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
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由 Anton Nefedov 提交于
It often happens that just a few discriminator values imply extra data in a flat union. Existing checks did not make possible to leave other values uncovered. Such cases had to be worked around by either stating a dummy (empty) type or introducing another (subset) discriminator enumeration. Both options create redundant entities in qapi files for little profit. With this patch it is not necessary anymore to add designated union fields for every possible value of a discriminator enumeration. Signed-off-by: NAnton Nefedov <anton.nefedov@virtuozzo.com> Message-Id: <1529311206-76847-2-git-send-email-anton.nefedov@virtuozzo.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
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由 Max Reitz 提交于
This new test verifies that qdict_flatten() does not modify a shallow clone of the given QDict. Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NMax Reitz <mreitz@redhat.com> Message-Id: <20180611205203.2624-8-mreitz@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
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由 Max Reitz 提交于
In its current form, qdict_flatten() removes all entries from nested QDicts that are moved to the root QDict. It is completely sufficient to remove all old entries from the root QDict, however. If the nested dicts have a refcount of 1, this will automatically delete them, too. And if they have a greater refcount, we probably do not want to modify them in the first place. The latter observation means that it was currently (in general) impossible to qdict_flatten() a shallowly cloned dict because that would empty nested QDicts in the original dict as well. This patch changes this, so you can now use qdict_flatten(qdict_shallow_clone(dict)) to get a flattened copy without disturbing the original. Signed-off-by: NMax Reitz <mreitz@redhat.com> Message-Id: <20180611205203.2624-7-mreitz@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
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由 Marc-André Lureau 提交于
The event generator produces an enum, and put it in the last visited module. It fits better in the main module, since it's the set of all visited events, from all modules. Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20180321115211.17937-3-marcandre.lureau@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
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由 Marc-André Lureau 提交于
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20180321115211.17937-2-marcandre.lureau@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
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由 Peter Maydell 提交于
ppc patch queue 2018-06-22 Another assorted patch of patches for ppc and spapr. * Rework of guest pagesize handling for ppc, which avoids guest visibly different behaviour between accelerators * A number of Pnv cleanups, working towards more complete POWER9 support * Migration of VPA data, a significant bugfix # gpg: Signature made Fri 22 Jun 2018 05:23:16 BST # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-3.0-20180622: (23 commits) spapr: Don't rewrite mmu capabilities in KVM mode spapr: Limit available pagesizes to provide a consistent guest environment target/ppc: Add ppc_hash64_filter_pagesizes() spapr: Use maximum page size capability to simplify memory backend checking spapr: Maximum (HPT) pagesize property pseries: Update SLOF firmware image to qemu-slof-20180621 target/ppc: Add missing opcode for icbt on PPC440 ppc4xx_i2c: Implement directcntl register ppc4xx_i2c: Remove unimplemented sdata and intr registers sm501: Fix hardware cursor color conversion fpu_helper.c: fix helper_fpscr_clrbit() function spapr: remove unused spapr_irq routines spapr: split the IRQ allocation sequence target/ppc: Add kvmppc_hpt_needs_host_contiguous_pages() helper spapr: Add cpu_apply hook to capabilities spapr: Compute effective capability values earlier target/ppc: Allow cpu compatiblity checks based on type, not instance ppc/pnv: consolidate the creation of the ISA bus device tree ppc/pnv: introduce Pnv8Chip and Pnv9Chip models spapr_cpu_core: migrate VPA related state ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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