- 24 8月, 2018 2 次提交
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由 Peter Maydell 提交于
In the MPS2 FPGAIO, PSCNTR is a free-running downcounter with a reload value configured via the PRESCALE register, and COUNTER counts up by 1 every time PSCNTR reaches zero. Implement these counters. We can just increment the counters migration subsection's version ID because we only added it in the previous commit, so no released QEMU versions will be using it. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAlistair Francis <alistair.francis@wdc.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180820141116.9118-3-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The MPS2 FPGAIO block includes some simple free-running counters. Implement these. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180820141116.9118-2-peter.maydell@linaro.org
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- 02 3月, 2018 1 次提交
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由 Peter Maydell 提交于
The MPS2 AN505 FPGA image includes a "FPGA control block" which is a small set of registers handling LEDs, buttons and some counters. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-14-peter.maydell@linaro.org
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