- 22 9月, 2017 21 次提交
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由 Fam Zheng 提交于
baum.o already receives the sdl cflags in its per object variable, do the same for brlapi libs to avoid cluttering libs_softmmu. Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907084700.952-1-famz@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: NMarc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Fam Zheng 提交于
Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-10-famz@redhat.com> Reviewed-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Fam Zheng 提交于
Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-9-famz@redhat.com> Reviewed-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Fam Zheng 提交于
Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-8-famz@redhat.com> Reviewed-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Fam Zheng 提交于
Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-5-famz@redhat.com> Reviewed-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Fam Zheng 提交于
Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-3-famz@redhat.com> Reviewed-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Fam Zheng 提交于
Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907083552.17725-3-famz@redhat.com> Reviewed-by: NJason Wang <jasowang@redhat.com> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Fam Zheng 提交于
Nothing in vl.c uses anything from the vde package, do remove the unnecessary include. Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907083552.17725-2-famz@redhat.com> Reviewed-by: NJason Wang <jasowang@redhat.com> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Fam Zheng 提交于
Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-6-famz@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
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由 Fam Zheng 提交于
The LUKS cases in qemu-iotests requires this. Reviewed-by: NKashyap Chamarthy <kchamart@redhat.com> Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-5-famz@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
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由 Fam Zheng 提交于
Some by default blocked syscalls are required to run tests for example userfaultfd. Reviewed-by: NKashyap Chamarthy <kchamart@redhat.com> Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-4-famz@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
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由 Fam Zheng 提交于
They both print a message and exit, but with different status code so distinguish real test errors from env preparation failures. Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-3-famz@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
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由 Fam Zheng 提交于
Without "set -e", the "&&" makes sure that the return code reflects the result status, and that make only runs if configure succeeds. Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-2-famz@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
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由 Fam Zheng 提交于
The 'run' script already creats src, build and install directories under $TEST_DIR, use it in common.rc. Also the tests always run from $QEMU_SRC/tests/docker, so use a relative $CMD string. Message-Id: <20170817035721.11064-1-famz@redhat.com> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Fam Zheng 提交于
Also avoid "set -e". Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907141245.31946-3-famz@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com>
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由 Fam Zheng 提交于
Base on the newer ubuntu-lts (16.06) and include more packages for better build coverage. Signed-off-by: NFam Zheng <famz@redhat.com> Message-Id: <20170907141245.31946-2-famz@redhat.com>
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由 Alex Bennée 提交于
Set the DEBIAN_FRONTEND and locale env vars to stop apt complaining so much as we build the image. Suggested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-Id: <20170725133425.436-7-alex.bennee@linaro.org> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Alex Bennée 提交于
Installing the device-tree-compiler build-deps is a little extreme. We only actually need the binary so include it with the other packages. Suggested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-Id: <20170725133425.436-6-alex.bennee@linaro.org> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Alex Bennée 提交于
If you invoke with NOCACHE=1 we pass --no-cache in the argv to docker.py but may still not force a rebuild if the dockerfile checksum hasn't changed. By testing for its presence we can force builds without having to manually remove the docker image. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-Id: <20170725133425.436-5-alex.bennee@linaro.org> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Alex Bennée 提交于
While adding the current user is a useful default behaviour for creating new images it is not appropriate for Travis which already has a default user. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20170725133425.436-2-alex.bennee@linaro.org> Signed-off-by: NFam Zheng <famz@redhat.com>
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由 Peter Maydell 提交于
target-arm queue: * more preparatory work for v8M support * convert some omap devices away from old_mmio * remove out of date ARM ARM section references in comments * add the Smartfusion2 board # gpg: Signature made Thu 21 Sep 2017 17:40:40 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20170921: (31 commits) msf2: Add Emcraft's Smartfusion2 SOM kit msf2: Add Smartfusion2 SoC msf2: Add Smartfusion2 SPI controller msf2: Microsemi Smartfusion2 System Register block msf2: Add Smartfusion2 System timer hw/arm/omap2.c: Don't use old_mmio hw/i2c/omap_i2c.c: Don't use old_mmio hw/timer/omap_gptimer: Don't use old_mmio hw/timer/omap_synctimer.c: Don't use old_mmio hw/gpio/omap_gpio.c: Don't use old_mmio hw/arm/palm.c: Don't use old_mmio for static_ops target/arm: Remove out of date ARM ARM section references in A64 decoder nvic: Support banked exceptions in acknowledge and complete nvic: Make SHCSR banked for v8M nvic: Make ICSR banked for v8M target/arm: Handle banking in negative-execution-priority check in cpu_mmu_index() nvic: Handle v8M changes in nvic_exec_prio() nvic: Disable the non-secure HardFault if AIRCR.BFHFNMINS is clear nvic: Implement v8M changes to fixed priority exceptions nvic: In escalation to HardFault, support HF not being priority -1 ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 21 9月, 2017 19 次提交
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由 Subbaraya Sundeep 提交于
Emulated Emcraft's Smartfusion2 System On Module starter kit. Signed-off-by: NSubbaraya Sundeep <sundeep.lkml@gmail.com> Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-6-f4bug@amsat.org [PMD: drop cpu_model to directly use cpu type] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Subbaraya Sundeep 提交于
Smartfusion2 SoC has hardened Microcontroller subsystem and flash based FPGA fabric. This patch adds support for Microcontroller subsystem in the SoC. Signed-off-by: NSubbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-5-f4bug@amsat.org [PMD: drop cpu_model to directly use cpu type, check m3clk non null] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Subbaraya Sundeep 提交于
Modelled Microsemi's Smartfusion2 SPI controller. Signed-off-by: NSubbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-4-f4bug@amsat.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Subbaraya Sundeep 提交于
Added Sytem register block of Smartfusion2. This block has PLL registers which are accessed by guest. Signed-off-by: NSubbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Acked-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-3-f4bug@amsat.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Subbaraya Sundeep 提交于
Modelled System Timer in Microsemi's Smartfusion2 Soc. Timer has two 32bit down counters and two interrupts. Signed-off-by: NSubbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Acked-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-2-f4bug@amsat.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Don't use old_mmio in the memory region ops struct. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-7-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Don't use old_mmio in the memory region ops struct. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-6-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Don't use the old_mmio struct in memory region ops. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-5-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Don't use the old_mmio in the memory region ops struct. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-4-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Drop the use of old_mmio in the omap2_gpio memory ops. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-3-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Update the static_ops functions to use new-style mmio rather than the legacy old_mmio functions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-2-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
In the A64 decoder, we have a lot of references to section numbers from version A.a of the v8A ARM ARM (DDI0487). This version of the document is now long obsolete (we are currently on revision B.a), and various intervening versions renumbered all the sections. The most recent B.a version of the document doesn't assign section numbers at all to the individual instruction classes in the way that the various A.x versions did. The simplest thing to do is just to delete all the out of date C.x.x references. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAlex Bennée <alex.bennee@linaro.org> Message-id: 20170915150849.23557-1-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Update armv7m_nvic_acknowledge_irq() and armv7m_nvic_complete_irq() to handle banked exceptions: * acknowledge needs to use the correct vector, which may be in sec_vectors[] * acknowledge needs to return to its caller whether the exception should be taken to secure or non-secure state * complete needs its caller to tell it whether the exception being completed is a secure one or not Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-20-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Handle banking of SHCSR: some register bits are banked between Secure and Non-Secure, and some are only accessible to Secure. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-19-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The ICSR NVIC register is banked for v8M. This doesn't require any new state, but it does mean that some bits are controlled by BFHNFNMINS and some bits must work with the correct banked exception. There is also a new in v8M PENDNMICLR bit. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-18-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Now that we have a banked FAULTMASK register and banked exceptions, we can implement the correct check in cpu_mmu_index() for whether the MPU_CTRL.HFNMIENA bit's effect should apply. This bit causes handlers which have requested a negative execution priority to run with the MPU disabled. In v8M the test has to check this for the current security state and so takes account of banking. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-17-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Update nvic_exec_prio() to support the v8M changes: * BASEPRI, FAULTMASK and PRIMASK are all banked * AIRCR.PRIS can affect NS priorities * AIRCR.BFHFNMINS affects FAULTMASK behaviour These changes mean that it's no longer possible to definitely say that if FAULTMASK is set it overrides PRIMASK, and if PRIMASK is set it overrides BASEPRI (since if PRIMASK_NS is set and AIRCR.PRIS is set then whether that 0x80 priority should take effect or the priority in BASEPRI_S depends on the value of BASEPRI_S, for instance). So we switch to the same approach used by the pseudocode of working through BASEPRI, PRIMASK and FAULTMASK and overriding the previous values if needed. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-16-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
If AIRCR.BFHFNMINS is clear, then although NonSecure HardFault can still be pended via SHCSR.HARDFAULTPENDED it mustn't actually preempt execution. The simple way to achieve this is to clear the enable bit for it, since the enable bit isn't guest visible. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-15-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
In v7M, the fixed-priority exceptions are: Reset: -3 NMI: -2 HardFault: -1 In v8M, this changes because Secure HardFault may need to be prioritised above NMI: Reset: -4 Secure HardFault if AIRCR.BFHFNMINS == 1: -3 NMI: -2 Secure HardFault if AIRCR.BFHFNMINS == 0: -1 NonSecure HardFault: -1 Make these changes, including support for changing the priority of Secure HardFault as AIRCR.BFHFNMINS changes. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-14-git-send-email-peter.maydell@linaro.org
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