- 07 6月, 2017 40 次提交
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由 Peter Maydell 提交于
Queued s390 patches # gpg: Signature made Wed 07 Jun 2017 01:18:29 BST # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-s390-20170606: (70 commits) target/s390x: addressing exceptions are suppressing target/s390x: mark ETF2 and ETF2-ENH facilities as available target/s390x: check alignment in CDSG in the !CONFIG_ATOMIC128 case target/s390x: implement STORE PAIR TO QUADWORD target/s390x: implement LOAD PAIR FROM QUADWORD target/s390x: implement TRANSLATE ONE/TWO TO ONE/TWO target/s390x: implement TEST DECIMAL target/s390x: implement UNPACK UNICODE target/s390x: implement UNPACK ASCII target/s390x: implement PACK UNICODE target/s390x: implement PACK ASCII target/s390x: implement MOVE LONG UNICODE target/s390x: implement COMPARE LOGICAL LONG UNICODE target/s390x: improve MOVE LONG and MOVE LONG EXTENDED target/s390x: fix adj_len_to_page target/s390x: implement COMPARE LOGICAL LONG target/s390x: fix COMPARE LOGICAL LONG EXTENDED target/s390x: improve 24-bit and 31-bit lengths read/write target/s390x: improve 24-bit and 31-bit addresses write target/s390x: improve 24-bit and 31-bit addresses read ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 David Hildenbrand 提交于
We have to make the address in the old PSW point at the next instruction, as addressing exceptions are suppressing and not nullifying. I assume that there are a lot of other broken cases (as most instructions we care about are suppressing) - all trigger_pgm_exception() specifying and explicit number or ILEN_LATER look suspicious, however this is another story that might require bigger changes (and I have to understand when the address might already have been incremented first). This is needed to make an upcoming kvm-unit-test work. Reviewed-by: NThomas Huth <thuth@redhat.com> Signed-off-by: NDavid Hildenbrand <david@redhat.com> Message-Id: <20170529121228.2789-1-david@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-30-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
The CDSG instruction requires a 16-byte alignement, as expressed in the MO_ALIGN_16 passed to helper_atomic_cmpxchgo_be_mmu. In the non parallel case, use check_alignment to enforce this. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-4-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-3-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-2-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-29-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-28-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-27-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-26-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Use a common helper with PACK ASCII as the differences are limited to the stride of the source operand. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-25-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-24-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-23-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
For that we need to make program_interrupt available to qemu-user. Fortunately there is almost nothing to change as both kvm_enabled and CONFIG_KVM evaluate to false in that case. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-22-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
As MVCL and MVCLE only differ by their operands, use a common do_mvcl helper. Optimize it calling fast_memmove and fast_memset. Correctly write back addresses. Check that r1 and r2/r3 registers are even. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-21-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
adj_len_to_page doesn't return the correct result when the address is already page aligned and the length is bigger than a page. Fix that. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-20-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
As CLCL and CLCLE mostly differ by their operands, use a common do_clcl helper. Another difference is that CLCL is not interruptible. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-19-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
There are multiple issues with the COMPARE LOGICAL LONG EXTENDED instruction: - The test between the two operands is inverted, leading to an inversion of the cc values 1 and 2. - The address and length of an operand continue to be decreased after reaching the end of this operand. These values are then wrong write back to the registers. - We should limit the amount of bytes to process, so that interrupts can be served correctly. At the same time rename dest into src1 and src into src3 to match the operand names and make the code less confusing. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-18-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-17-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-16-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Improve fix_address to also handle the 24-bit mode. Rename fix_address to wrap_address to better explain what is changed. Replace the calls to get_address with x2 = 0 and b2 = 0 by call to wrap_address, leading to the removal of this function. Rename get_address_31fix into get_address. Reviewed-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-15-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-14-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-13-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-12-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-11-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
These functions differ from COMPARE by generating an exception for a QNaN input. Use the non quiet version of floatXX_compare. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-10-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-7-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-6-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-5-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
And at the same time make IPTE SMP aware. Reviewed-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-4-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-3-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-2-aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Thomas Huth 提交于
Currently we only present the plain z900 feature bits to the guest, but QEMU already emulates some additional features (but not all of the next CPU generation, so we can not use the next CPU level as default yet). Since newer Linux kernels are checking the feature bits and refuse to work if a required feature is missing, it would be nice to have a way to present more of the supported features when we are running with the "qemu" CPU. This patch now adds the supported features to the "full_feat" bitmap, so that additional features can be enabled on the command line now, for example with: qemu-system-s390x -cpu qemu,stfle=true,ldisp=true,eimm=true,stckf=true Acked-by: NDavid Hildenbrand <david@redhat.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NThomas Huth <thuth@redhat.com> Message-Id: <1495704132-5675-1-git-send-email-thuth@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
While the previous patch is required for proper conformance, the vast majority of target insns are MVC and XC for implementing memmove and memset respectively. The next most common are CLC, TR, and SVC. Implementing these (and a few others for which we already have an implementation) directly is faster than going through full translation to a TB. Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Previously, helper_ex would construct the insn and then implement the insn via direct calls other helpers. This was sufficient to boot Linux but that is all. It is easy enough to go the whole nine yards by stashing state for EXECUTE within the cpu, and then rely on a new TB to be created that properly and completely interprets the insn. Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
This split will be required for implementing EXECUTE properly. Do this now as a separate step to aid comparison of before and after TB listings. Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Use this saved value instead of recomputing from next_pc difference. Reviewed-by: NDavid Hildenbrand <david@redhat.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Also provide the cross-cpu tlb flushing required by the PoO. Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
The PoO specifies that when R1==0, no ORing into the insn loaded from storage takes place. Load a zero for this case. Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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