1. 20 9月, 2011 1 次提交
  2. 12 9月, 2011 1 次提交
  3. 10 9月, 2011 1 次提交
  4. 21 8月, 2011 1 次提交
  5. 12 8月, 2011 1 次提交
  6. 08 8月, 2011 2 次提交
  7. 24 7月, 2011 1 次提交
  8. 19 7月, 2011 1 次提交
  9. 20 6月, 2011 1 次提交
  10. 12 6月, 2011 1 次提交
  11. 26 5月, 2011 10 次提交
  12. 08 5月, 2011 1 次提交
  13. 07 4月, 2011 1 次提交
  14. 02 4月, 2011 1 次提交
  15. 07 3月, 2011 1 次提交
  16. 15 1月, 2011 1 次提交
    • A
      lsi53c895a: fix endianness issues · 3bd4be3a
      Aurelien Jarno 提交于
      lsi_ram_read*() and lsi_ram_write*() are not consistent, one uses
      leXX_to_cpu() the other uses nothing. As the comment above the RAM
      declaration says: "Script ram is stored as 32-bit words in host
      byteorder.", remove the leXX_to_cpu() calls.
      
      This fixes the boot of an ARM versatile machine on MIPS and PowerPC
      hosts.
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      3bd4be3a
  17. 11 12月, 2010 1 次提交
    • A
      Add endianness as io mem parameter · 2507c12a
      Alexander Graf 提交于
      As stated before, devices can be little, big or native endian. The
      target endianness is not of their concern, so we need to push things
      down a level.
      
      This patch adds a parameter to cpu_register_io_memory that allows a
      device to choose its endianness. For now, all devices simply choose
      native endian, because that's the same behavior as before.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      2507c12a
  18. 22 11月, 2010 1 次提交
  19. 14 10月, 2010 1 次提交
    • B
      lsi53c895a: avoid a write only variable · f3f5b867
      Blue Swirl 提交于
      Compiling with GCC 4.6.0 20100925 produced a warning:
      /src/qemu/hw/lsi53c895a.c: In function 'lsi_do_msgout':
      /src/qemu/hw/lsi53c895a.c:848:9: error: variable 'len' set but not used [-Werror=unused-but-set-variable]
      
      Fix by adding a dummy cast so that the variable is not unused for
      non-debug case.
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      f3f5b867
  20. 08 9月, 2010 1 次提交
  21. 06 7月, 2010 1 次提交
  22. 02 7月, 2010 1 次提交
  23. 30 6月, 2010 1 次提交
    • P
      lsi53c895a: fix Phase Mismatch Jump · d1d74664
      Paolo Bonzini 提交于
      lsi_bad_phase has a bug in the choice of pmjad1/pmjad2.  This does
      not matter with Linux guests because it uses just one routine for
      both, but it breaks Windows 64-bit guests.  This is the text
      from the spec:
      
         "[The PMJCTL] bit controls which decision mechanism is used
         when jumping on phase mismatch. When this bit is cleared the
         LSI53C895A will use Phase Mismatch Jump Address 1 (PMJAD1) when
         the WSR bit is cleared and Phase Mismatch Jump Address 2 (PMJAD2)
         when the WSR bit is set.  When this bit is set the LSI53C895A will
         use jump address one (PMJAD1) on data out (data out, command,
         message out) transfers and jump address two (PMJAD2) on data in
         (data in, status, message in) transfers."
      
      Which means:
      
          CCNTL0.PMJCTL
              0              SCNTL2.WSR = 0             PMJAD1
              0              SCNTL2.WSR = 1             PMJAD2
              1                    out                  PMJAD1
              1                    in                   PMJAD2
      
      In qemu, what you get instead is:
      
          CCNTL0.PMJCTL
              0                    out                  PMJAD1
              0                    in                   PMJAD2    <<<<<
              1                    out                  PMJAD1
              1                    in                   PMJAD1    <<<<<
      
      Considering that qemu always has SCNTL2.WSR cleared, the two marked cases
      (corresponding to phase mismatch on input) are always jumping to the
      wrong PMJAD register.  The patch implements the correct semantics.
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      d1d74664
  24. 22 5月, 2010 1 次提交
  25. 11 5月, 2010 3 次提交
  26. 04 5月, 2010 2 次提交
  27. 10 4月, 2010 1 次提交