1. 15 8月, 2019 27 次提交
  2. 13 8月, 2019 5 次提交
    • P
      Update version for v4.1.0-rc5 release · f28ed74f
      Peter Maydell 提交于
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      f28ed74f
    • B
      riscv: roms: Fix make rules for building sifive_u bios · 02db1be1
      Bin Meng 提交于
      Currently the make rules are wrongly using qemu/virt opensbi image
      for sifive_u machine. Correct it.
      Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
      Reviewed-by: NChih-Min Chao <chihmin.chao@sifive.com>
      Reviewed-by: NAlistair Francis <alistair.francis@wdc.com>
      Message-id: 1564812484-20385-1-git-send-email-bmeng.cn@gmail.com
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      02db1be1
    • P
      Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190813' into staging · 968ff692
      Peter Maydell 提交于
      ppc patch queue 2019-08-13 (last minute qemu-4.1 fixes)
      
      Here's a very, very last minute pull request for qemu-4.1.  This fixes
      two nasty bugs with the XIVE interrupt controller in "dual" mode
      (where the guest decides which interrupt controller it wants to use).
      One occurs when resetting the guest while I/O is active, and the other
      with migration of hotplugged CPUs.
      
      The timing here is very unfortunate.  Alas, we only spotted these bugs
      very late, and I was sick last week, delaying analysis and fix even
      further.
      
      This series hasn't had nearly as much testing as I'd really like, but
      I'd still like to squeeze it into qemu-4.1 if possible, since
      definitely fixing two bad bugs seems like an acceptable tradeoff for
      the risk of introducing different bugs.
      
      # gpg: Signature made Tue 13 Aug 2019 07:56:42 BST
      # gpg:                using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
      # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
      # gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
      # gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full]
      # gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown]
      # Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392
      
      * remotes/dgibson/tags/ppc-for-4.1-20190813:
        spapr/xive: Fix migration of hot-plugged CPUs
        spapr: Reset CAS & IRQ subsystem after devices
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      968ff692
    • C
      spapr/xive: Fix migration of hot-plugged CPUs · 310cda5b
      Cédric Le Goater 提交于
      The migration sequence of a guest using the XIVE exploitation mode
      relies on the fact that the states of all devices are restored before
      the machine is. This is not true for hot-plug devices such as CPUs
      which state come after the machine. This breaks migration because the
      thread interrupt context registers are not correctly set.
      
      Fix migration of hotplugged CPUs by restoring their context in the
      'post_load' handler of the XiveTCTX model.
      
      Fixes: 277dd3d7 ("spapr/xive: add migration support for KVM")
      Signed-off-by: NCédric Le Goater <clg@kaod.org>
      Message-Id: <20190813064853.29310-1-clg@kaod.org>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      310cda5b
    • D
      spapr: Reset CAS & IRQ subsystem after devices · 25c9780d
      David Gibson 提交于
      This fixes a nasty regression in qemu-4.1 for the 'pseries' machine,
      caused by the new "dual" interrupt controller model.  Specifically,
      qemu can crash when used with KVM if a 'system_reset' is requested
      while there's active I/O in the guest.
      
      The problem is that in spapr_machine_reset() we:
      
      1. Reset the CAS vector state
      	spapr_ovec_cleanup(spapr->ov5_cas);
      
      2. Reset all devices
      	qemu_devices_reset()
      
      3. Reset the irq subsystem
      	spapr_irq_reset();
      
      However (1) implicitly changes the interrupt delivery mode, because
      whether we're using XICS or XIVE depends on the CAS state.  We don't
      properly initialize the new irq mode until (3) though - in particular
      setting up the KVM devices.
      
      During (2), we can temporarily drop the BQL allowing some irqs to be
      delivered which will go to an irq system that's not properly set up.
      
      Specifically, if the previous guest was in (KVM) XIVE mode, the CAS
      reset will put us back in XICS mode.  kvm_kernel_irqchip() still
      returns true, because XIVE was using KVM, however XICs doesn't have
      its KVM components intialized and kernel_xics_fd == -1.  When the irq
      is delivered it goes via ics_kvm_set_irq() which assert()s that
      kernel_xics_fd != -1.
      
      This change addresses the problem by delaying the CAS reset until
      after the devices reset.  The device reset should quiesce all the
      devices so we won't get irqs delivered while we mess around with the
      IRQ.  The CAS reset and irq re-initialize should also now be under the
      same BQL critical section so nothing else should be able to interrupt
      it either.
      
      We also move the spapr_irq_msi_reset() used in one of the legacy irq
      modes, since it logically makes sense at the same point as the
      spapr_irq_reset() (it's essentially an equivalent operation for older
      machine types).  Since we don't need to switch between different
      interrupt controllers for those old machine types it shouldn't
      actually be broken in those cases though.
      
      Cc: Cédric Le Goater <clg@kaod.org>
      
      Fixes: b2e22477 "spapr: add a 'reset' method to the sPAPR IRQ backend"
      Fixes: 13db0cd9 "spapr: introduce a new sPAPR IRQ backend supporting
                       XIVE and XICS"
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      25c9780d
  3. 12 8月, 2019 1 次提交
    • G
      display/bochs: fix pcie support · 5e7bcdcf
      Gerd Hoffmann 提交于
      Set QEMU_PCI_CAP_EXPRESS unconditionally in init(), then clear it in
      realize() in case the device is not connected to a PCIe bus.
      
      This makes sure the pci config space allocation is big enough, so
      accessing the PCIe extended config space doesn't overflow the pci
      config space buffer.
      
      PCI(e) config space is guest writable.  Writes are limited by
      write mask (which probably is also filled with random stuff),
      so the guest can only flip enabled bits.  But I suspect it
      still might be exploitable, so rather serious because it might
      be a host escape for the guest.  On the other hand the device
      is probably not yet in widespread use.
      
      (For a QEMU version without this commit, a mitigation for the
      bug is available: use "-device bochs-display" as a conventional pci
      device only.)
      
      Cc: qemu-stable@nongnu.org
      Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
      Message-id: 20190812065221.20907-2-kraxel@redhat.com
      Reviewed-by: NAlex Williamson <alex.williamson@redhat.com>
      Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      5e7bcdcf
  4. 07 8月, 2019 1 次提交
  5. 06 8月, 2019 6 次提交